e55d7f737d
There are two separate flags controlling whether or not the MPIC is reset during initialization, which is completely unnecessary, and only one of them can be specified in the device tree. Also, most platforms in-tree right now do actually want to reset the MPIC during initialization anyways, which means lots of duplicate code passing the MPIC_WANTS_RESET flag. Fix all of the callers which currently do not pass the MPIC_WANTS_RESET flag to pass the MPIC_NO_RESET flag, then remove the MPIC_WANTS_RESET flag and make the code reset the MPIC by default. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
126 lines
2.9 KiB
C
126 lines
2.9 KiB
C
/*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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*
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* Author: Roy Zang <tie-fei.zang@freescale.com>
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*
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* Description:
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* P1023 RDS Board Setup
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/fsl_devices.h>
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#include <linux/of_platform.h>
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#include <linux/of_device.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include "smp.h"
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc85xx.h"
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/* ************************************************************************
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*
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* Setup the architecture
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*
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*/
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static void __init mpc85xx_rds_setup_arch(void)
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{
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struct device_node *np;
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if (ppc_md.progress)
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ppc_md.progress("p1023_rds_setup_arch()", 0);
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/* Map BCSR area */
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np = of_find_node_by_name(NULL, "bcsr");
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if (np != NULL) {
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static u8 __iomem *bcsr_regs;
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bcsr_regs = of_iomap(np, 0);
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of_node_put(np);
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if (!bcsr_regs) {
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printk(KERN_ERR
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"BCSR: Failed to map bcsr register space\n");
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return;
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} else {
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#define BCSR15_I2C_BUS0_SEG_CLR 0x07
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#define BCSR15_I2C_BUS0_SEG2 0x02
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/*
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* Note: Accessing exclusively i2c devices.
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*
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* The i2c controller selects initially ID EEPROM in the u-boot;
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* but if menu configuration selects RTC support in the kernel,
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* the i2c controller switches to select RTC chip in the kernel.
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*/
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#ifdef CONFIG_RTC_CLASS
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/* Enable RTC chip on the segment #2 of i2c */
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clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
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setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
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#endif
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iounmap(bcsr_regs);
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}
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}
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#ifdef CONFIG_PCI
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for_each_compatible_node(np, "pci", "fsl,p1023-pcie")
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fsl_add_bridge(np, 0);
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#endif
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mpc85xx_smp_init();
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}
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machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
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static void __init mpc85xx_rds_pic_init(void)
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{
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struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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}
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static int __init p1023_rds_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return of_flat_dt_is_compatible(root, "fsl,P1023RDS");
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}
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define_machine(p1023_rds) {
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.name = "P1023 RDS",
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.probe = p1023_rds_probe,
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.setup_arch = mpc85xx_rds_setup_arch,
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.init_IRQ = mpc85xx_rds_pic_init,
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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};
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