915f34e20c
It was set as an NMI, but the NMI bit always forces an interrupt to end up at vector 2. So it was never used. Remove. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
146 lines
3.7 KiB
C
146 lines
3.7 KiB
C
#ifndef _ASM_HW_IRQ_H
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#define _ASM_HW_IRQ_H
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/*
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* linux/include/asm/hw_irq.h
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*
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* (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
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*
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* moved some of the old arch/i386/kernel/irq.h to here. VY
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*
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* IRQ/IPI changes taken from work by Thomas Radke
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* <tomsoft@informatik.tu-chemnitz.de>
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*
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* hacked by Andi Kleen for x86-64.
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*
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* $Id: hw_irq.h,v 1.24 2001/09/14 20:55:03 vojtech Exp $
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*/
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#ifndef __ASSEMBLY__
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#include <linux/config.h>
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#include <asm/atomic.h>
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#include <asm/irq.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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struct hw_interrupt_type;
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#endif
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#define NMI_VECTOR 0x02
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/*
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* IDT vectors usable for external interrupt sources start
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* at 0x20:
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*/
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#define FIRST_EXTERNAL_VECTOR 0x20
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#define IA32_SYSCALL_VECTOR 0x80
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/*
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* Vectors 0x20-0x2f are used for ISA interrupts.
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*/
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/*
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* Special IRQ vectors used by the SMP architecture, 0xf0-0xff
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*
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* some of the following vectors are 'rare', they are merged
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* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
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* TLB, reschedule and local APIC vectors are performance-critical.
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*/
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#define SPURIOUS_APIC_VECTOR 0xff
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#define ERROR_APIC_VECTOR 0xfe
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#define RESCHEDULE_VECTOR 0xfd
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#define CALL_FUNCTION_VECTOR 0xfc
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/* fb free - please don't readd KDB here because it's useless
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(hint - think what a NMI bit does to a vector) */
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#define THERMAL_APIC_VECTOR 0xfa
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#define THRESHOLD_APIC_VECTOR 0xf9
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/* f8 free */
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#define INVALIDATE_TLB_VECTOR_END 0xf7
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#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
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#define NUM_INVALIDATE_TLB_VECTORS 8
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/*
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* Local APIC timer IRQ vector is on a different priority level,
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* to work around the 'lost local interrupt if more than 2 IRQ
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* sources per level' errata.
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*/
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#define LOCAL_TIMER_VECTOR 0xef
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/*
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* First APIC vector available to drivers: (vectors 0x30-0xee)
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* we start at 0x31 to spread out vectors evenly between priority
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* levels. (0x80 is the syscall vector)
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*/
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#define FIRST_DEVICE_VECTOR 0x31
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#define FIRST_SYSTEM_VECTOR 0xef /* duplicated in irq.h */
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#ifndef __ASSEMBLY__
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extern u8 irq_vector[NR_IRQ_VECTORS];
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#define IO_APIC_VECTOR(irq) (irq_vector[irq])
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#define AUTO_ASSIGN -1
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/*
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* Various low-level irq details needed by irq.c, process.c,
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* time.c, io_apic.c and smp.c
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*
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* Interrupt entry/exit code at both C and assembly level
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*/
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extern void disable_8259A_irq(unsigned int irq);
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extern void enable_8259A_irq(unsigned int irq);
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extern int i8259A_irq_pending(unsigned int irq);
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extern void make_8259A_irq(unsigned int irq);
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extern void init_8259A(int aeoi);
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extern void FASTCALL(send_IPI_self(int vector));
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extern void init_VISWS_APIC_irqs(void);
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extern void setup_IO_APIC(void);
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extern void disable_IO_APIC(void);
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extern void print_IO_APIC(void);
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extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
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extern void send_IPI(int dest, int vector);
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extern void setup_ioapic_dest(void);
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extern unsigned long io_apic_irqs;
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extern atomic_t irq_err_count;
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extern atomic_t irq_mis_count;
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#define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
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#define __STR(x) #x
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#define STR(x) __STR(x)
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#include <asm/ptrace.h>
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#define IRQ_NAME2(nr) nr##_interrupt(void)
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#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
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/*
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* SMP has a few special interrupts for IPI messages
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*/
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#define BUILD_IRQ(nr) \
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asmlinkage void IRQ_NAME(nr); \
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__asm__( \
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"\n.p2align\n" \
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"IRQ" #nr "_interrupt:\n\t" \
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"push $" #nr "-256 ; " \
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"jmp common_interrupt");
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#if defined(CONFIG_X86_IO_APIC)
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static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {
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if (IO_APIC_IRQ(i))
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send_IPI_self(IO_APIC_VECTOR(i));
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}
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#else
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static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
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#endif
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#define platform_legacy_irq(irq) ((irq) < 16)
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#endif
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#endif /* _ASM_HW_IRQ_H */
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