6d22d85a85
The kexec boot is not successful on some power machines since all CPUs are getting removed from global interrupt queue (GIQ) before kexec boot. Some systems always expect at least one CPU in GIQ. Hence, this patch will make sure that only secondary CPUs are removed from GIQ. Signed-off-by: Haren Myneni <hbabu@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
34 lines
924 B
C
34 lines
924 B
C
/*
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* arch/ppc64/kernel/xics.h
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*
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* Copyright 2000 IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _PPC64_KERNEL_XICS_H
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#define _PPC64_KERNEL_XICS_H
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#include <linux/cache.h>
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void xics_init_IRQ(void);
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int xics_get_irq(struct pt_regs *);
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void xics_setup_cpu(void);
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void xics_teardown_cpu(int secondary);
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void xics_cause_IPI(int cpu);
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void xics_request_IPIs(void);
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void xics_migrate_irqs_away(void);
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/* first argument is ignored for now*/
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void pSeriesLP_cppr_info(int n_cpu, u8 value);
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struct xics_ipi_struct {
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volatile unsigned long value;
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} ____cacheline_aligned;
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extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
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#endif /* _PPC64_KERNEL_XICS_H */
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