2839e06c95
PL310 implements the Clean & Invalidate by Way L2 cache maintenance operation (offset 0x7FC). This operation runs in background so that PL310 can handle normal accesses while it is in progress. Under very rare circumstances, due to this erratum, write data can be lost when PL310 treats a cacheable write transaction during a Clean & Invalidate by Way operation. Workaround: Disable Write-Back and Cache Linefill (Debug Control Register) Clean & Invalidate by Way (0x7FC) Re-enable Write-Back and Cache Linefill (Debug Control Register) This patch also removes any OMAP dependency on PL310 Errata's Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
100 lines
2.5 KiB
C
100 lines
2.5 KiB
C
/*
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* arch/arm/include/asm/outercache.h
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*
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* Copyright (C) 2010 ARM Ltd.
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* Written by Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_OUTERCACHE_H
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#define __ASM_OUTERCACHE_H
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struct outer_cache_fns {
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void (*inv_range)(unsigned long, unsigned long);
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void (*clean_range)(unsigned long, unsigned long);
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void (*flush_range)(unsigned long, unsigned long);
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void (*flush_all)(void);
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void (*inv_all)(void);
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void (*disable)(void);
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#ifdef CONFIG_OUTER_CACHE_SYNC
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void (*sync)(void);
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#endif
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void (*set_debug)(unsigned long);
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};
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#ifdef CONFIG_OUTER_CACHE
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extern struct outer_cache_fns outer_cache;
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static inline void outer_inv_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.inv_range)
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outer_cache.inv_range(start, end);
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}
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static inline void outer_clean_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.clean_range)
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outer_cache.clean_range(start, end);
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}
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static inline void outer_flush_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.flush_range)
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outer_cache.flush_range(start, end);
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}
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static inline void outer_flush_all(void)
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{
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if (outer_cache.flush_all)
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outer_cache.flush_all();
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}
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static inline void outer_inv_all(void)
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{
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if (outer_cache.inv_all)
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outer_cache.inv_all();
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}
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static inline void outer_disable(void)
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{
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if (outer_cache.disable)
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outer_cache.disable();
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}
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#else
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static inline void outer_inv_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_clean_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_flush_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_flush_all(void) { }
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static inline void outer_inv_all(void) { }
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static inline void outer_disable(void) { }
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#endif
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#ifdef CONFIG_OUTER_CACHE_SYNC
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static inline void outer_sync(void)
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{
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if (outer_cache.sync)
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outer_cache.sync();
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}
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#else
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static inline void outer_sync(void)
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{ }
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#endif
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#endif /* __ASM_OUTERCACHE_H */
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