fab8ad0b2b
Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
31 lines
1 KiB
Text
31 lines
1 KiB
Text
OMAP Timer bindings
|
|
|
|
Required properties:
|
|
- compatible: Must be "ti,omap2-timer" for OMAP2+ controllers.
|
|
- reg: Contains timer register address range (base address and
|
|
length).
|
|
- interrupts: Contains the interrupt information for the timer. The
|
|
format is being dependent on which interrupt controller
|
|
the OMAP device uses.
|
|
- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
|
|
where <X> is the instance number of the timer from the
|
|
HW spec.
|
|
|
|
Optional properties:
|
|
- ti,timer-alwon: Indicates the timer is in an alway-on power domain.
|
|
- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
|
|
addition to the ARM CPU.
|
|
- ti,timer-pwm: Indicates the timer can generate a PWM output.
|
|
- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
|
|
and therefore cannot be used by the kernel.
|
|
|
|
Example:
|
|
|
|
timer12: timer@48304000 {
|
|
compatible = "ti,omap2-timer";
|
|
reg = <0x48304000 0x400>;
|
|
interrupts = <95>;
|
|
ti,hwmods = "timer12"
|
|
ti,timer-alwon;
|
|
ti,timer-secure;
|
|
};
|