d58876e289
This patch adds interrupt acknowledge code for external interrupt sources on sh3 processors. Only really required for edge triggered interrupts, but we ack regardless of sense configuration. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
71 lines
1.8 KiB
C
71 lines
1.8 KiB
C
/*
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* Shared SH3 Setup code
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*
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* Copyright (C) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
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enum {
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UNUSED = 0,
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/* interrupt sources */
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IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
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};
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static struct intc_vect vectors_irq0123[] __initdata = {
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INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
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INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
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};
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static struct intc_vect vectors_irq45[] __initdata = {
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INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
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};
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static struct intc_prio_reg prio_registers[] __initdata = {
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{ 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
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{ 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
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};
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static struct intc_mask_reg ack_registers[] __initdata = {
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{ 0xa4000004, 0, 8, /* IRR0 */
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{ 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
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};
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static struct intc_sense_reg sense_registers[] __initdata = {
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{ 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
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};
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static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123",
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vectors_irq0123, NULL, NULL,
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prio_registers, sense_registers, ack_registers);
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static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
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vectors_irq45, NULL, NULL,
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prio_registers, sense_registers, ack_registers);
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#define INTC_ICR1 0xa4000010UL
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#define INTC_ICR1_IRQLVL (1<<14)
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void __init plat_irq_setup_pins(int mode)
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{
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if (mode == IRQ_MODE_IRQ) {
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ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
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register_intc_controller(&intc_desc_irq0123);
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return;
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}
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BUG();
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}
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void __init plat_irq_setup_sh3(void)
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{
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register_intc_controller(&intc_desc_irq45);
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}
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