1d015cf02a
This patch reworks the sh3/sh4/sh4a register saving code in the following ways: - break out prepare_stack_save_dsp() from handle_exception() - break out save_regs() from handle_exception() - the register saving order is unchanged - align new functions to fit in cache lines - separate exception code from interrupt code - keep main code flow in a single cache line per exception vector - use bsr/rts for regular functions (save pr first) - keep data in one shared cache line (exception_data) - document the functions - tie in the hp6xx code Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
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.. | ||
irq | ||
sh2 | ||
sh2a | ||
sh3 | ||
sh4 | ||
sh4a | ||
sh5 | ||
adc.c | ||
clock.c | ||
init.c | ||
Makefile | ||
ubc.S |