2074615a13
This is a small patch to switch fluch_icache_range() to use fc.i instead of fc. This would save time on processors which can establish i-cache coherency without flushing the cache-line out to memory (not that any current processors do). On existing processors, fc.i behaves like fc. The only caveat is that very old assemblers may not know about fc.i yet. Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
39 lines
763 B
ArmAsm
39 lines
763 B
ArmAsm
/*
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* Cache flushing routines.
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*
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* Copyright (C) 1999-2001, 2005 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/asmmacro.h>
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#include <asm/page.h>
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/*
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* flush_icache_range(start,end)
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* Must flush range from start to end-1 but nothing else (need to
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* be careful not to touch addresses that may be unmapped).
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*/
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GLOBAL_ENTRY(flush_icache_range)
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.prologue
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alloc r2=ar.pfs,2,0,0,0
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sub r8=in1,in0,1
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;;
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shr.u r8=r8,5 // we flush 32 bytes per iteration
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.save ar.lc, r3
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mov r3=ar.lc // save ar.lc
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;;
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.body
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mov ar.lc=r8
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;;
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.Loop: fc.i in0 // issuable on M2 only
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add in0=32,in0
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br.cloop.sptk.few .Loop
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;;
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sync.i
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;;
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srlz.i
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;;
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mov ar.lc=r3 // restore ar.lc
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br.ret.sptk.many rp
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END(flush_icache_range)
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