180 lines
5.3 KiB
C
180 lines
5.3 KiB
C
/*
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* Copyright (C) 2005 - 2008 ServerEngines
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation. The full GNU General
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* Public License is included in this distribution in the file called COPYING.
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*
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* Contact Information:
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* linux-drivers@serverengines.com
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*
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* ServerEngines
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* 209 N. Fair Oaks Ave
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* Sunnyvale, CA 94085
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*/
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/*
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* Autogenerated by srcgen version: 0127
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*/
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#ifndef __doorbells_amap_h__
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#define __doorbells_amap_h__
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/* The TX/RDMA send queue doorbell. */
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struct BE_SQ_DB_AMAP {
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u8 cid[11]; /* DWORD 0 */
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u8 rsvd0[5]; /* DWORD 0 */
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u8 numPosted[14]; /* DWORD 0 */
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u8 rsvd1[2]; /* DWORD 0 */
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} __packed;
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struct SQ_DB_AMAP {
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u32 dw[1];
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};
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/* The receive queue doorbell. */
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struct BE_RQ_DB_AMAP {
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u8 rq[10]; /* DWORD 0 */
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u8 rsvd0[13]; /* DWORD 0 */
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u8 Invalidate; /* DWORD 0 */
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u8 numPosted[8]; /* DWORD 0 */
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} __packed;
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struct RQ_DB_AMAP {
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u32 dw[1];
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};
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/*
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* The CQ/EQ doorbell. Software MUST set reserved fields in this
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* descriptor to zero, otherwise (CEV) hardware will not execute the
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* doorbell (flagging a bad_db_qid error instead).
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*/
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struct BE_CQ_DB_AMAP {
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u8 qid[10]; /* DWORD 0 */
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u8 rsvd0[4]; /* DWORD 0 */
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u8 rearm; /* DWORD 0 */
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u8 event; /* DWORD 0 */
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u8 num_popped[13]; /* DWORD 0 */
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u8 rsvd1[3]; /* DWORD 0 */
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} __packed;
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struct CQ_DB_AMAP {
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u32 dw[1];
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};
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struct BE_TPM_RQ_DB_AMAP {
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u8 qid[10]; /* DWORD 0 */
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u8 rsvd0[6]; /* DWORD 0 */
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u8 numPosted[11]; /* DWORD 0 */
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u8 mss_cnt[5]; /* DWORD 0 */
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} __packed;
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struct TPM_RQ_DB_AMAP {
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u32 dw[1];
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};
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/*
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* Post WRB Queue Doorbell Register used by the host Storage stack
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* to notify the controller of a posted Work Request Block
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*/
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struct BE_WRB_POST_DB_AMAP {
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u8 wrb_cid[10]; /* DWORD 0 */
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u8 rsvd0[6]; /* DWORD 0 */
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u8 wrb_index[8]; /* DWORD 0 */
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u8 numberPosted[8]; /* DWORD 0 */
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} __packed;
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struct WRB_POST_DB_AMAP {
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u32 dw[1];
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};
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/*
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* Update Default PDU Queue Doorbell Register used to communicate
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* to the controller that the driver has stopped processing the queue
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* and where in the queue it stopped, this is
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* a CQ Entry Type. Used by storage driver.
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*/
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struct BE_DEFAULT_PDU_DB_AMAP {
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u8 qid[10]; /* DWORD 0 */
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u8 rsvd0[4]; /* DWORD 0 */
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u8 rearm; /* DWORD 0 */
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u8 event; /* DWORD 0 */
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u8 cqproc[14]; /* DWORD 0 */
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u8 rsvd1[2]; /* DWORD 0 */
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} __packed;
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struct DEFAULT_PDU_DB_AMAP {
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u32 dw[1];
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};
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/* Management Command and Controller default fragment ring */
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struct BE_MCC_DB_AMAP {
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u8 rid[11]; /* DWORD 0 */
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u8 rsvd0[5]; /* DWORD 0 */
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u8 numPosted[14]; /* DWORD 0 */
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u8 rsvd1[2]; /* DWORD 0 */
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} __packed;
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struct MCC_DB_AMAP {
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u32 dw[1];
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};
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/*
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* Used for bootstrapping the Host interface. This register is
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* used for driver communication with the MPU when no MCC Rings exist.
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* The software must write this register twice to post any MCC
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* command. First, it writes the register with hi=1 and the upper bits of
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* the physical address for the MCC_MAILBOX structure. Software must poll
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* the ready bit until this is acknowledged. Then, sotware writes the
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* register with hi=0 with the lower bits in the address. It must
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* poll the ready bit until the MCC command is complete. Upon completion,
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* the MCC_MAILBOX will contain a valid completion queue entry.
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*/
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struct BE_MPU_MAILBOX_DB_AMAP {
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u8 ready; /* DWORD 0 */
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u8 hi; /* DWORD 0 */
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u8 address[30]; /* DWORD 0 */
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} __packed;
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struct MPU_MAILBOX_DB_AMAP {
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u32 dw[1];
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};
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/*
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* This is the protection domain doorbell register map. Note that
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* while this map shows doorbells for all Blade Engine supported
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* protocols, not all of these may be valid in a given function or
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* protection domain. It is the responsibility of the application
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* accessing the doorbells to know which are valid. Each doorbell
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* occupies 32 bytes of space, but unless otherwise specified,
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* only the first 4 bytes should be written. There are 32 instances
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* of these doorbells for the host and 31 virtual machines respectively.
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* The host and VMs will only map the doorbell pages belonging to its
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* protection domain. It will not be able to touch the doorbells for
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* another VM. The doorbells are the only registers directly accessible
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* by a virtual machine. Similarly, there are 511 additional
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* doorbells for RDMA protection domains. PD 0 for RDMA shares
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* the same physical protection domain doorbell page as ETH/iSCSI.
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*
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*/
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struct BE_PROTECTION_DOMAIN_DBMAP_AMAP {
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u8 rsvd0[512]; /* DWORD 0 */
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struct BE_SQ_DB_AMAP rdma_sq_db;
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u8 rsvd1[7][32]; /* DWORD 17 */
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struct BE_WRB_POST_DB_AMAP iscsi_wrb_post_db;
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u8 rsvd2[7][32]; /* DWORD 25 */
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struct BE_SQ_DB_AMAP etx_sq_db;
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u8 rsvd3[7][32]; /* DWORD 33 */
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struct BE_RQ_DB_AMAP rdma_rq_db;
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u8 rsvd4[7][32]; /* DWORD 41 */
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struct BE_DEFAULT_PDU_DB_AMAP iscsi_default_pdu_db;
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u8 rsvd5[7][32]; /* DWORD 49 */
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struct BE_TPM_RQ_DB_AMAP tpm_rq_db;
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u8 rsvd6[7][32]; /* DWORD 57 */
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struct BE_RQ_DB_AMAP erx_rq_db;
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u8 rsvd7[7][32]; /* DWORD 65 */
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struct BE_CQ_DB_AMAP cq_db;
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u8 rsvd8[7][32]; /* DWORD 73 */
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struct BE_MCC_DB_AMAP mpu_mcc_db;
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u8 rsvd9[7][32]; /* DWORD 81 */
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struct BE_MPU_MAILBOX_DB_AMAP mcc_bootstrap_db;
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u8 rsvd10[935][32]; /* DWORD 89 */
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} __packed;
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struct PROTECTION_DOMAIN_DBMAP_AMAP {
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u32 dw[1024];
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};
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#endif /* __doorbells_amap_h__ */
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