4e9baad8f5
Add safe (exception handled) variants of rdmsr_on_cpu and wrmsr_on_cpu. You should use these when the target MSR may not actually exist, as doing so could trigger an exception which the regular functions do not handle. The safe variants are slower, though. The upcoming coretemp hardware monitoring driver will need this. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Cc: Alexey Dobriyan <adobriyan@openvz.org> Cc: Dave Jones <davej@redhat.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
173 lines
4.1 KiB
C
173 lines
4.1 KiB
C
#ifndef __ASM_MSR_H
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#define __ASM_MSR_H
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#include <asm/msr-index.h>
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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#include <asm/errno.h>
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static inline unsigned long long native_read_msr(unsigned int msr)
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{
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unsigned long long val;
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asm volatile("rdmsr" : "=A" (val) : "c" (msr));
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return val;
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}
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static inline unsigned long long native_read_msr_safe(unsigned int msr,
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int *err)
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{
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unsigned long long val;
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asm volatile("2: rdmsr ; xorl %0,%0\n"
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"1:\n\t"
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".section .fixup,\"ax\"\n\t"
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"3: movl %3,%0 ; jmp 1b\n\t"
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".previous\n\t"
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".section __ex_table,\"a\"\n"
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" .align 4\n\t"
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" .long 2b,3b\n\t"
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".previous"
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: "=r" (*err), "=A" (val)
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: "c" (msr), "i" (-EFAULT));
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return val;
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}
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static inline void native_write_msr(unsigned int msr, unsigned long long val)
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{
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asm volatile("wrmsr" : : "c" (msr), "A"(val));
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}
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static inline int native_write_msr_safe(unsigned int msr,
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unsigned long long val)
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{
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int err;
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asm volatile("2: wrmsr ; xorl %0,%0\n"
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"1:\n\t"
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".section .fixup,\"ax\"\n\t"
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"3: movl %4,%0 ; jmp 1b\n\t"
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".previous\n\t"
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".section __ex_table,\"a\"\n"
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" .align 4\n\t"
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" .long 2b,3b\n\t"
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".previous"
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: "=a" (err)
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: "c" (msr), "0" ((u32)val), "d" ((u32)(val>>32)),
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"i" (-EFAULT));
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return err;
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}
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static inline unsigned long long native_read_tsc(void)
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{
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unsigned long long val;
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asm volatile("rdtsc" : "=A" (val));
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return val;
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}
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static inline unsigned long long native_read_pmc(void)
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{
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unsigned long long val;
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asm volatile("rdpmc" : "=A" (val));
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return val;
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}
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#ifdef CONFIG_PARAVIRT
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#include <asm/paravirt.h>
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#else
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#include <linux/errno.h>
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/*
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* Access to machine-specific registers (available on 586 and better only)
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* Note: the rd* operations modify the parameters directly (without using
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* pointer indirection), this allows gcc to optimize better
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*/
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#define rdmsr(msr,val1,val2) \
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do { \
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unsigned long long __val = native_read_msr(msr); \
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val1 = __val; \
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val2 = __val >> 32; \
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} while(0)
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#define wrmsr(msr,val1,val2) \
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native_write_msr(msr, ((unsigned long long)val2 << 32) | val1)
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#define rdmsrl(msr,val) \
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do { \
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(val) = native_read_msr(msr); \
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} while(0)
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static inline void wrmsrl (unsigned long msr, unsigned long long val)
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{
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unsigned long lo, hi;
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lo = (unsigned long) val;
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hi = val >> 32;
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wrmsr (msr, lo, hi);
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}
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/* wrmsr with exception handling */
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#define wrmsr_safe(msr,val1,val2) \
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(native_write_msr_safe(msr, ((unsigned long long)val2 << 32) | val1))
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/* rdmsr with exception handling */
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#define rdmsr_safe(msr,p1,p2) \
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({ \
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int __err; \
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unsigned long long __val = native_read_msr_safe(msr, &__err);\
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(*p1) = __val; \
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(*p2) = __val >> 32; \
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__err; \
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})
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#define rdtsc(low,high) \
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do { \
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u64 _l = native_read_tsc(); \
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(low) = (u32)_l; \
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(high) = _l >> 32; \
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} while(0)
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#define rdtscl(low) \
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do { \
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(low) = native_read_tsc(); \
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} while(0)
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#define rdtscll(val) ((val) = native_read_tsc())
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#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
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#define rdpmc(counter,low,high) \
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do { \
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u64 _l = native_read_pmc(); \
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low = (u32)_l; \
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high = _l >> 32; \
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} while(0)
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#endif /* !CONFIG_PARAVIRT */
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#ifdef CONFIG_SMP
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void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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#else /* CONFIG_SMP */
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static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
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{
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rdmsr(msr_no, *l, *h);
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}
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static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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{
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wrmsr(msr_no, l, h);
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}
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static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
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{
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return rdmsr_safe(msr_no, l, h);
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}
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static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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{
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return wrmsr_safe(msr_no, l, h);
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}
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#endif /* CONFIG_SMP */
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#endif
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#endif
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#endif /* __ASM_MSR_H */
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