e28f7faf05
Implement 4-level pagetables for ppc64 This patch implements full four-level page tables for ppc64, thereby extending the usable user address range to 44 bits (16T). The patch uses a full page for the tables at the bottom and top level, and a quarter page for the intermediate levels. It uses full 64-bit pointers at every level, thus also increasing the addressable range of physical memory. This patch also tweaks the VSID allocation to allow matching range for user addresses (this halves the number of available contexts) and adds some #if and BUILD_BUG sanity checks. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
26 lines
741 B
C
26 lines
741 B
C
#ifndef _PPC64_IMALLOC_H
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#define _PPC64_IMALLOC_H
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/*
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* Define the address range of the imalloc VM area.
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*/
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#define PHBS_IO_BASE VMALLOC_END
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#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
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#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
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/* imalloc region types */
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#define IM_REGION_UNUSED 0x1
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#define IM_REGION_SUBSET 0x2
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#define IM_REGION_EXISTS 0x4
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#define IM_REGION_OVERLAP 0x8
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#define IM_REGION_SUPERSET 0x10
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extern struct vm_struct * im_get_free_area(unsigned long size);
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extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
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int region_type);
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extern void im_free(void *addr);
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extern unsigned long ioremap_bot;
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#endif /* _PPC64_IMALLOC_H */
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