linux/arch/powerpc/mm
Paul Mackerras 9c1e105238 powerpc: Allow perf_counters to access user memory at interrupt time
This provides a mechanism to allow the perf_counters code to access
user memory in a PMU interrupt routine.  Such an access can cause
various kinds of interrupt: SLB miss, MMU hash table miss, segment
table miss, or TLB miss, depending on the processor.  This commit
only deals with 64-bit classic/server processors, which use an MMU
hash table.  32-bit processors are already able to access user memory
at interrupt time.  Since we don't soft-disable on 32-bit, we avoid
the possibility of reentering hash_page or the TLB miss handlers,
since they run with interrupts disabled.

On 64-bit processors, an SLB miss interrupt on a user address will
update the slb_cache and slb_cache_ptr fields in the paca.  This is
OK except in the case where a PMU interrupt occurs in switch_slb,
which also accesses those fields.  To prevent this, we hard-disable
interrupts in switch_slb.  Interrupts are already soft-disabled at
this point, and will get hard-enabled when they get soft-enabled
later.

This also reworks slb_flush_and_rebolt: to avoid hard-disabling twice,
and to make sure that it clears the slb_cache_ptr when called from
other callers than switch_slb, the existing routine is renamed to
__slb_flush_and_rebolt, which is called by switch_slb and the new
version of slb_flush_and_rebolt.

Similarly, switch_stab (used on POWER3 and RS64 processors) gets a
hard_irq_disable() to protect the per-cpu variables used there and
in ste_allocate.

If a MMU hashtable miss interrupt occurs, normally we would call
hash_page to look up the Linux PTE for the address and create a HPTE.
However, hash_page is fairly complex and takes some locks, so to
avoid the possibility of deadlock, we check the preemption count
to see if we are in a (pseudo-)NMI handler, and if so, we don't call
hash_page but instead treat it like a bad access that will get
reported up through the exception table mechanism.  An interrupt
whose handler runs even though the interrupt occurred when
soft-disabled (such as the PMU interrupt) is considered a pseudo-NMI
handler, which should use nmi_enter()/nmi_exit() rather than
irq_enter()/irq_exit().

Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2009-08-18 14:48:43 +10:00
..
40x_mmu.c powerpc/40x: Limit allocable DRAM during early mapping 2008-11-13 10:10:56 -05:00
44x_mmu.c powerpc: rework 4xx PTE access and TLB miss 2008-07-09 13:36:17 -04:00
Makefile powerpc/mm: Make k(un)map_atomic out of line 2009-06-26 14:37:25 +10:00
dma-noncoherent.c powerpc: Fix up dma_alloc_coherent() on platforms without cache coherency. 2009-05-27 16:33:59 +10:00
fault.c Move FAULT_FLAG_xyz into handle_mm_fault() callers 2009-06-21 13:08:22 -07:00
fsl_booke_mmu.c powerpc/mm: Tweak PTE bit combination definitions 2009-03-24 13:47:33 +11:00
gup.c powerpc: Use pr_devel() in arch/powerpc/mm/gup.c 2009-07-08 13:50:23 +10:00
hash_low_32.S powerpc/mm: Fix _PAGE_COHERENT support on classic ppc32 HW 2009-02-11 16:07:02 +11:00
hash_low_64.S powerpc: Free a PTE bit on ppc64 with 64K pages 2008-06-30 22:30:53 +10:00
hash_native_64.c powerpc: Add 2.06 tlbie mnemonics 2009-05-21 15:44:21 +10:00
hash_utils_64.c powerpc: Fix crash on CPU hotplug 2009-04-22 14:56:34 +10:00
highmem.c powerpc/mm: Make k(un)map_atomic out of line 2009-06-26 14:37:25 +10:00
hugetlbpage.c mm: Pass virtual address to [__]p{te,ud,md}_free_tlb() 2009-07-27 12:10:38 -07:00
init_32.c powerpc: Minor cleanups of kernel virt address space definitions 2009-05-27 16:32:50 +10:00
init_64.c powerpc: Shield code specific to 64-bit server processors 2009-06-09 16:47:38 +10:00
mem.c powerpc: Fix up dma_alloc_coherent() on platforms without cache coherency. 2009-05-27 16:33:59 +10:00
mmap_64.c powerpc/mm: Rename arch/powerpc/kernel/mmap.c to mmap_64.c 2009-03-24 13:47:33 +11:00
mmu_context_hash32.c powerpc/mm: Split mmu_context handling 2008-12-21 14:21:15 +11:00
mmu_context_hash64.c powerpc/mm: Split mmu_context handling 2008-12-21 14:21:15 +11:00
mmu_context_nohash.c powerpc/mm: Fix SMP issue with MMU context handling code 2009-07-29 23:05:43 -05:00
mmu_decl.h Merge commit 'kumar/kumar-next' into next 2009-01-13 13:59:03 +11:00
numa.c powerpc: Set init_bootmem_done on NUMA platforms as well 2009-06-09 16:43:04 +10:00
pgtable.c powerpc: Use pr_devel() in do_dcache_icache_coherency() 2009-07-08 13:50:24 +10:00
pgtable_32.c powerpc: Minor cleanups of kernel virt address space definitions 2009-05-27 16:32:50 +10:00
pgtable_64.c powerpc: Wire up /proc/vmallocinfo to our ioremap() 2009-03-11 17:10:14 +11:00
ppc_mmu_32.c powerpc/mm: Tweak PTE bit combination definitions 2009-03-24 13:47:33 +11:00
slb.c powerpc: Allow perf_counters to access user memory at interrupt time 2009-08-18 14:48:43 +10:00
slb_low.S [POWERPC] vmemmap fixes to use smaller pages 2008-05-15 20:49:25 +10:00
slice.c powerpc: is_hugepage_only_range() must account for both 4kB and 64kB slices 2009-01-16 16:15:16 +11:00
stab.c powerpc: Allow perf_counters to access user memory at interrupt time 2009-08-18 14:48:43 +10:00
subpage-prot.c [POWERPC] Provide a way to protect 4k subpages when using 64k pages 2008-01-24 10:06:01 +11:00
tlb_hash32.c powerpc/mm: Add SMP support to no-hash TLB handling 2008-12-21 14:21:16 +11:00
tlb_hash64.c powerpc: Remove unnecessary semicolons 2009-07-08 13:50:21 +10:00
tlb_nohash.c powerpc/mm: Fix compile warning 2009-04-07 22:11:10 -05:00
tlb_nohash_low.S powerpc: fix for long standing bug noticed by gcc 4.4.0 2009-04-23 08:52:16 -05:00