779e7d41ad
The current mips clock build infrastructure lets a system only use either the MIPS cp0 counter or a SoC specific timer as a clocksource / clockevent device. This patch renames the core cp0 counter clocksource / clockevent functions from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to call these renamed functions instead. Chips which can detect whether it is safe to use a chip-specific timer can now fall back on the cp0 counter if necessary and possible (e.g. Alchemy with a follow-on patch). Existing behaviour is not changed in any way. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
38 lines
867 B
C
38 lines
867 B
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 by Ralf Baechle
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*/
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <asm/time.h>
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static cycle_t c0_hpt_read(void)
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{
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return read_c0_count();
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}
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static struct clocksource clocksource_mips = {
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.name = "MIPS",
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.read = c0_hpt_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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int __init init_r4k_clocksource(void)
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{
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if (!cpu_has_counter || !mips_hpt_frequency)
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return -ENXIO;
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/* Calculate a somewhat reasonable rating value */
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clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
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clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
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clocksource_register(&clocksource_mips);
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return 0;
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}
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