0837f52463
This does a bit of unrolling for the SH-4 region flushers. Based on an earlier patch by SUGIOKA Toshinobu. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
125 lines
3 KiB
C
125 lines
3 KiB
C
#include <linux/mm.h>
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#include <asm/mmu_context.h>
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#include <asm/cacheflush.h>
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/*
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* Write back the dirty D-caches, but not invalidate them.
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*
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* START: Virtual Address (U0, P1, or P3)
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* SIZE: Size of the region.
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*/
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void __weak __flush_wback_region(void *start, int size)
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{
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unsigned long v, cnt, end;
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v = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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cnt = (end - v) / L1_CACHE_BYTES;
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while (cnt >= 8) {
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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cnt -= 8;
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}
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while (cnt) {
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asm volatile("ocbwb @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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cnt--;
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}
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}
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/*
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* Write back the dirty D-caches and invalidate them.
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*
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* START: Virtual Address (U0, P1, or P3)
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* SIZE: Size of the region.
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*/
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void __weak __flush_purge_region(void *start, int size)
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{
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unsigned long v, cnt, end;
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v = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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cnt = (end - v) / L1_CACHE_BYTES;
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while (cnt >= 8) {
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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cnt -= 8;
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}
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while (cnt) {
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asm volatile("ocbp @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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cnt--;
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}
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}
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/*
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* No write back please
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*/
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void __weak __flush_invalidate_region(void *start, int size)
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{
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unsigned long v, cnt, end;
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v = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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cnt = (end - v) / L1_CACHE_BYTES;
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while (cnt >= 8) {
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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cnt -= 8;
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}
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while (cnt) {
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asm volatile("ocbi @%0" : : "r" (v));
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v += L1_CACHE_BYTES;
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cnt--;
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}
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}
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