07573534b0
When doing register reads, it is possible for there to be a stale data ready bit set which will cause subsequent reads to return prematurely with incorrect data. This patch fixes the issues by ensuring stale data is cleared before starting another transaction. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Jon Smirl <jonsmirl@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
333 lines
8.4 KiB
C
333 lines
8.4 KiB
C
/*
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* linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
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*
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* Copyright (C) 2009 Jon Smirl, Digispeaker
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* Author: Jon Smirl <jonsmirl@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <asm/time.h>
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#include <asm/delay.h>
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#include <asm/mpc52xx_psc.h>
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#include "mpc5200_dma.h"
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#include "mpc5200_psc_ac97.h"
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#define DRV_NAME "mpc5200-psc-ac97"
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/* ALSA only supports a single AC97 device so static is recommend here */
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static struct psc_dma *psc_dma;
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static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
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{
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int status;
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unsigned int val;
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/* Wait for command send status zero = ready */
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status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
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MPC52xx_PSC_SR_CMDSEND), 100, 0);
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if (status == 0) {
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pr_err("timeout on ac97 bus (rdy)\n");
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return -ENODEV;
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}
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/* Force clear the data valid bit */
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in_be32(&psc_dma->psc_regs->ac97_data);
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/* Send the read */
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out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
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/* Wait for the answer */
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status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
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MPC52xx_PSC_SR_DATA_VAL), 100, 0);
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if (status == 0) {
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pr_err("timeout on ac97 read (val) %x\n",
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in_be16(&psc_dma->psc_regs->sr_csr.status));
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return -ENODEV;
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}
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/* Get the data */
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val = in_be32(&psc_dma->psc_regs->ac97_data);
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if (((val >> 24) & 0x7f) != reg) {
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pr_err("reg echo error on ac97 read\n");
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return -ENODEV;
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}
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val = (val >> 8) & 0xffff;
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return (unsigned short) val;
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}
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static void psc_ac97_write(struct snd_ac97 *ac97,
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unsigned short reg, unsigned short val)
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{
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int status;
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/* Wait for command status zero = ready */
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status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
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MPC52xx_PSC_SR_CMDSEND), 100, 0);
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if (status == 0) {
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pr_err("timeout on ac97 bus (write)\n");
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return;
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}
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/* Write data */
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out_be32(&psc_dma->psc_regs->ac97_cmd,
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((reg & 0x7f) << 24) | (val << 8));
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}
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static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
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{
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struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
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out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
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udelay(3);
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out_be32(®s->sicr, psc_dma->sicr);
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}
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static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
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{
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struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
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/* Do a cold reset */
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out_8(®s->op1, MPC52xx_PSC_OP_RES);
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udelay(10);
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out_8(®s->op0, MPC52xx_PSC_OP_RES);
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udelay(50);
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psc_ac97_warm_reset(ac97);
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}
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struct snd_ac97_bus_ops soc_ac97_ops = {
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.read = psc_ac97_read,
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.write = psc_ac97_write,
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.reset = psc_ac97_cold_reset,
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.warm_reset = psc_ac97_warm_reset,
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};
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EXPORT_SYMBOL_GPL(soc_ac97_ops);
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static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *cpu_dai)
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{
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struct psc_dma *psc_dma = cpu_dai->private_data;
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dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
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" periods=%i buffer_size=%i buffer_bytes=%i channels=%i"
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" rate=%i format=%i\n",
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__func__, substream, params_period_size(params),
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params_period_bytes(params), params_periods(params),
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params_buffer_size(params), params_buffer_bytes(params),
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params_channels(params), params_rate(params),
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params_format(params));
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if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
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if (params_channels(params) == 1)
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psc_dma->slots |= 0x00000100;
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else
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psc_dma->slots |= 0x00000300;
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} else {
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if (params_channels(params) == 1)
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psc_dma->slots |= 0x01000000;
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else
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psc_dma->slots |= 0x03000000;
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}
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out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
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return 0;
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}
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static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *cpu_dai)
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{
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struct psc_dma *psc_dma = cpu_dai->private_data;
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if (params_channels(params) == 1)
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out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
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else
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out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
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return 0;
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}
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static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_STOP:
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if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
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psc_dma->slots &= 0xFFFF0000;
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else
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psc_dma->slots &= 0x0000FFFF;
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out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
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break;
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}
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return 0;
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}
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static int psc_ac97_probe(struct platform_device *pdev,
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struct snd_soc_dai *cpu_dai)
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{
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struct psc_dma *psc_dma = cpu_dai->private_data;
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struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
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/* Go */
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out_8(®s->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
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return 0;
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}
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/* ---------------------------------------------------------------------
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* ALSA SoC Bindings
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*
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* - Digital Audio Interface (DAI) template
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* - create/destroy dai hooks
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*/
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/**
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* psc_ac97_dai_template: template CPU Digital Audio Interface
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*/
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static struct snd_soc_dai_ops psc_ac97_analog_ops = {
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.hw_params = psc_ac97_hw_analog_params,
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.trigger = psc_ac97_trigger,
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};
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static struct snd_soc_dai_ops psc_ac97_digital_ops = {
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.hw_params = psc_ac97_hw_digital_params,
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};
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struct snd_soc_dai psc_ac97_dai[] = {
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{
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.name = "AC97",
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.ac97_control = 1,
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.probe = psc_ac97_probe,
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.playback = {
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.channels_min = 1,
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.channels_max = 6,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S32_BE,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S32_BE,
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},
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.ops = &psc_ac97_analog_ops,
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},
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{
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.name = "SPDIF",
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.ac97_control = 1,
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.playback = {
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_32000 | \
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SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
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.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
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},
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.ops = &psc_ac97_digital_ops,
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} };
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EXPORT_SYMBOL_GPL(psc_ac97_dai);
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/* ---------------------------------------------------------------------
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* OF platform bus binding code:
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* - Probe/remove operations
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* - OF device match table
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*/
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static int __devinit psc_ac97_of_probe(struct of_device *op,
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const struct of_device_id *match)
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{
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int rc, i;
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struct snd_ac97 ac97;
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struct mpc52xx_psc __iomem *regs;
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rc = mpc5200_audio_dma_create(op);
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if (rc != 0)
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return rc;
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for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
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psc_ac97_dai[i].dev = &op->dev;
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rc = snd_soc_register_dais(psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
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if (rc != 0) {
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dev_err(&op->dev, "Failed to register DAI\n");
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return rc;
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}
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psc_dma = dev_get_drvdata(&op->dev);
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regs = psc_dma->psc_regs;
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ac97.private_data = psc_dma;
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for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
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psc_ac97_dai[i].private_data = psc_dma;
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psc_dma->imr = 0;
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out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
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/* Configure the serial interface mode to AC97 */
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psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
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out_be32(®s->sicr, psc_dma->sicr);
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/* No slots active */
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out_be32(®s->ac97_slots, 0x00000000);
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return 0;
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}
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static int __devexit psc_ac97_of_remove(struct of_device *op)
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{
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return mpc5200_audio_dma_destroy(op);
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}
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/* Match table for of_platform binding */
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static struct of_device_id psc_ac97_match[] __devinitdata = {
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{ .compatible = "fsl,mpc5200-psc-ac97", },
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{ .compatible = "fsl,mpc5200b-psc-ac97", },
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{}
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};
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MODULE_DEVICE_TABLE(of, psc_ac97_match);
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static struct of_platform_driver psc_ac97_driver = {
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.match_table = psc_ac97_match,
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.probe = psc_ac97_of_probe,
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.remove = __devexit_p(psc_ac97_of_remove),
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.driver = {
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.name = "mpc5200-psc-ac97",
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.owner = THIS_MODULE,
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},
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};
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/* ---------------------------------------------------------------------
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* Module setup and teardown; simply register the of_platform driver
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* for the PSC in AC97 mode.
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*/
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static int __init psc_ac97_init(void)
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{
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return of_register_platform_driver(&psc_ac97_driver);
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}
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module_init(psc_ac97_init);
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static void __exit psc_ac97_exit(void)
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{
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of_unregister_platform_driver(&psc_ac97_driver);
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}
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module_exit(psc_ac97_exit);
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MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
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MODULE_DESCRIPTION("mpc5200 AC97 module");
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MODULE_LICENSE("GPL");
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