7c4cb60e5b
Make GDT page aligned and page padded to support running inside of a hypervisor. This prevents false sharing of the GDT page with other hot data, which is not allowed in Xen, and causes performance problems in VMware. Rather than go back to the old method of statically allocating the GDT (which wastes unneded space for non-present CPUs), the GDT for APs is allocated dynamically. Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: "Seth, Rohit" <rohit.seth@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
165 lines
4.1 KiB
C
165 lines
4.1 KiB
C
#ifndef __ARCH_DESC_H
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#define __ARCH_DESC_H
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#include <asm/ldt.h>
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#include <asm/segment.h>
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#define CPU_16BIT_STACK_SIZE 1024
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#ifndef __ASSEMBLY__
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#include <linux/preempt.h>
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#include <linux/smp.h>
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#include <linux/percpu.h>
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#include <asm/mmu.h>
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extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
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DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
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struct Xgt_desc_struct {
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unsigned short size;
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unsigned long address __attribute__((packed));
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unsigned short pad;
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} __attribute__ ((packed));
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extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
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static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
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{
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return ((struct desc_struct *)cpu_gdt_descr[cpu].address);
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}
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#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
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#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
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#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
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#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
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#define load_tr(tr) __asm__ __volatile("ltr %0"::"mr" (tr))
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#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"mr" (ldt))
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#define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
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#define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
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#define store_tr(tr) __asm__ ("str %0":"=mr" (tr))
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#define store_ldt(ldt) __asm__ ("sldt %0":"=mr" (ldt))
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/*
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* This is the ldt that every process will get unless we need
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* something other than this.
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*/
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extern struct desc_struct default_ldt[];
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extern void set_intr_gate(unsigned int irq, void * addr);
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#define _set_tssldt_desc(n,addr,limit,type) \
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__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
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"movw %w1,2(%2)\n\t" \
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"rorl $16,%1\n\t" \
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"movb %b1,4(%2)\n\t" \
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"movb %4,5(%2)\n\t" \
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"movb $0,6(%2)\n\t" \
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"movb %h1,7(%2)\n\t" \
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"rorl $16,%1" \
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: "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
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static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
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{
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_set_tssldt_desc(&get_cpu_gdt_table(cpu)[entry], (int)addr,
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offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89);
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}
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#define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
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static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
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{
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_set_tssldt_desc(&get_cpu_gdt_table(cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82);
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}
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#define LDT_entry_a(info) \
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((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
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#define LDT_entry_b(info) \
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(((info)->base_addr & 0xff000000) | \
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(((info)->base_addr & 0x00ff0000) >> 16) | \
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((info)->limit & 0xf0000) | \
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(((info)->read_exec_only ^ 1) << 9) | \
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((info)->contents << 10) | \
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(((info)->seg_not_present ^ 1) << 15) | \
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((info)->seg_32bit << 22) | \
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((info)->limit_in_pages << 23) | \
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((info)->useable << 20) | \
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0x7000)
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#define LDT_empty(info) (\
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(info)->base_addr == 0 && \
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(info)->limit == 0 && \
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(info)->contents == 0 && \
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(info)->read_exec_only == 1 && \
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(info)->seg_32bit == 0 && \
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(info)->limit_in_pages == 0 && \
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(info)->seg_not_present == 1 && \
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(info)->useable == 0 )
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static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 entry_b)
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{
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__u32 *lp = (__u32 *)((char *)ldt + entry*8);
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*lp = entry_a;
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*(lp+1) = entry_b;
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}
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#if TLS_SIZE != 24
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# error update this code.
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#endif
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static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
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{
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#define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
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C(0); C(1); C(2);
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#undef C
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}
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static inline void clear_LDT(void)
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{
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int cpu = get_cpu();
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set_ldt_desc(cpu, &default_ldt[0], 5);
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load_LDT_desc();
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put_cpu();
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}
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/*
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* load one particular LDT into the current CPU
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*/
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static inline void load_LDT_nolock(mm_context_t *pc, int cpu)
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{
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void *segments = pc->ldt;
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int count = pc->size;
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if (likely(!count)) {
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segments = &default_ldt[0];
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count = 5;
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}
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set_ldt_desc(cpu, segments, count);
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load_LDT_desc();
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}
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static inline void load_LDT(mm_context_t *pc)
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{
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int cpu = get_cpu();
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load_LDT_nolock(pc, cpu);
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put_cpu();
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}
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static inline unsigned long get_desc_base(unsigned long *desc)
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{
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unsigned long base;
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base = ((desc[0] >> 16) & 0x0000ffff) |
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((desc[1] << 16) & 0x00ff0000) |
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(desc[1] & 0xff000000);
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return base;
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}
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#endif /* !__ASSEMBLY__ */
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#endif
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