Commit graph

19 commits

Author SHA1 Message Date
Mike Frysinger
6327a574f9 Blackfin: move internal irq prototypes out of global namespace
These are only used in a few internal Blackfin places, so move the irq
prototypes out of the global header and into the internal irq one.  No
functional changes other than shuffling locales.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 08:13:43 -04:00
Robin Getz
479ba60358 Blackfin: move string functions to normal lib/ assembly
Since 'extern inline' doesn't work correctly in the context of the Linux
kernel (too many overriding defines), move the string functions to normal
lib/ assembly files (like the existing mem funcs).  This avoids the forced
inline all over the kernel and allows us to place them constantly in L1.

This also avoids some module failures when gcc inserts calls to string
functions but the kernel build system doesn't fully consult the library
archives.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-05-22 14:19:09 -04:00
Mike Frysinger
abea0bc3d9 Blackfin: pull in asm/io.h in ksyms for prototypes
Make sure we pull in asm/io.h when exporting symbols for the I/O functions
so we don't end up with a build failure due to missing prototypes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-18 21:40:44 -04:00
Mike Frysinger
1c873be744 Blackfin: initial support for ftrace
Just the basic ftrace support here -- mcount and the ftrace stub.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-13 07:20:15 -04:00
Mike Frysinger
5d89137a17 Blackfin: fix data cache flushing when doing icache flushing
Make sure we flush all data caches and their write buffers before flushing
icache, otherwise random edge cases could crop up where stale data is read
into icache from external memory.  As fallout, punt the combined icache +
dcache flush function since we cannot safely do them back to back -- the
SSYNC is needed between the dcache flush and the icache flush.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-06-12 06:03:45 -04:00
Graf Yang
dbc895f955 Blackfin arch: smp patch cleanup from LKML review
1. Use inline get_l1_... functions instead of macro
2. Fix compile issue about smp barrier functions

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:39 +08:00
Graf Yang
8f65873e47 Blackfin arch: SMP supporting patchset: Blackfin kernel and memory management code
Blackfin dual core BF561 processor can support SMP like features.
https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like

In this patch, we provide SMP extend to Blackfin kernel and memory management code

Singed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-11-18 17:48:22 +08:00
Mike Frysinger
0f8befa1d1 Blackfin arch: drop unused exports and comment remaining exports
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-10-28 11:12:17 +08:00
Mike Frysinger
fe8015ce25 Blackfin arch: move EXPORT_SYMBOL to the place where it is actually defined
- kernel_thread
 - irq_flags
 - checksum

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-10-28 11:07:15 +08:00
Michael Hennerich
5906967638 Blackfin arch: IO Port functions to read/write unalligned memory
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-05-17 16:38:52 +08:00
Matthew Wilcox
64ac24e738 Generic semaphore implementation
Semaphores are no longer performance-critical, so a generic C
implementation is better for maintainability, debuggability and
extensibility.  Thanks to Peter Zijlstra for fixing the lockdep
warning.  Thanks to Harvey Harrison for pointing out that the
unlikely() was unnecessary.

Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
2008-04-17 10:42:34 -04:00
Mike Frysinger
8d6c242062 Blackfin arch: rename _return_from_exception to _bfin_return_from_exception and export it
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-21 15:53:49 +08:00
Mike Frysinger
d0025e5edf Blackfin arch: move EXPORT_SYMBOL() to C files where the symbol is actually defined
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-21 15:34:51 +08:00
Michael Hennerich
5c91fb902d Blackfin arch: Add assembly function insl_16
/*
 * CPUs often take a performance hit when accessing unaligned memory
 * locations. The actual performance hit varies, it can be small if the
 * hardware handles it or large if we have to take an exception and fix
 * it
 * in software.
 *
 * Since an ethernet header is 14 bytes network drivers often end up
 * with
 * the IP header at an unaligned offset. The IP header can be aligned by
 * shifting the start of the packet by 2 bytes. Drivers should do this
 * with:
 *
 * skb_reserve(NET_IP_ALIGN);
 *
 * The downside to this alignment of the IP header is that the DMA is
 * now
 * unaligned. On some architectures the cost of an unaligned DMA is high
 * and this cost outweighs the gains made by aligning the IP header.
 *
 * Since this trade off varies between architectures, we allow
 * NET_IP_ALIGN
 * to be overridden.
 */

This new function insl_16 allows to read form 32-bit IO and writes to
16-bit aligned memory. This is useful in above described scenario -
In particular with the AXIS AX88180 Gigabit Ethernet MAC.
Once the device is in 32-bit mode, reads from the RX FIFO always
decrements 4bytes.
While on the other side the destination address in SDRAM is always
16-bit aligned.
If we use skb_reserve(0) the receive buffer is 32-bit aligned but later
we hit a unaligned exception in the IP code.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-17 23:46:58 +08:00
Adrian Bunk
8d2e24c3c1 Blackfin arch: unexport get_wchan
The only user of get_wchan I was able to find is the proc fs - and proc
can't be built modular.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-17 23:05:06 +08:00
Adrian Bunk
05c484355f Blackfin arch: remove dump_thread()
The only user is the a.out support.

It was therefore removed prior to the blackfin merge from all
architectures not supporting a.out.

Currently, Blackfin doesn't suppport a.out.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-18 00:41:56 +08:00
Bernd Schmidt
ef4a47db52 Blackfin arch: Export strcpy - occasionally get module link failures otherwise
Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-10 17:45:22 +08:00
Mike Frysinger
1f83b8f148 Blackfin arch: cleanup warnings from checkpatch -- no functional changes
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 22:58:21 +08:00
Bryan Wu
1394f03221 blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix!  Tinyboards.

The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc.  (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000.  Since then ADI has put this core into its Blackfin
processor family of devices.  The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set.  It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.

The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc

This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/

We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 12:12:58 -07:00