Commit graph

9 commits

Author SHA1 Message Date
Krzysztof Hałasa
ed5b9fa0d1 IXP4xx: Extend PCI MMIO indirect address space to 1 GB.
IXP4xx CPUs can indirectly access the whole 4 GB PCI MMIO address space (using
the non-prefetch registers). Previously the available space depended on the CPU
variant, since one of the IXP43x platforms needed more than the usual 128 MB.
1 GB should be enough for everyone, and if not, we can trivially increase it.

Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-12-05 16:58:39 +01:00
Krzysztof Hałasa
cba362221b IXP4xx: Fix compilation failure with CONFIG_IXP4XX_INDIRECT_PCI.
Instead of including the heavy linux/mm.h for VMALLOC_START, test the addresses
against PCI MIN and MAX addresses. Indirect PCI uses 1:1 mapping for MMIO space
making this change possible.

Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-12-05 16:58:39 +01:00
Krzysztof Hałasa
58e570d118 IXP4xx: Drop "__ixp4xx_" prefix from in/out/ioread/iowrite functions for clarity.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-12-05 16:58:39 +01:00
Krzysztof Hałasa
28f85cd3f6 IXP4xx: Rename indirect MMIO primitives from __ixp4xx_* to __indirect_*.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-12-05 16:58:38 +01:00
Krzysztof Hałasa
9f2c94928a ARM: fix insl() and outsl() endianness on IXP4xx architecture.
The repetitive in/out functions must preserve order, not value.

Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-12-05 16:58:38 +01:00
Mikael Pettersson
dee2b904a1 IXP4xx: Fix IO_SPACE_LIMIT for 2.6.31-rc core PCI changes
2.6.31-rc kernels don't boot on my ixp4xx box (ds101), because the libata
driver doesn't find the PCI IDE controller any more. 2.6.30 was fine.
I traced this to a PCI update (1f82de10d6)
in 2.6.30-git19. Diffing the kernel boot logs from 2.6.30-git18 and
2.6.30-git19 illustrates the breakage:

> --- dmesg-2.6.30-git18	2009-08-04 01:45:22.000000000 +0200
> +++ dmesg-2.6.30-git19	2009-08-04 01:45:46.000000000 +0200
> @@ -26,6 +26,13 @@
>  pci 0000:00:02.2: PME# supported from D0 D1 D2 D3hot
>  pci 0000:00:02.2: PME# disabled
>  PCI: bus0: Fast back to back transfers disabled
> +pci 0000:00:01.0: BAR 0: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 1: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 2: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 3: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:02.0: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:02.1: BAR 4: can't allocate I/O resource [0x10000-0xffff]
>  bio: create slab <bio-0> at 0
>  SCSI subsystem initialized
>  NET: Registered protocol family 2
> @@ -44,11 +51,7 @@
>  console [ttyS0] enabled
>  serial8250.0: ttyS1 at MMIO 0xc8001000 (irq = 13) is a XScale
>  Driver 'sd' needs updating - please use bus_type methods
> -PCI: enabling device 0000:00:01.0 (0140 -> 0141)
> -scsi0 : pata_artop
> -scsi1 : pata_artop
> -ata1: PATA max UDMA/100 cmd 0x1050 ctl 0x1060 bmdma 0x1040 irq 28
> -ata2: PATA max UDMA/100 cmd 0x1058 ctl 0x1064 bmdma 0x1048 irq 28
> +pata_artop 0000:00:01.0: no available native port
>  Using configured DiskOnChip probe address 0x50000000
>  DiskOnChip found at 0x50000000
>  NAND device: Manufacturer ID: 0x98, Chip ID: 0x73 (Toshiba NAND 16MiB 3,3V 8-bit)

The specific change in 1f82de10d6 responsible
for this failure turned out to be the following:

> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -193,7 +193,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
>  		res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
>  		if (type == pci_bar_io) {
>  			l &= PCI_BASE_ADDRESS_IO_MASK;
> -			mask = PCI_BASE_ADDRESS_IO_MASK & 0xffff;
> +			mask = PCI_BASE_ADDRESS_IO_MASK & IO_SPACE_LIMIT;
>  		} else {
>  			l &= PCI_BASE_ADDRESS_MEM_MASK;
>  			mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;

Every arch except arm's ixp4xx defines IO_SPACE_LIMIT as an all-bits-one
bitmask, typically -1UL but sometimes only a 16-bit 0x0000ffff. But ixp4xx
defines it as 0xffff0000, which is now causing the PCI failures.

Russell King noted that ixp4xx has 64KB PCI IO space, so IO_SPACE_LIMIT
should be 0x0000ffff. This patch makes that change, which fixes the PCI
failures on my ixp4xx box.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-08-11 19:22:20 +02:00
Russell King
0560cf5aa5 [ARM] Add a common typesafe __io implementation
As Al did for Versatile in 2ad4f86b60,
add a typesafe __io implementation for platforms to use.  Convert
platforms to use this new simple typesafe implementation.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-30 11:45:54 +00:00
Russell King
4b78a9ffab [ARM] ixp4xx: clean up includes
mach/io.h doesn't need linux/mm.h.
mach/dma.h doesn't need linux/device.h, asm/page.h or mach/hardware.h

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-28 23:19:56 +00:00
Russell King
a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00
Renamed from include/asm-arm/arch-ixp4xx/io.h (Browse further)