This removes the need to use a label and goto, and makes the two
branches mirror each other more closely.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This function no longer has any common cleanup code.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Finish the job by removing the structure member.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some drivers need to be able to prevent access to an I2C bus segment
for a specific period of time. Add an interface for them to do so
without twiddling with i2c-core internals.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Ben Hutchings <bhutchings@solarflare.com>
Now that we can tell whether GRO is being applied, this heuristic is
effective once more.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When GRO is successfully merging received packets, we should allocate
raw page buffers rather than skbs that will be discarded by GRO.
Otherwise, we should allocate skbs.
GRO also benefits from higher interrupt moderation, so increase the
score for mergeable RX packets.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Page buffers containing packets with an incorrect checksum or using a
protocol not handled by hardware checksum offload were previously not
passed to LRO. The conversion to GRO changed this, but did not set
the ip_summed value accordingly.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We have never checked the efx_nic::rx_checksum_enabled flag everywhere
we should, and since the switch to GRO we don't check it anywhere.
It's simplest to check it in the one place where we initialise the
per-packet checksummed flag.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The 'XFP' driver is really a driver for the QT2022C2 and QT2025C PHYs,
covering both more and less than XFP. Rename its functions and
constants to reflect reality and to reduce namespace pollution when
sfc is a built-in driver.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The only multi-speed PHY driver using this is 10Xpress, and it does
not support non-autoneg operation.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
efx_fc_resolve() is specific to MDIO and is not used by any other
function.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The MTD partition is named based on the netdev name, which is set to
'eth%d' before registration. Also, the MTD partition will currently
be left registered if netdev registration fails.
Fix both these problems by moving the MTD probe after netdev
registration. Hold the RTNL to serialise this with the netdev
notifier that calls efx_mtd_rename().
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
These cleanup functions will never be called if the MMIO region could
not be mapped.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
MAC and PHY probing are bound up together, as evidenced by the
initialisation of efx_nic::loopback_modes. Remove the current
arbitrary separation.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This simplifies the implementation a lot.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This makes efx_pci_remove_main() more obviously the inverse of
efx_pci_probe_main(), and matches our out-of-tree driver.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Replace the duplicated logic in efx_enqueue_skb() and
efx_tx_queue_insert() with an inline function, efx_max_tx_len().
Remove the failed attempt at abstracting hardware-specifics and put
all the magic numbers in efx_max_tx_len().
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Move size and mask definitions into efx.h; calculate page orders in falcon.c.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
While we're at it, use type suffixes of 'd', 'q' and 'o', consistent
with register type names.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Siena is still based on the Falcon hardware architecture and will
share many of these definitions, so replace falcon_hwdefs.h with
regs.h.
The new definitions have been generated according to a naming
convention which incorporates the type and revision information.
Update the code accordingly.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since there are now separate blocks of code to set the thresholds for
each NIC type, it is no longer useful to include them in the NIC type
description.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
These macros are not extensible to more than two NIC types without
repetition of register definitions, and they are only used to deal
with a few fields in RX_CFG_REG and global events which moved between
Falcon rev A1 and B0.
Therefore:
- Move RX_CFG_REG initialisation into its own function which tests the
NIC revision just once
- Explicitly test the NIC revision when checking the RX_RECOVERY flag in
global events
- Merge definitions of RX_XOFF_MAC_EN flag, which did not move
- Remove the macro definitions
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Siena will require entirely different board code.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Commits 27fbc7d 'mdio: Expose pause frame advertising flags to ethtool'
and c634263 'sfc: 10Xpress: Initialise pause advertising flags'
added to our reported advertising flags.
efx_mdio_set_settings() requires that all advertising flags are
also present in the supported flags, so make sure that is true.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The mdio module now handles reconfiguration of pause advertising
through ethtool, but not initialisation. Add the necessary
initialisation to tenxpress_phy_init().
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Remove open-coded zalloc_cpumask_var() and zalloc_cpumask_var_node().
Signed-off-by: Li Zefan <lizf@cn.fujitsu.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
No need to put ethtool_ops in data, they should be const.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
In a couple of cases collapse some extra code like:
int retval = NETDEV_TX_OK;
...
return retval;
into
return NETDEV_TX_OK;
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Reconfiguring the port requires us to flush all DMA queues. In
repeated testing we have found that RX flushes would sometimes fail
because the RX DMA engine was not properly isolated from the MACs.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Received frames must be re-clocked by the local XGXS to the 156.25 MHz
(DDR) clock of the XGMII. If the remote clock is slightly faster this
can reduce a minimum IPG of 64 bit-times (1 cycle) to 32 bit-times
(half a cycle). If the XMAC detects that a frame has reached the
maximum RX frame length in the same cycle that it receives one of
these reduced IPGs, it may miss the IPG, causing two valid frames to
be treated as a single invalid frame (over-length with bad CRC).
We work around this by increasing the maximum RX frame length so that
peers with matched MTU will not provoke this bug.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
At probe time, falcon_reset_hw() performs a hard reset of the PHY
along with Falcon. There is no need to perform a soft reset later,
and any access to standard MDIO registers before the PHY firmware has
booted can interrupt the boot process, making the port unusable.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
falcon_reset_xaui() waits for XGXS reset to complete, but the XAUI
serdes reset may take longer. It needs to check both reset active
bits.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We must call netif_carrier_off() after the device is registered, not
before, to set the operational state and user-space IFF_RUNNING flag
correctly.
Since we don't want observers to see an intermediate state, open-code
register_netdev() and add efx_update_name() and netif_carrier_off()
into the locked region.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Ben Hutchings