Commit graph

935 commits

Author SHA1 Message Date
Sascha Hauer
36e2f21ab4 dmaengine i.MX SDMA: set firmware scripts addresses to negative value initially
If we do not have a firmare script for a given transfer,
the setup of this channel must fail. For this the script
addresses have to be < 0 initially, not 0.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-29 20:08:37 +05:30
Sascha Hauer
73eab978ad dmaengine i.MX SDMA: lock channel 0
channel0 of the sdma engine is the configuration channel. It
is a shared resource and thus must be protected by a mutex.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-29 20:08:26 +05:30
Guennadi Liakhovetski
981ed70d8e dmatest: make dmatest threads freezable
Making dmatest threads freezable allows its use for system PM testing.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-29 18:01:27 +05:30
Viresh Kumar
57001a606f dmaengine/amba-pl08x: Call pl08x_free_txd() instead of calling kfree() directly
pl08x_prep_channel_resources() is calling kfree() directly for txd(). To
maintain consistency in code call pl08x_free_txd() instead.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:35:07 +05:30
Viresh Kumar
0a2356572b dmaengine/amba-pl08x: Pass flow controller information with slave channel data
At least, on SPEAr platforms there is one peripheral, JPEG, which can be flow
controller for DMA transfer. Currently DMA controller driver didn't support
peripheral flow controller configurations.

This patch adds device_fc field in struct pl08x_channel_data, which will be used
only for slave transfers and is not used in case of mem2mem transfers.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:39 +05:30
Viresh Kumar
036f05fd6d dmaengine/amba-pl08x: Choose peripheral bus as master bus
When we have DMA transfers between peripheral and memory, then we shouldn't
reduce width of peripheral at all, as that may be a strict requirement. But we
can always reduce width of memory access, with some compromise in performance.
Thus, we must select peripheral as master and not memory.

Also this rearranges code to make it shorter.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:39 +05:30
Viresh Kumar
e071916580 dmaengine/amba-pl08x: Align lli_len to max(src.width, dst.width)
Currently lli_len is aligned to min of two widths, which looks to be incorrect.
Instead it should be aligned to max of both widths.

Lets say, total_size = 441 bytes

MIN: lets check if min() suits or not:

CASE 1: srcwidth = 1, dstwidth = 4
min(src, dst) = 1

i.e. We program transfer size in control reg to 441.
Now, till 440 bytes everything is fine, but on the last byte DMAC can't transfer
1 byte to dst, as its width is 4.

CASE 2: srcwidth = 4, dstwidth = 1
min(src, dst) = 1

i.e. we program transfer size in control reg to 110 (data transferred = 110 * srcwidth).
So, here too 1 byte is left, but on the source side.

MAX: Lets check if max() suits or not:

CASE 3: srcwidth = 1, dstwidth = 4
max(src, dst) = 4

Aligned size is 440

i.e. We program transfer size in control reg to 440.
Now, all 440 bytes will be transferred without any issues.

CASE 4: srcwidth = 4, dstwidth = 1
max(src, dst) = 4

Aligned size is 440

i.e. We program transfer size in control reg to 110 (data transferred = 110 * srcwidth).
Now, also all 440 bytes will be transferred without any issues.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:39 +05:30
Viresh Kumar
03af500f74 dmaengine/amba-pl08x: Add prep_single_byte_llis() routine
Code for creating single byte llis is present at several places. Create a
routine to avoid code redundancy.

Also, we don't need one lli per single byte transfer, we can have single lli to
do all single byte transfer.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:39 +05:30
Viresh Kumar
fa6a940bf1 dmaengine/amba-pl08x: max_bytes_per_lli is TRANSFER_SIZE * src_width (not MIN(width))
max_bytes_per_lli = bd.srcbus.buswidth * PL080_CONTROL_TRANSFER_SIZE_MASK;
This is confirmed by ARM support guys.

Below is summary of mail exchange with them:

[Viresh] What is the total data to be transferred in case source and destination
bus widths are different. Suppose, source bus width is 2 bytes and destination
is 4 bytes. Now in order to transfer 80 bytes, what should be value of
TransferSize field in control reg: 40? or 20?.

[David from ARM] The value that is programmed into the TransferSize field should
be the number of <SourceWidth> transfers needed to achieve the required data
transfer.

So, to transfer 80 bytes, with a Source Width of 2, the TransferSize field =
should be programmed with:

        Total transfer size
        ------------------- = 40
          <source width>

[Viresh] Will this change if source is 4 bytes and dest is 2?

[David] Yes - the calculation then becomes:

        Total transfer size
        ------------------- =20
          <source width>

Also, max_bytes_per_lli must be calculated after fixing src and dest widths not
before that. So move this code to the correct place.

This patch also removes max_bytes_per_lli from earlier print message, as till
that point max_bytes_per_lli is unknown.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:39 +05:30
Viresh Kumar
16a2e7d359 dmaengine/amba-pl08x: Get rid of pl08x_pre_boundary()
Pl080 Manual says: "Bursts do not cross the 1KB address boundary"

We can program the controller to cross 1 KB boundary on a burst and controller
can take care of this boundary condition by itself.

Following is the discussion with ARM Technical Support Guys (David):
[Viresh] Manual says: "Bursts do not cross the 1KB address boundary"

What does that actually mean? As, Maximum size transferable with a single LLI is
4095 * 4 =16380 ~ 16KB. So, if we don't have src/dest address aligned to burst
size, we can't use this big of an LLI.

[David] There is a difference between bursts describing the total data
transferred by the DMA controller and AHB bursts. Bursts described by the
programmable parameters in the PL080 have no direct connection with the bursts
that are seen on the AHB bus.

The statement that "Bursts do not cross the 1KB address boundary" in the TRM is
referring to AHB bursts, where this limitation is a requirement of the AHB spec.
You can still issue bursts within the PL080 that are in excess of 1KB. The
PL080 will make sure that its bursts are broken down into legal AHB bursts which
will be formatted to ensure that no AHB burst crosses a 1KB boundary.

Based on above discussion, this patch removes all code related to 1 KB boundary
as we are not required to handle this in driver.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:38 +05:30
Viresh Kumar
28da28365d dmaengine/amba-pl08x: Schedule tasklet in case of error interrupt
Currently, if error interrupt occurs, nothing is done in interrupt handler (just
clearing the interrupts). We must somehow indicate this to the user that DMA is
over, due to ERR interrupt or TC interrupt.

So, this patch just schedules existing tasklet, with a print showing error
interrupt has occurred on which channels.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:38 +05:30
Viresh Kumar
16ca810504 dmaengine/amba-pl08x: No need to check "ch->signal < 0"
We have just executed following in pl08x_get_phy_channel():
	ch->signal = -1;

We don't have to compare "ch->signal < 0", as this will always be true.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:38 +05:30
Viresh Kumar
48a59ef357 dmaengine/amba-pl08x: Simplify pl08x_ensure_on()
Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits.
Also as per manual, for bit 3-31 of DMACConfiguration register:
"read undefined, write as 0"

So, we must not rely on values read from this registers bit 3-31.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:38 +05:30
Viresh Kumar
b7b6018bad dmaengine/amba-pl08x: support runtime PM
Insert notifiers for the runtime PM API. With this the runtime PM layer kicks in
to action where used.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:38 +05:30
Viresh Kumar
175a5e617c dmaengine/amba-pl08x: Changing few prints to dev_dbg from dev_info
For 8 memory and 16 slave channels 35 boot print lines are printed. And that is
too much. Most of this would be more useful for debugging. So moving few of them
to dev_dbg instead of dev_info. Now only 3 prints will be printed.

This also rearrange one of the debug message to fit into two lines.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:38 +05:30
Viresh Kumar
0532e6fced dmaengine/amba-pl08x: Remove redundant comment and rewrite original
Similar comment is present over routine also pl08x_choose_master_bus(). Keeping
one of them. Also rewrite that comment to convey message clearly.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:38 +05:30
Viresh Kumar
b201c111c8 dmaengine/amba-pl08x: pass (*ptr) to sizeof() instead of (struct xyz)
As mentioned in Documentation/CodingStyle,

The preferred form for passing a size of a struct is the following:
   p = kmalloc(sizeof(*p), ...);

The alternative form where struct name is spelled out hurts readability and
introduces an opportunity for a bug when the pointer variable type is changed
but the corresponding sizeof that is passed to a memory allocator is not.

This patch replaces (struct xyz) with *ptr at several occurrences in driver.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:37 +05:30
Viresh Kumar
0c38d70139 dmaengine/amba-pl08x: Rearrange inclusion of header files in ascending order
Header files included in driver are not present in alphabetical order. Rearrange
them in alphabetical order.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:37 +05:30
Viresh Kumar
3e27ee8448 dmaengine/amba-pl08x: Resolve formatting issues
There were few formatting related issues in code. This patch fixes them.
Fixes include:
- Remove extra blank lines
- align code to 80 cols
- combine several lines to one line

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-25 19:33:37 +05:30
Nicolas Ferre
d7db80801f dmaengine: at_hdmac: fix way to specify cyclic capability
In this driver, we can trigger cyclic transfer on peripherals-DMA interfaces.
It is dependent on driver implementation but cannot depend on a platform
property: we remove the dma_has_cap(DMA_CYCLIC, ) test which has no meaning.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-19 18:40:04 +05:30
Nicolas Ferre
3c477482bb dmaengine: at_hdmac: add wrappers for testing channel state
Cyclic property and paused state are encoded as bits in the channel status
bitfield. Tests of those bits are wrapped in convenient helper functions.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-19 18:39:59 +05:30
Nicolas Ferre
c0ba594737 dmaengine: at_hdmac: improve power management routines
Save/restore dma controller state across a suspend-resume sequence.
The prepare() function will wait for the non-cyclic channels to become idle.
It also deals with cyclic operations with the start at next period while
resuming.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-19 18:39:54 +05:30
Nicolas Ferre
d8cb04b070 dmaengine: at_hdmac: replace spin_lock* with irqsave variants
dmaengine routines can be called from interrupt context and with
interrupts disabled. Whereas spin_unlock_bh can't be called from
such contexts. So this patch converts all spin_lock* routines
to irqsave variants.

Also, spin_lock() used in tasklet is converted to irqsave variants,
as tasklet can be interrupted, and dma requests from such interruptions
may also call spin_lock.

Idea from dw_dmac patch by Viresh Kumar.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-19 18:39:48 +05:30
Lothar Waßmann
ef298c21c0 mxs-dma: enable CLKGATE before accessing registers
After calling mxs_dma_disable_chan() for a channel, that channel
becomes unusable because some controller registers can only be written
when the clock is enabled via CLKGATE.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-16 18:33:42 +05:30
Linus Torvalds
068ef73912 Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: drop experimental status for ARM_PATCH_PHYS_VIRT
  ARM: 7008/1: alignment: Make SIGBUS sent to userspace POSIXly correct
  ARM: 7007/1: alignment: Prevent ignoring of faults with ARMv6 unaligned access model
  ARM: 7010/1: mm: fix invalid loop for poison_init_mem
  ARM: 7005/1: freshen up mm/proc-arm946.S
  dmaengine: PL08x: Fix trivial build error
  ARM: Fix build error for SMP=n builds
2011-08-10 17:37:17 -07:00
Russell King
4d66164e99 dmaengine: PL08x: Fix trivial build error
Something changed during the 3.1 merge window in the include files
which now causes the pl08x DMA engine driver to fail to build.  Fix
this by adding the now necessary dma-mapping.h include:

drivers/dma/amba-pl08x.c: In function ■pl08x_unmap_buffers■:
drivers/dma/amba-pl08x.c:1524: error: implicit declaration of function ■dma_unmap_single■
drivers/dma/amba-pl08x.c:1527: error: implicit declaration of function ■dma_unmap_page■

Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-09 08:42:28 +01:00
Viresh Kumar
9704efaa52 dmaengine/dmatest: Terminate transfers on all channels in case of error or exit
In case, some error occurs while doing memcpy transfers, we must terminate all
transfers physically too. This is achieved by calling device_control() routine
with TERMINATE_ALL as parameter.

This is also required to be done in case module is removed while we are in
middle of some transfers.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-08 19:32:01 +05:30
Linus Torvalds
7f3bf7cd34 Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
  dmaengine: use DEFINE_IDR for static initialization
  ioat: fix xor_idx_to_desc
  Avoid section type conflict in dma/ioat/dma_v3.c
  ioat: Adding PCI IDs for IOAT devices on SandyBridge platforms
2011-08-04 16:43:43 -10:00
Axel Lin
21ef4b8b7a dmaengine: use DEFINE_IDR for static initialization
We could use DEFINE_IDR for statically allocated idr
that allow us to save a few lines of code.

And also remove unneeded mutex_init() for dma_list_mutex, as
dma_list_mutex is initialized automatically by DEFINE_MUTEX().

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-08-03 22:25:39 -07:00
Dan Williams
d0b0c8c79b ioat: fix xor_idx_to_desc
For versions of the device that implement operation-types 0x87, 0x88
(IOAT_OP_XOR, IOAT_OP_XOR_VAL) this map determines whether a given
source is located in the base or extended descriptor.  Source addresses
6 through 8 require an extended descriptor, hence 0xe0, not 0xd0.  No
shipping hardware currently implements these operation types.

Reported-by: Evgueni Smogailov <evgueni.smogailov@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-08-03 22:25:06 -07:00
Linus Torvalds
12ff47e7f5 Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (37 commits)
  Improve slave/cyclic DMA engine documentation
  dmaengine: pl08x: handle the rest of enums in pl08x_width
  DMA: PL08x: cleanup selection of burst size
  DMA: PL08x: avoid recalculating cctl at each prepare
  DMA: PL08x: cleanup selection of buswidth
  DMA: PL08x: constify plchan->cd and plat->slave_channels
  DMA: PL08x: separately store source/destination cctl
  DMA: PL08x: separately store source/destination slave address
  DMA: PL08x: clean up LLI debugging
  DMA: PL08x: select LLI bus only once per LLI setup
  DMA: PL08x: remove unused constants
  ARM: mxs-dma: reset after disable channel
  dma: intel_mid_dma: remove redundant pci_set_drvdata calls
  dma: mxs-dma: fix unterminated platform_device_id table
  dmaengine: pl330: make platform data optional
  dmaengine: imx-sdma: return proper error if kzalloc fails
  pch_dma: Fix CTL register access issue
  dmaengine: mxs-dma: skip request_irq for NO_IRQ
  dmaengine/coh901318: fix slave submission semantics
  dmaengine/ste_dma40: allow memory buswidth/burst to be configured
  ...

Fix trivial whitespace conflict in drivers/dma/mv_xor.c
2011-08-01 13:46:37 -10:00
Linus Torvalds
e10b87d2b5 Merge branch 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x: (39 commits)
  SH: static should be at beginning of declaration
  sh: move CLKDEV_xxx_ID macro to sh_clk.h
  sh: clock-shx3: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7786: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7785: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7757: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7366: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7343: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7722: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7724: add CLKDEV_ICK_ID for cleanup
  sh: clock-sh7366: modify I2C clock settings
  sh: clock-sh7343: modify I2C clock settings
  sh: clock-sh7723: modify I2C clock settings
  sh: clock-sh7722: modify I2C clock settings
  sh: clock-sh7724: modify I2C clock settings
  serial: sh-sci: Fix up pretty name printing for port IRQs.
  serial: sh-sci: Kill off per-port enable/disable callbacks.
  serial: sh-sci: Add missing module description/author bits.
  serial: sh-sci: Regtype probing doesn't need to be fatal.
  sh: Tidy up pre-clkdev clk_get() error handling.
  ...
2011-08-01 06:10:16 -10:00
Vinod Koul
1ae105aa74 Merge branch 'next' into for-linus-3.0 2011-07-27 20:43:21 +05:30
Shawn Guo
580975d7f4 dmaengine: imx-sdma: add device tree probe support
It adds device tree probe support for imx-sdma driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
2011-07-27 09:31:56 +08:00
Shawn Guo
40ad5b3791 dmaengine: imx-sdma: sdma_get_firmware does not need to copy fw_name
It does not need to allocate space and copy fw_name in function
sdma_get_firmware().

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
2011-07-27 09:31:51 +08:00
Shawn Guo
62550cd7c0 dmaengine: imx-sdma: use platform_device_id to identify sdma version
It might be not good to use software defined version to identify sdma
device type, when hardware does not define such version.  Instead,
soc name is stable enough to define the device type.

The patch uses platform_device_id rather than version number passed
by platform data to identify sdma device type/version.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Vinod Koul <vinod.koul@intel.com>
2011-07-27 09:31:45 +08:00
Linus Torvalds
69f1d1a6ac Merge branch 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits)
  ARM: S5P64X0: External Interrupt Support
  ARM: EXYNOS4: Enable MFC on Samsung NURI
  ARM: EXYNOS4: Enable MFC on universal_c210
  ARM: S5PV210: Enable MFC on Goni
  ARM: S5P: Add support for MFC device
  ARM: EXYNOS4: Add support FIMD on SMDKC210
  ARM: EXYNOS4: Add platform device and helper functions for FIMD
  ARM: EXYNOS4: Add resource definition for FIMD
  ARM: EXYNOS4: Change devname for FIMD clkdev
  ARM: SAMSUNG: Add IRQ_I2S0 definition
  ARM: SAMSUNG: Add platform device for idma
  ARM: EXYNOS4: Add more registers to be saved and restored for PM
  ARM: EXYNOS4: Add more register addresses of CMU
  ARM: EXYNOS4: Add platform device for dwmci driver
  ARM: EXYNOS4: configure rtc-s3c on NURI
  ARM: EXYNOS4: configure MAX8903 secondary charger on NURI
  ARM: EXYNOS4: configure ADC on NURI
  ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI
  ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI
  ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
  ...

Fix up tons of silly conflicts:
 - arch/arm/mach-davinci/include/mach/psc.h
 - arch/arm/mach-exynos4/Kconfig
 - arch/arm/mach-exynos4/mach-smdkc210.c
 - arch/arm/mach-exynos4/pm.c
 - arch/arm/mach-imx/mm-imx1.c
 - arch/arm/mach-imx/mm-imx21.c
 - arch/arm/mach-imx/mm-imx25.c
 - arch/arm/mach-imx/mm-imx27.c
 - arch/arm/mach-imx/mm-imx31.c
 - arch/arm/mach-imx/mm-imx35.c
 - arch/arm/mach-mx5/mm.c
 - arch/arm/mach-s5pv210/mach-goni.c
 - arch/arm/mm/Kconfig
2011-07-26 17:41:04 -07:00
Vinod Koul
f32807f1ff dmaengine: pl08x: handle the rest of enums in pl08x_width
pl08x_width function does not handle rest of enums for DMA_SLAVE_BUSWIDTH_xxxx
which causes gcc to emit below warining

drivers/dma/amba-pl08x.c: In function 'pl08x_width':
	drivers/dma/amba-pl08x.c:1119: warning: enumeration value
	'DMA_SLAVE_BUSWIDTH_UNDEFINED' not handled in switch
	drivers/dma/amba-pl08x.c:1119: warning: enumeration value
	'DMA_SLAVE_BUSWIDTH_8_BYTES' not handled in switch

this patch adds a default case which returns error

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:29 +05:30
Russell King - ARM Linux
760596c6b9 DMA: PL08x: cleanup selection of burst size
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:29 +05:30
Russell King - ARM Linux
121c8476a3 DMA: PL08x: avoid recalculating cctl at each prepare
Now that we have separate cctl values for M>P and P>M transfers, we can
avoid calculating the cctl value each time we prepare a transaction.
Move the bus selection and increment setting to the slave configuration
and initialization functions.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:29 +05:30
Russell King - ARM Linux
aa88cdaa14 DMA: PL08x: cleanup selection of buswidth
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:28 +05:30
Russell King - ARM Linux
f14c426c72 DMA: PL08x: separately store source/destination cctl
Store the source/destination cctl values into the channel structure.
This moves us towards being able to avoid a configuration call each
time we use the channel.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:28 +05:30
Russell King - ARM Linux
b207b4d02b DMA: PL08x: separately store source/destination slave address
Store the source/destination slave address separately into the channel
structure.  This moves us towards being able to avoid a configuration
call each time we use the channel.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:28 +05:30
Russell King - ARM Linux
fc74eb7915 DMA: PL08x: clean up LLI debugging
Clean up debugging when setting up the LLI list.  This reduces the
amount of output while preserving the information, and makes it easier
to read.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:28 +05:30
Russell King - ARM Linux
25c94f7fcf DMA: PL08x: select LLI bus only once per LLI setup
Avoid re-selecting the LLI bus each time we create an LLI.  Move it out
of the LLI setup loops.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:28 +05:30
Russell King - ARM Linux
f44bd19140 DMA: PL08x: remove unused constants
PL08X_WQ_PERIODMIN and PL08X_MAX_ALLOCS are not used, remove them.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:28 +05:30
Dong Aisheng
a62bae98a9 ARM: mxs-dma: reset after disable channel
We met some channels in abnormal state after disable.
Reset it to get a clean state.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:28 +05:30
Axel Lin
add56ba711 dma: intel_mid_dma: remove redundant pci_set_drvdata calls
Call pci_set_drvdata() once in intel_mid_dma_probe() is enough.
Remove redundant pci_set_drvdata() calls in dma_suspend() and dma_resume().

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:27 +05:30
Axel Lin
2a9778ed83 dma: mxs-dma: fix unterminated platform_device_id table
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:33:27 +05:30
Rob Herring
4e0e6109a1 dmaengine: pl330: make platform data optional
The pl330 needs platform data for describing peripheral connections, but
some platforms may only support memory to memory dma channels. In this
case, we can probe for how many channels there are and don't need the
platform data.

As memcpy requests don't need channel private data to hold peripheral
info, allow private data to be NULL in this case.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Vinod Koul <vkoul@infradead.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26 15:32:52 +05:30
Linus Torvalds
d3ec4844d4 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits)
  fs: Merge split strings
  treewide: fix potentially dangerous trailing ';' in #defined values/expressions
  uwb: Fix misspelling of neighbourhood in comment
  net, netfilter: Remove redundant goto in ebt_ulog_packet
  trivial: don't touch files that are removed in the staging tree
  lib/vsprintf: replace link to Draft by final RFC number
  doc: Kconfig: `to be' -> `be'
  doc: Kconfig: Typo: square -> squared
  doc: Konfig: Documentation/power/{pm => apm-acpi}.txt
  drivers/net: static should be at beginning of declaration
  drivers/media: static should be at beginning of declaration
  drivers/i2c: static should be at beginning of declaration
  XTENSA: static should be at beginning of declaration
  SH: static should be at beginning of declaration
  MIPS: static should be at beginning of declaration
  ARM: static should be at beginning of declaration
  rcu: treewide: Do not use rcu_read_lock_held when calling rcu_dereference_check
  Update my e-mail address
  PCIe ASPM: forcedly -> forcibly
  gma500: push through device driver tree
  ...

Fix up trivial conflicts:
 - arch/arm/mach-ep93xx/dma-m2p.c (deleted)
 - drivers/gpio/gpio-ep93xx.c (renamed and context nearby)
 - drivers/net/r8169.c (just context changes)
2011-07-25 13:56:39 -07:00
Linus Torvalds
dd58ecba48 Merge branch 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (35 commits)
  ARM: msm: platsmp: determine number of CPU cores at boot time
  ARM: Tegra: Seaboard: Fix I2C bus numbering for ADT7461
  ARM: Tegra: Trimslice: Tri-state DAP3 pinmux
  ARM: orion5x: fixup 5181 MPP mask check
  ARM: mxs-dma: include <linux/dmaengine.h>
  ARM: i.MX53: consistently use MX53_UART_PAD_CTRL for uart txd/rxd/rts/cts
  ARM: i.MX53: UARTn_CTS pin should not change RTS input select
  ARM: i.MX53: UARTn_TXD pin should not change RXD input select
  ARM: mx25: Fix typo on CAN1_RX pad setting
  iomux-mx53: add missing 'IOMUX_CONFIG_SION' for some I2C pad definitions
  ARM: NUC93X: add UL suffix to VMALLOC_END to ensure it is properly typed
  ARM: LPC32XXX: add UL suffix to VMALLOC_END to ensure it is properly typed
  ARM: CNS3XXX: add UL suffix to VMALLOC_END to ensure it is properly typed
  ARM: i.MX53: Fix IOMUX type o's
  ARM i.MX dma: Fix burstsize settings
  mach-mx5: fix the I2C clock parents
  ARM: mxs/tx28: according to the TX28's datasheet D4-D7 are not used for MMC0
  ARM i.MX23/28: platform-mxsfb: Add missing include of linux/dma-mapping.h
  ARM: mx53: Fix some interrupts marked as reserved.
  MXC: iomux-v3: correct NO_PAD_CTRL definition
  ...

Fix up trivial conflict in arch/arm/mach-imx/mach-mx31_3ds.c
2011-07-25 11:53:35 -07:00
Axel Lin
1c1d954753 dmaengine: imx-sdma: return proper error if kzalloc fails
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-25 19:11:12 +05:30
Tomoya MORINAGA
0b052f4a08 pch_dma: Fix CTL register access issue
Currently, Mode-Control register is accessed by read-modify-write.

According to DMA hardware specifications datasheet, prohibits this method.
Because this register resets to 0 by DMA HW after DMA transfer completes.
Thus, current read-modify-write processing can cause unexpected behavior.

The datasheet says in case of writing Mode-Control register, set the value for only target channel, the others must set '11b'.
e.g. Set DMA0=01b  DMA11=10b
CTL0=33333331h
CTL2=00002333h

NOTE:
CTL0 includes DMA0~7 Mode-Control register.
CTL2 includes DMA8~11 Mode-Control register.

This patch modifies the issue.

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-25 19:11:12 +05:30
Linus Torvalds
7235dd74a4 Merge branch 'spi/next' of git://git.secretlab.ca/git/linux-2.6
* 'spi/next' of git://git.secretlab.ca/git/linux-2.6: (34 commits)
  spi/imx: add device tree probe support
  spi/imx: copy gpio number passed by platform data into driver private data
  spi/imx: use soc name in spi device type naming scheme
  spi/imx: merge type SPI_IMX_VER_0_7 into SPI_IMX_VER_0_4
  spi/imx: do not use spi_imx2_3 to name SPI_IMX_VER_2_3 function and macro
  spi/imx: use mx21 to name SPI_IMX_VER_0_0 function and macro
  spi/imx: do not make copy of spi_imx_devtype_data
  spi/dw: Add spi number into spi irq desc
  spi/tegra: Use engineering names in DT compatible property
  spi/fsl_spi: fix CPM spi driver
  mach-s3c2410: remove unused spi-gpio.h file
  spi: remove obsolete spi-s3c24xx-gpio driver
  mach-gta2: remove unused spi-gpio.h include
  mach-qt2410: convert to spi_gpio
  mach-jive: convert to spi_gpio
  spi/pxa2xx: Remove unavailable ssp_type from documentation
  spi/bfin_spi: uninline fat queue funcs
  spi/bfin_spi: constify pin array
  spi/bfin_spi: use structs for accessing hardware regs
  spi/topcliff-pch: Support new device ML7223 IOH
  ...

Fix up trivial conflict in arch/arm/mach-ep93xx/Makefile
2011-07-22 14:52:44 -07:00
Andi Kleen
9b487ced8a Avoid section type conflict in dma/ioat/dma_v3.c
const __read_mostly is not legal and causes section type conflicts.
That's because the read.mostly section is not read only.
Simply drop the __read_mostly designation.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
[drop __read_mostly instead of const]
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-07-22 14:19:29 -07:00
Dave Jiang
3baef940f2 ioat: Adding PCI IDs for IOAT devices on SandyBridge platforms
Adding to pci_id.h and the device table for ioat.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-07-22 14:17:31 -07:00
Shawn Guo
95bfea1675 dmaengine: mxs-dma: skip request_irq for NO_IRQ
In general, the mxs-dma users get separate irq for each channel,
but gpmi is special one which has only one irq shared by all gpmi
channels.  It causes mxs_dma channel allocation function fail for
all other gpmi channels except the first one calling into the
function.

The patch gets request_irq call skipped for NO_IRQ case, and leaves
this gpmi specific quirk to gpmi driver to sort out.  It will fix
above problem if gpmi driver sets chan_irq as gpmi irq for only one
channel and NO_IRQ for all the rest channels.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 05:00:56 +05:30
Linus Walleij
b89243dd0e dmaengine/coh901318: fix slave submission semantics
While testing Per Forlins MMC speed improvements I noticed a
semantic bug in the COH901318 driver: it will write to channel
registers in the prep_slave_sg() function, instead of deferring
it to later, breaking the assumption from the drivers to be able
to queue up new jobs while another job is running. Fix this by
storing up the initial register writes in the job descriptors
and write them to hardware when we process the descriptor
instead. Now the stress tests work.

Acked-by: Per Forlin <per.forlin@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 04:56:59 +05:30
Rabin Vincent
98ca528916 dmaengine/ste_dma40: allow memory buswidth/burst to be configured
Currently the runtime config implementation forces the memory side
parameters to be the same as the peripheral side. Allow these to be
different, and check for misconfiguration.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Ulf HANSSON <ulf.hansson@stericsson.com>
Tested-by: Stefan Nilsson <stefan.xk.nilsson@stericsson.com>
Reviewed-by: Per Forlin <per.forlin@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Robert Marklund <robert.marklund@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 04:09:10 +05:30
Linus Walleij
f4b89764c4 dmaengine/ste_dma40: use AMBA PrimeCell helper macros
The DMA40 is not a PrimeCell from ARM, but it still use the same
ID registers. So let's utilize the existing macros in the
PrimeCell header to identify manufacturer and revision of the IP
block instead of reinventing the wheel.

Cc: Robert Marklund <robert.marklund@stericsson.com>
Cc: Per Forlin <per.forlin@linaro.org>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 04:09:10 +05:30
Robert Marklund
79ca7ec3d1 dmaengine/ste_dma40: make the cyclic alloc NOWAIT
This function may be initiated from IRQ context, so the allocation
must allocate NOWAIT memory.

Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 04:09:10 +05:30
om prakash
ae752bf4cb dmaengine/ste_dma40: fix missing kernel-doc
Missing documentation creates kernel-doc warnings, so add
the documenation.

Signed-off-by: Om Prakash <omprakash.pal@stericsson.com>
Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 04:09:10 +05:30
Per Forlin
78fdaec341 dmaengine: remove ste_dma40 from issue_pending TODO
ste_dma40 now implements issue_pending according to documentation.
Submit adds descriptos to a pending queue with are flushed down to the DMAC
at issue_pending.

Signed-off-by: Per Forlin <per.forlin@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 04:02:08 +05:30
Per Forlin
a8f3067bce dmaengine/ste_dma40: add a separate queue for pending requests
tx_submit will add descriptors to the pending queue. Issue pending
will then move the pending descriptors to the transfer queue.

Signed-off-by: Per Forlin <per.forlin@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 04:02:08 +05:30
Alexander Stein
70f1891584 pch_dma: Fix channel locking
Fix for the following INFO message

=================================
[ INFO: inconsistent lock state ]
2.6.39+ #89
---------------------------------
inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} usage.
rs232/822 [HC1[1]:SC0[0]:HE0:SE1] takes:
 (&(&pd_chan->lock)->rlock){?.....}, at: [<c123b9a1>] pdc_desc_get+0x16/0xab
{HARDIRQ-ON-W} state was registered at:
  [<c104fe28>] mark_irqflags+0xbd/0x11a
  [<c1050386>] __lock_acquire+0x501/0x6bb
  [<c1050945>] lock_acquire+0x63/0x7b
  [<c131c51d>] _raw_spin_lock_bh+0x43/0x51
  [<c123bee4>] pd_alloc_chan_resources+0x92/0x11e
  [<c123ad62>] dma_chan_get+0x9b/0x107
  [<c123b2d1>] __dma_request_channel+0x61/0xdc
  [<c11ba24b>] pch_request_dma+0x61/0x19e
  [<c11bb3b8>] pch_uart_startup+0x16a/0x1a2
  [<c11b8446>] uart_startup+0x87/0x147
  [<c11b9183>] uart_open+0x117/0x13e
  [<c11a5c7d>] tty_open+0x23c/0x34c
  [<c1097705>] chrdev_open+0x140/0x15f
  [<c10930a6>] __dentry_open.clone.14+0x14a/0x22b
  [<c1093dfb>] nameidata_to_filp+0x36/0x40
  [<c109f28b>] do_last+0x513/0x635
  [<c109f4af>] path_openat+0x9c/0x2aa
  [<c109f6e4>] do_filp_open+0x27/0x69
  [<c1093f02>] do_sys_open+0xfd/0x184
  [<c1093fad>] sys_open+0x24/0x2a
  [<c131d58c>] sysenter_do_call+0x12/0x32
irq event stamp: 2522
hardirqs last  enabled at (2521): [<c131ca3b>] _raw_spin_unlock_irqrestore+0x36/0x52
hardirqs last disabled at (2522): [<c131db27>] common_interrupt+0x27/0x34
softirqs last  enabled at (2354): [<c102fa11>] __do_softirq+0x10a/0x11a
softirqs last disabled at (2299): [<c10041a4>] do_softirq+0x57/0xa4

other info that might help us debug this:
2 locks held by rs232/822:
 #0:  (&tty->atomic_write_lock){+.+.+.}, at: [<c11a4b7a>] tty_write_lock+0x14/0x3c
 #1:  (&port_lock_key){-.....}, at: [<c11bad72>] pch_uart_interrupt+0x17/0x1e9

stack backtrace:
Pid: 822, comm: rs232 Not tainted 2.6.39+ #89
Call Trace:
 [<c1319f90>] ? printk+0x19/0x1b
 [<c104f893>] print_usage_bug+0x184/0x18f
 [<c104e5b1>] ? print_irq_inversion_bug+0x10e/0x10e
 [<c104f943>] mark_lock_irq+0xa5/0x1f6
 [<c104fc9c>] mark_lock+0x208/0x2d7
 [<c104fdc0>] mark_irqflags+0x55/0x11a
 [<c1050386>] __lock_acquire+0x501/0x6bb
 [<c10042ee>] ? dump_trace+0x92/0xb6
 [<c1050945>] lock_acquire+0x63/0x7b
 [<c123b9a1>] ? pdc_desc_get+0x16/0xab
 [<c131c2d0>] _raw_spin_lock+0x3e/0x4c
 [<c123b9a1>] ? pdc_desc_get+0x16/0xab
 [<c123b9a1>] pdc_desc_get+0x16/0xab
 [<c10504d8>] ? __lock_acquire+0x653/0x6bb
 [<c123bb2c>] pd_prep_slave_sg+0x7c/0x1cb
 [<c1006c3f>] ? nommu_map_sg+0x6e/0x81
 [<c11bace6>] dma_handle_tx+0x2cf/0x344
 [<c11bad72>] ? pch_uart_interrupt+0x17/0x1e9
 [<c11baebb>] pch_uart_interrupt+0x160/0x1e9
 [<c10642fb>] handle_irq_event_percpu+0x25/0x127
 [<c1064429>] handle_irq_event+0x2c/0x43
 [<c1065e0d>] ? handle_fasteoi_irq+0x84/0x84
 [<c1065eb9>] handle_edge_irq+0xac/0xce
 <IRQ>  [<c1003ecb>] ? do_IRQ+0x38/0x9d
 [<c131db2e>] ? common_interrupt+0x2e/0x34
 [<c105007b>] ? __lock_acquire+0x1f6/0x6bb
 [<c131ca3d>] ? _raw_spin_unlock_irqrestore+0x38/0x52
 [<c11b798b>] ? uart_start+0x2d/0x32
 [<c11b7998>] ? uart_flush_chars+0x8/0xa
 [<c11a7962>] ? n_tty_write+0x12c/0x1c6
 [<c1027a73>] ? try_to_wake_up+0x251/0x251
 [<c11a4d0b>] ? tty_write+0x169/0x1dc
 [<c11a7836>] ? n_tty_ioctl+0xb7/0xb7
 [<c1094841>] ? vfs_write+0x91/0x10d
 [<c11a4ba2>] ? tty_write_lock+0x3c/0x3c
 [<c1094a69>] ? sys_write+0x3e/0x63
 [<c131d58c>] ? sysenter_do_call+0x12/0x32

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Tested-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 03:40:08 +05:30
H Hartley Sweeten
4de1ba155b dma: mv_xor: use resource_size()
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Dan Williams <dan.j.williams@intel.com> (supporter:ASYNCHRONOUS TRAN...)
Cc: Vinod Koul <vinod.koul@intel.com> (supporter:DMA GENERIC OFFLO...)
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14 03:32:31 +05:30
Jiri Kosina
b7e9c223be Merge branch 'master' into for-next
Sync with Linus' tree to be able to apply pending patches that
are based on newer code already present upstream.
2011-07-11 14:15:55 +02:00
Shawn Guo
2e534b21a5 dmaengine: imx-sdma: pass sdma firmware name via platform data
It is not good to have cpu_name and to_version encoded into sdma
firmware name as variables.  For example, there are three TOs of
imx51 soc, the sdma script never changes since TO1, which means
all three TOs of imx51 uses TO1 version of sdma script.  But we
have to prepare three identical firmwares, sdma-imx51-to1.bin
sdma-imx51-to2.bin and sdma-imx51-to3.bin, to have the kernel
capable of running on all three TOs.

The patch removes cpu_name and to_version from sdma platform data,
and instead uses fw_name to pass the firmware name, so that we can
pass the TO version where it's relevant and skip it where only one
firmware exists.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-07-07 10:01:12 +02:00
Sascha Hauer
6584cb8825 ARM i.MX dma: Fix burstsize settings
dmaengine expects the maxburst parameter in words, not bytes.
The imxdma driver and its users do this wrong. Fix this.

As a side note the imx-pcm-dma-mx2 driver was 'fixed' to work
with imx-dma. This broke the driver with imx-sdma support which
correctly takes the maxburst parameter in words. This patch
puts the sdma based sound back to work.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-07-07 09:55:50 +02:00
Guennadi Liakhovetski
a03a202e95 dmaengine: failure to get a specific DMA channel is not critical
There exist systems with multiple DMA controllers with different
capabilities. For example, on some sh-mobile / rmobile systems there are
DMA controllers, whose channels can be configured to be used with
SD- and MMC-host controllers, serial ports etc. Besides there are also
DMA controllers, that can only be used for one special function, e.g.,
for USB. In such cases the DMA client filter function can just choose
to specify to the DMA driver, which channel it needs. Then the
.device_alloc_chan_resources() method of the DMA driver will check,
whether it can provide that dunction. If not, it will fail and the loop
in __dma_request_channel() will continue to the next DMA device, until
it finds a suitable one. This works fine with just one minor glitch:
the kernel logs error messages like

dmaengine: failed to get <channel name>: (-<error code>)

after each such non-critical failure. This patch lowers priority of
this message to the debug level.

Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-06-24 16:13:16 +05:30
Alexey Dobriyan
b7f080cfe2 net: remove mm.h inclusion from netdevice.h
Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).

To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.

Hope people are OK with tiny include file.

Note, that mm_types.h is still dragged in, but it is a separate story.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-06-21 19:17:20 -07:00
Paul Mundt
f448e9c9da Merge branch 'common/dma' into sh-latest 2011-06-21 17:59:05 +09:00
Kuninori Morimoto
260bf2c5f6 dmaengine: shdma: add .needs_tend_set / .no_dmars flags
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-21 17:56:11 +09:00
Kuninori Morimoto
e76c3af873 dmaengine: shdma: add dmaor_is_32bit flag
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-21 17:56:07 +09:00
Kuninori Morimoto
67c6269e5c dmaengine: shdma: add chcr_ie_bit
IE bit position on CHCR register is not same in all DMAC.
This patch adds new "chcr_ie_bit" to decide it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-21 17:56:01 +09:00
Kuninori Morimoto
5899a723b3 dmaengine: shdma: add chcr_write/read function
CHCR register position is not same in all DMAC.
This patch adds new "chcr_offset" to decide it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-21 17:55:57 +09:00
Paul Mundt
d0459e1afa Merge branches 'common/dma' and 'sh/stable-updates' into sh-latest 2011-06-16 15:12:08 +09:00
Kuninori Morimoto
090b91805a dmaengine: shdma: fixup parameter definition on dmae_set_dmars
chan_pdata->dmars_bit is unsigned int

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-16 15:03:50 +09:00
Kuninori Morimoto
1d2c098026 dmaengine: shdma: tidyup spin_unlock_bh on sh_chan_xfer_ld_queue
It is not readable that there is any spin_unlock_bh on same function.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-16 15:03:43 +09:00
Kuninori Morimoto
c4e0dd7835 dmaengine: shdma: add to_sh_dev define
This patch adds "to_sh_dev" macro, and clean up codes.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-16 15:03:36 +09:00
H Hartley Sweeten
e2f5e5a71d dma/ep93xx_dma.c: local symbols should be static
The symbol 'ep93xx_dma_prep_dma_memcpy' is only used in this driver
and should be marked static.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Mika Westerberg <mika.westerberg@iki.fi>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-06-16 09:47:49 +05:30
Magnus Damm
dcee0bb713 dmaengine: shdma: SH_DMAC_MAX_CHANNELS message fix
Fix the recently added SH_DMAC_MAX_CHANNELS handling code in
300e5f9 dmaengine: shdma: Fix SH_DMAC_MAX_CHANNELS handling

Without this fix the shdma driver outputs silly messages in
case SH_DMAC_MAX_CHANNELS happens to match the platform data:

sh-dma-engine sh-dma-engine.0: Attempting to register 20 DMA channels when a max
imum of 20 are supported.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-14 15:03:07 +09:00
Joe Perches
28f65c11f2 treewide: Convert uses of struct resource to resource_size(ptr)
Several fixes as well where the +1 was missing.

Done via coccinelle scripts like:

@@
struct resource *ptr;
@@

- ptr->end - ptr->start + 1
+ resource_size(ptr)

and some grep and typing.

Mostly uncompiled, no cross-compilers.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-06-10 14:55:36 +02:00
Vinod Koul
4b28d81a7e Merge remote branch 'gpio/ep93xx-dma' into next 2011-06-09 22:07:05 +05:30
Mika Westerberg
760ee1c4aa dmaengine: add ep93xx DMA support
The ep93xx DMA controller has 10 independent memory to peripheral (M2P)
channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can
also be used by SPI and IDE to perform DMA transfers to/from their memory
mapped FIFOs.

This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and
DMA_MEMCPY (M2M only) capabilities.

Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Ryan Mallon <rmallon@gmail.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-08 15:10:44 -06:00
H Hartley Sweeten
114df7d66e dma: at_hdmac.c: use resource_size
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-06-06 13:43:59 +05:30
H Hartley Sweeten
7dab35c0c0 dma: ipu_idmac.c: use resource_size in ioremap
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-06-06 13:43:59 +05:30
Mika Westerberg
5fa29a17fa dmaengine: add ep93xx DMA support
The ep93xx DMA controller has 10 independent memory to peripheral (M2P)
channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can
also be used by SPI and IDE to perform DMA transfers to/from their memory
mapped FIFOs.

This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and
DMA_MEMCPY (M2M only) capabilities.

Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Ryan Mallon <rmallon@gmail.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-06-06 12:06:44 +05:30
Guennadi Liakhovetski
a1b2cc5067 dmaengine: shdma: fix a regression: initialise DMA channels for memcpy
A recent patch has introduced a regression, where repeating a memcpy
DMA test with shdma module unloading between them skips the DMA channel
configuration. Fix this regression by always configuring the channel
during its allocation.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-06-02 14:40:43 +09:00
Tomoya MORINAGA
c3d4913cd4 pch_dma: fix DMA issue(ch8-ch11)
ISSUE: In case PCH_DMA with I2S communications with ch8~ch11, sometimes I2S data
is not send correctly.
CAUSE: The following patch I submitted before was not enough modification for
supporting DMA ch8~ch11. The modification for status register of ch8~11 was not
enough.

pch_dma: Support I2S for ML7213 IOH
author	Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
	Mon, 9 May 2011 07:09:38 +0000 (16:09 +0900)
committer	Vinod Koul <vinod.koul@intel.com>
	Mon, 9 May 2011 11:42:23 +0000 (16:42 +0530)
commit	194f5f2706
tree	c9d4903ea0
parent	60092d0bde

This patch fixes the issue.
We can confirm PCH_DMA with I2S communications with ch8~ch11 works well.

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-06-01 13:27:40 +05:30
Paul Mundt
5c2de44417 dmaengine: shdma: Fix up fallout from runtime PM changes.
The runtime PM changes introduce sh_dmae_rst() wrapping via the
runtime_resume helper, depending on dev_get_drvdata() to fetch the
platform data needed for the DMAOR initialization default at a time
where drvdata hasn't yet been established by the probe path, resulting
in general probe misery:

        Unable to handle kernel NULL pointer dereference at virtual address 000000c4
        pc = 8025adee
        *pde = 00000000
        Oops: 0000 [#1]
        Modules linked in:

        Pid : 1, Comm:           swapper
        CPU : 0                  Not tainted  (3.0.0-rc1-00012-g9436b4a-dirty #1456)

        PC is at sh_dmae_rst+0x28/0x86
        PR is at sh_dmae_rst+0x22/0x86
        PC  : 8025adee SP  : 9e803d10 SR  : 400080f1 TEA : 000000c4
        R0  : 000000c4 R1  : 0000fff8 R2  : 00000000 R3  : 00000040
        R4  : 000000f0 R5  : 00000000 R6  : 00000000 R7  : 804f184c
        R8  : 00000000 R9  : 804dd0e8 R10 : 80283204 R11 : ffffffda
        R12 : 000000a0 R13 : 804dd18c R14 : 9e803d10
        MACH: 00000000 MACL: 00008f20 GBR : 00000000 PR  : 8025ade8

        Call trace:
        [<8025ae70>] sh_dmae_runtime_resume+0x24/0x34
        [<80283238>] pm_generic_runtime_resume+0x34/0x3c
        [<80283370>] rpm_callback+0x4a/0x7e
        [<80283efc>] rpm_resume+0x240/0x384
        [<80283f54>] rpm_resume+0x298/0x384
        [<8028428c>] __pm_runtime_resume+0x44/0x7c
        [<8038a358>] __ioremap_caller+0x0/0xec
        [<80284296>] __pm_runtime_resume+0x4e/0x7c
        [<8038a358>] __ioremap_caller+0x0/0xec
        [<80666254>] sh_dmae_probe+0x180/0x6a0
        [<802803ae>] platform_drv_probe+0x26/0x2e

Fix up the ordering accordingly.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-31 15:53:03 +09:00
Linus Torvalds
4cb865deec Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (33 commits)
  x86: poll waiting for I/OAT DMA channel status
  maintainers: add dma engine tree details
  dmaengine: add TODO items for future work on dma drivers
  dmaengine: Add API documentation for slave dma usage
  dmaengine/dw_dmac: Update maintainer-ship
  dmaengine: move link order
  dmaengine/dw_dmac: implement pause and resume in dwc_control
  dmaengine/dw_dmac: Replace spin_lock* with irqsave variants and enable submission from callback
  dmaengine/dw_dmac: Divide one sg to many desc, if sg len is greater than DWC_MAX_COUNT
  dmaengine/dw_dmac: set residue as total len in dwc_tx_status if status is !DMA_SUCCESS
  dmaengine/dw_dmac: don't call callback routine in case dmaengine_terminate_all() is called
  dmaengine: at_hdmac: pause: no need to wait for FIFO empty
  pch_dma: modify pci device table definition
  pch_dma: Support new device ML7223 IOH
  pch_dma: Support I2S for ML7213 IOH
  pch_dma: Fix DMA setting issue
  pch_dma: modify for checkpatch
  pch_dma: fix dma direction issue for ML7213 IOH video-in
  dmaengine: at_hdmac: use descriptor chaining help function
  dmaengine: at_hdmac: implement pause and resume in atc_control
  ...

Fix up trivial conflict in drivers/dma/dw_dmac.c
2011-05-28 12:35:15 -07:00
Dimitri Sivanich
19d78a61be x86: poll waiting for I/OAT DMA channel status
For certain system configurations a 5 usec udelay before checking I/OAT DMA
channel status is sometimes not sufficient, resulting in a false failure
status and unnecessary freeing of channel resources.  Conversely, for many
configurations 5 usec is longer than necessary.

Loop for up to 20 usec waiting for successful status before failing.

Signed-off-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-05-26 17:11:24 -07:00
Vinod Koul
bc9af76b1e dmaengine: add TODO items for future work on dma drivers
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-05-26 14:44:30 -07:00
Samuel Ortiz
3271d382c3 mfd: Use mfd cell platform_data for timberdale cells platform bits
With the addition of a device platform mfd_cell pointer, MFD drivers
can go back to passing platform data back to their sub drivers.
This allows for an mfd_cell->mfd_data removal and thus keep the
sub drivers MFD agnostic. This is mostly needed for non MFD aware
sub drivers.

Acked-by: Richard Röjfors <richard.rojfors@pelagicore.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2011-05-26 19:45:05 +02:00
Viresh Kumar
aecb7b64dd dmaengine/dw_dmac: Update maintainer-ship
Nobody is currently maintaining dw_dmac. We are using dw_dmac for SPEAr13xx and
are currently maintaining it. After discussing with Vinod, sending this patch to
update maintainer-ship of dw_dmac.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Havard Skinnemoen <hskinnemoen@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-25 18:30:37 +05:30
Magnus Damm
d026e00e58 dmaengine: shdma: Update SH_DMAC_MAX_CHANNELS to 20
Update SH_DMAC_MAX_CHANNELS to support the 20 DMA
channels included in the sh73a0 SY-DMAC hardware.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-25 11:36:17 +09:00
Magnus Damm
300e5f97d2 dmaengine: shdma: Fix SH_DMAC_MAX_CHANNELS handling
Fix the shdma.c handing of SH_DMAC_MAX_CHANNELS
to avoid overwriting the chan_irq[] and chan_flag[]
arrays in the case of pdata->channel_num is larger
than SH_DMAC_MAX_CHANNELS.

With this patch applied up to SH_DMAC_MAX_CHANNELS
will be used by the shdma.c driver. If more channels
are available in the platform data the user will
be notified on the console.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-25 11:36:15 +09:00
Magnus Damm
26fc02ab55 dmaengine: shdma: Make second memory window optional
This patch makes the shdma.c driver allow slave operation
on DMA hardware mapped with a single I/O-memory window.

The dmae_set_dmars() function is adjusted to use the
first memory window in case of a missing DMARS window.

At probe() time the code is updated to enable DMA_SLAVE
only if slave information is passed with the platform data.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-25 11:35:23 +09:00
Linus Torvalds
d762f43831 Merge branch 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (23 commits)
  sh: Ignore R_SH_NONE module relocations.
  SH: SE7751: Fix pcibios_map_platform_irq prototype.
  sh: remove warning and warning_symbol from struct stacktrace_ops
  sh: wire up sys_sendmmsg.
  clocksource: sh_tmu: Runtime PM support
  clocksource: sh_tmu: __clocksource_updatefreq_hz() update
  clocksource: sh_cmt: Runtime PM support
  clocksource: sh_cmt: __clocksource_updatefreq_hz() update
  dmaengine: shdma: synchronize RCU before freeing, simplify spinlock
  dmaengine: shdma: add runtime- and system-level power management
  dmaengine: shdma: fix locking
  sh: sh-sci: sh7377 and sh73a0 build fixes
  sh: cosmetic improvement: use an existing pointer
  serial: sh-sci: suspend/resume wakeup support V2
  serial: sh-sci: Runtime PM support
  sh: select IRQ_FORCED_THREADING.
  sh: intc: Set virtual IRQs as nothread.
  sh: fixup fpu.o compile order
  i2c: add a module alias to the sh-mobile driver
  ALSA: add a module alias to the FSI driver
  ...
2011-05-23 21:24:07 -07:00
Linus Torvalds
57d19e80f4 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
  b43: fix comment typo reqest -> request
  Haavard Skinnemoen has left Atmel
  cris: typo in mach-fs Makefile
  Kconfig: fix copy/paste-ism for dell-wmi-aio driver
  doc: timers-howto: fix a typo ("unsgined")
  perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c
  md, raid5: Fix spelling error in comment ('Ofcourse' --> 'Of course').
  treewide: fix a few typos in comments
  regulator: change debug statement be consistent with the style of the rest
  Revert "arm: mach-u300/gpio: Fix mem_region resource size miscalculations"
  audit: acquire creds selectively to reduce atomic op overhead
  rtlwifi: don't touch with treewide double semicolon removal
  treewide: cleanup continuations and remove logging message whitespace
  ath9k_hw: don't touch with treewide double semicolon removal
  include/linux/leds-regulator.h: fix syntax in example code
  tty: fix typo in descripton of tty_termios_encode_baud_rate
  xtensa: remove obsolete BKL kernel option from defconfig
  m68k: fix comment typo 'occcured'
  arch:Kconfig.locks Remove unused config option.
  treewide: remove extra semicolons
  ...
2011-05-23 09:12:26 -07:00
Paul Gortmaker
70c7160619 Add appropriate <linux/prefetch.h> include for prefetch users
After discovering that wide use of prefetch on modern CPUs
could be a net loss instead of a win, net drivers which were
relying on the implicit inclusion of prefetch.h via the list
headers showed up in the resulting cleanup fallout.  Give
them an explicit include via the following $0.02 script.

 =========================================
 #!/bin/bash
 MANUAL=""
 for i in `git grep -l 'prefetch(.*)' .` ; do
 	grep -q '<linux/prefetch.h>' $i
 	if [ $? = 0 ] ; then
 		continue
 	fi

 	(	echo '?^#include <linux/?a'
 		echo '#include <linux/prefetch.h>'
 		echo .
 		echo w
 		echo q
 	) | ed -s $i > /dev/null 2>&1
 	if [ $? != 0 ]; then
 		echo $i needs manual fixup
 		MANUAL="$i $MANUAL"
 	fi
 done
 echo ------------------- 8\<----------------------
 echo vi $MANUAL
 =========================================

Signed-off-by: Paul <paul.gortmaker@windriver.com>
[ Fixed up some incorrect #include placements, and added some
  non-network drivers and the fib_trie.c case    - Linus ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-22 21:41:57 -07:00
Guennadi Liakhovetski
31705e21f9 dmaengine: shdma: synchronize RCU before freeing, simplify spinlock
List elements, deleted using list_del_rcu(), cannot be freed without
synchronising RCU. Further, the spinlock, used to protect the RCU
writer, is called in process context, so, we don't have to save flags.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-23 12:49:59 +09:00
Guennadi Liakhovetski
467017b83b dmaengine: shdma: add runtime- and system-level power management
This patch extends and fixes runtime power management in the shdma
driver to support powering down the DMA controller and adds support
for system-level suspend and resume.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-23 12:44:33 +09:00
Guennadi Liakhovetski
2dc666673b dmaengine: shdma: fix locking
Close multiple theoretical races, especially the one in
.device_free_chan_resources().

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-23 12:44:20 +09:00
Linus Walleij
a0eb221a44 dmaengine: move link order
Move the dmaengine subsystem up early in the drivers Makefile so
DMA is made available early to all drivers, just like e.g.
regulators. Now even regulators can use DMA on the same initlevel.
As a result we can bump the ste_dma40 and coh901318 dmaengine
drivers down one initlevel to subsys_init().

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-19 16:56:26 +05:30
Jean Delvare
e05503ef11 Haavard Skinnemoen has left Atmel
Haavard's e-mail address at Atmel is no longer valid.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Havard Skinnemoen <hskinnemoen@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-05-18 23:24:50 +02:00
Linus Walleij
a7c57cf7d4 dmaengine/dw_dmac: implement pause and resume in dwc_control
Some peripherals like amba-pl011 needs pause to be implemented in DMA controller
drivers. This also returns correct status from dwc_tx_status() in case chan is
paused.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-13 19:40:15 +05:30
Viresh Kumar
69cea5a00d dmaengine/dw_dmac: Replace spin_lock* with irqsave variants and enable submission from callback
dmaengine routines can be called from interrupt context and with interrupts
disabled.  Whereas spin_unlock_bh can't be called from such contexts. So this
patch converts all spin_*_bh routines to irqsave variants.

Also, spin_lock() used in tasklet is converted to irqsave variants, as tasklet
can be interrupted, and dma requests from such interruptions may also call
spin_lock.

Now, submission from callbacks are permitted as per dmaengine framework. So we
shouldn't hold any locks while calling callbacks. As locks were taken by parent
routines, so releasing them before calling callbacks doesn't look clean enough.
So, locks are taken inside all routine now, whereever they are required. And
dwc_descriptor_complete is always called without taking locks.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-13 19:40:07 +05:30
Viresh Kumar
69dc14b51c dmaengine/dw_dmac: Divide one sg to many desc, if sg len is greater than DWC_MAX_COUNT
If len passed in sg for slave_sg transfers is greater than DWC_MAX_COUNT, then
driver programmes controller incorrectly.  This patch adds code to handle this
situation by allocation more than one desc for same sg.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-13 19:40:00 +05:30
Viresh Kumar
abf53902dc dmaengine/dw_dmac: set residue as total len in dwc_tx_status if status is !DMA_SUCCESS
If transfer status is !=DMA_SUCCESS, return total transfer len as residue,
instead of zero.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-13 19:39:55 +05:30
Viresh Kumar
5fedefb87b dmaengine/dw_dmac: don't call callback routine in case dmaengine_terminate_all() is called
If dmaengine_terminate_all() is called for dma channel, then it doesn't make
much sense to call registered callback routine. While in case of success or
failure it must be called.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-13 19:39:46 +05:30
Nicolas Ferre
de7a2f9f7b dmaengine: at_hdmac: pause: no need to wait for FIFO empty
With the addition of the "pause" feature, an active wait was introduced
to check the "FIFO empty" event. This event was not always happening and
a timout contition was needed.
But, in some cases, this event depend on the peripheral connected to the
channel that is paused: FIFO becomes empty if the peripheral consumes data.
The timeout is pretty difficult to evaluate. Moreover, this check is not
needed.
In conclusion, it seems sensible to entirely remove the checking of
"FIFO empty" status when pausing.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[commit msg edited for grammer]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-12 13:55:34 +05:30
Tomoya MORINAGA
eb8590b504 pch_dma: modify pci device table definition
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 17:12:24 +05:30
Tomoya MORINAGA
c0dfc04ac9 pch_dma: Support new device ML7223 IOH
Support new device OKI SEMICONDUCTOR ML7223 IOH(Input/Output Hub).
The ML7223 IOH is for MP(Media Phone) use.
The ML7223 is companion chip for Intel Atom E6xx series.
The ML7223 is completely compatible for Intel EG20T PCH.

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 17:12:23 +05:30
Tomoya MORINAGA
194f5f2706 pch_dma: Support I2S for ML7213 IOH
Support I2S device for ML7213 IOH

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 17:12:23 +05:30
Tomoya MORINAGA
60092d0bde pch_dma: Fix DMA setting issue
Currently, Direct-Start mode(*) is enabled.
Our IOH's devices must not use this mode.
This causes unexpected behavior.
This patch deletes Direct-Start setting.
(*) This mode is used in order for CPU to generate the DMA request.

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 17:12:23 +05:30
Tomoya MORINAGA
08645fdc7b pch_dma: modify for checkpatch
Fix checkpatch warnings.

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 17:12:23 +05:30
Tomoya MORINAGA
c8fcba600c pch_dma: fix dma direction issue for ML7213 IOH video-in
Currently, even-channel number is set as tx direction and odd is set as rx.
However, though video-in uses ch6, the direction is not tx but rx.
This patch sets video-in's DMA direction correctly.

Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 17:12:23 +05:30
Nicolas Ferre
e257e1563f dmaengine: at_hdmac: use descriptor chaining help function
A little function helps to chain descriptors:
it is already used in cyclic dma operations, now use it in memcpy and slave_sg
preparation functions.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 11:44:13 +05:30
Nicolas Ferre
23b5e3ad68 dmaengine: at_hdmac: implement pause and resume in atc_control
Pause and resume controls are useful for audio devices. This also returns
correct status from atc_tx_status() in case chan is paused.

Idea from dw_dmac patch by Linus Walleij.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 11:42:54 +05:30
Nicolas Ferre
543aabc7d2 dmaengine: at_hdmac: set residue as total len in atc_tx_status
If transfer status is !=DMA_SUCCESS, return total transfer len as residue,
instead of zero.

Idea from dw_dmac patch by Viresh Kumar.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 11:42:45 +05:30
Philippe Langlais
711b9cea92 dmaengine/ste_dma40: fix introduced warnings
The compiler nowadays moans about possibly non-assigned variable.
Fix this by default-assigning 0.

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-09 11:24:17 +05:30
Nicolas Ferre
ae14d4b5e0 dmaengine: at_hdmac: specialize AHB interfaces to optimize transfers
DMA controller has two AHB interfaces on the SOC internal
matrix.
It is more efficient to specialize each interface as the
access to memory can introduce latencies that are not compatible
with peripheral accesses requirements.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-02 15:42:09 +05:30
Nicolas Ferre
2f432823ec dmaengine: at_hdmac: remove channel status testing in tasklet
There is no need to test if channel is enabled in tasklet:
- in error path, channel is disabled in interrupt routine
- in normal path, this test is performed in sub functions to report
a misuse of the engine.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-02 15:42:09 +05:30
Nicolas Ferre
cc52a10a04 dmaengine: at_hdmac: debug information sg_len for prep_slave_sg
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-02 15:42:09 +05:30
Nicolas Ferre
53830cc759 dmaengine: at_hdmac: add cyclic DMA operation support
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-02 15:42:09 +05:30
Nicolas Ferre
9b3aa589ea dmaengine: at_hdmac: modify way to use interrupts
Now we use Buffer Transfer Completed interrupts. If we
want a chained buffer completed information, we setup the
ATC_IEN bit in CTRLB register in the lli.
This is done by set_desc_eol() function and used by
memcpy/slave_sg functions.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-05-02 15:42:09 +05:30
Joe Perches
85ee7a1d39 treewide: cleanup continuations and remove logging message whitespace
Using C line continuation inside format strings is error prone.
Clean up the unintended whitespace introduced by misuse of \.
Neaten correctly used line continations as well for consistency.

drivers/scsi/arcmsr/arcmsr_hba.c has these errors as well,
but arcmsr needs a lot more work and the driver should likely be
moved to staging instead.

Signed-off-by: Joe Perches <joe@perches.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-04-26 10:24:37 +02:00
Linus Torvalds
6b98cd5aad Merge branch 'spi/merge' of git://git.secretlab.ca/git/linux-2.6
* 'spi/merge' of git://git.secretlab.ca/git/linux-2.6:
  dt/fsldma: fix build warning caused by of_platform_device changes
  spi: Fix race condition in stop_queue()
  gpio/pch_gpio: Fix output value of pch_gpio_direction_output()
  gpio/ml_ioh_gpio: Fix output value of ioh_gpio_direction_output()
  gpio/pca953x: fix error handling path in probe() call
2011-04-11 15:44:38 -07:00
Ira W. Snyder
8faa7cf828 dt/fsldma: fix build warning caused by of_platform_device changes
Commit 000061245a, "dt/powerpc:
Eliminate users of of_platform_{,un}register_driver" forgot to convert
the type of structure passed into platform_device_register() when it
was converted from of_platform_device_register. Fix it.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-04-10 23:34:38 -07:00
Linus Torvalds
26cf445721 Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: select ARCH_NO_SYSDEV_OPS.
  sh: fix build error in board-sh7757lcr.c
  sh: landisk: Remove whitespace
  sh: landisk: Remove mv_nr_irqs
  sh: sh-sci: Fix double initialization by serial_console_setup
  serial: sh-sci: prevent setup of uninitialized serial console
  dma: shdma: add checking the DMAOR_AE in sh_dmae_err
2011-04-07 12:48:45 -07:00
Liu Yuan
364de77831 drivers, pch_dma: Fix uninitialized var before use
In the function pdc_desc_get(), var 'i' is not
initialized before use. This patch fixes it.

Signed-off-by: Liu Yuan <tailai.ly@taobao.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-04-06 14:14:56 +05:30
Vinod Koul
8194145dcc Merge branch 'old_next' into next 2011-04-06 11:51:12 +05:30
Kristen Carlson Accardi
e2142df7ec intel_mid_dma: fix runtime pm issues
Use the correct api in probe to enable runtime pm for this driver.
Additionally, do not just call legacy suspend for runtime_suspend,
as this duplicates some work the pci core does for you.

Signed-off-by: Kristen Carlson Accardi <kristen@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-04-01 16:49:05 +05:30
Lucas De Marchi
25985edced Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-31 11:26:23 -03:00
Coly Li
427cdf19b9 dma: use BUG_ON correctly in ppc4xx/adam.c, v4
This patch makes BUG_ON() usage correct in drivers/dma/ppc4xx/adam.c

Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Sean MacLennan <smaclennan@pikatech.com>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: Coly Li <bosong.ly@taobao.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-03-31 11:07:40 +05:30
Coly Li
7912d30007 dma: use BUG_ON correctly in mv_xor.c, v4
This patch makes BUG_ON() usage correct in drivers/dma/mv_xor.c

Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Coly Li <bosong.ly@taobao.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-03-31 11:07:40 +05:30
Coly Li
e2ec771a99 dma: use BUG_ON correctly in iop-adma.c, v4
This patch makes BUG_ON() usage correct in drivers/dma/iop-adma.c.

Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Coly Li <bosong.ly@taobao.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-03-31 11:07:40 +05:30
Viresh Kumar
84adccfb8c dmaengine/dw_dmac fix: dwc_scan_descriptors must compare first desc address also with llp
dwc_scan_descriptors scans all descriptors from active_list in case transfer is
not completed.  It compares first_desc->lli.llp, and then all childrens of its
tx_list. But it doesn't compare its own address, i.e. first_desc->txd.phys, as
this is what we have initially programmed into the controller register. So this
causes dma to stop and finish a transfer, which was never started. And thus
fail.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-03-31 11:07:31 +05:30
Yoshihiro Shimoda
ff7690b48a dma: shdma: add checking the DMAOR_AE in sh_dmae_err
The irq numbers of tranfer end and address error are assigned same number
on some CPU. So the sh_dmae_err() should check the AE flag in DMAOR.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-03-29 15:53:31 +09:00
Linus Torvalds
3a80e52486 Merge branch 'irq-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'irq-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  tile: Use generic show_interupts()
  tile: Convert to new irq function names
  dma: Ipu: Convert interupt code
2011-03-27 20:58:56 -07:00
Thomas Gleixner
6a03513825 dma: Ipu: Convert interupt code
Convert to the new irq chip functions and cleanup the name space.

[ Guennadi reported: irq_data_get_chip_data is undefined. Yes, I screwed up. 
 it needs to be irq_data_get_irq_chip_data ]

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Dan Williams <dan.j.williams@intel.com>
LKML-Reference: <alpine.LFD.2.00.1103251220000.31464@localhost6.localdomain6>
2011-03-25 22:09:00 +01:00
Andres Salomon
e46dccff34 mfd: mfd_cell is now implicitly available to timberdale drivers
The cell's platform_data is now accessed with a helper function;
change clients to use that, and remove the now-unused data_size.

Note that the mfd's platform_data is marked __devinitdata.  This
is still correct in all cases except for the timbgpio driver, whose
remove hook has been changed to no longer reference the pdata.

Signed-off-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2011-03-23 10:41:52 +01:00
Linus Torvalds
6447f55da9 Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (66 commits)
  avr32: at32ap700x: fix typo in DMA master configuration
  dmaengine/dmatest: Pass timeout via module params
  dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCs
  fsldma: make halt behave nicely on all supported controllers
  fsldma: reduce locking during descriptor cleanup
  fsldma: support async_tx dependencies and automatic unmapping
  fsldma: fix controller lockups
  fsldma: minor codingstyle and consistency fixes
  fsldma: improve link descriptor debugging
  fsldma: use channel name in printk output
  fsldma: move related helper functions near each other
  dmatest: fix automatic buffer unmap type
  drivers, pch_dma: Fix warning when CONFIG_PM=n.
  dmaengine/dw_dmac fix: use readl & writel instead of __raw_readl & __raw_writel
  avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize
  dw_dmac: Setting Default Burst length for transfers as 16.
  dw_dmac: Allow src/dst msize & flow controller to be configured at runtime
  dw_dmac: Changing type of src_master and dest_master to u8.
  dw_dmac: Pass Channel Priority from platform_data
  dw_dmac: Pass Channel Allocation Order from platform_data
  ...
2011-03-22 17:53:13 -07:00
Viresh Kumar
d42efe6bfb dmaengine/dmatest: Pass timeout via module params
When we try to test all channels present on our controller together, some
channels of lower priority may be very slow as compared to others. If number of
transfers is unlimited, some channels may timeout and will not finish within 3
seconds. Thus, while doing such regress testing we may need to have higher value
of timeouts. This patch adds support for passing timeout value via module
parameters. Default value is 3 msec, a negative value means max timeout
possible.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-03-22 11:12:29 -07:00
Uwe Kleine-König
5b9a4f98b2 dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCs
As a side effect this makes IMX_DMA selectable on i.MX21 again, because
the symbol ARCH_MX21 doesn't exist (MACH_MX21 would have been more correct).

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-03-22 11:11:20 -07:00
Linus Torvalds
a44f99c7ef Merge branch 'trivial' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6
* 'trivial' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6: (25 commits)
  video: change to new flag variable
  scsi: change to new flag variable
  rtc: change to new flag variable
  rapidio: change to new flag variable
  pps: change to new flag variable
  net: change to new flag variable
  misc: change to new flag variable
  message: change to new flag variable
  memstick: change to new flag variable
  isdn: change to new flag variable
  ieee802154: change to new flag variable
  ide: change to new flag variable
  hwmon: change to new flag variable
  dma: change to new flag variable
  char: change to new flag variable
  fs: change to new flag variable
  xtensa: change to new flag variable
  um: change to new flag variables
  s390: change to new flag variable
  mips: change to new flag variable
  ...

Fix up trivial conflict in drivers/hwmon/Makefile
2011-03-20 18:14:55 -07:00
Linus Torvalds
e16b396ce3 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (47 commits)
  doc: CONFIG_UNEVICTABLE_LRU doesn't exist anymore
  Update cpuset info & webiste for cgroups
  dcdbas: force SMI to happen when expected
  arch/arm/Kconfig: remove one to many l's in the word.
  asm-generic/user.h: Fix spelling in comment
  drm: fix printk typo 'sracth'
  Remove one to many n's in a word
  Documentation/filesystems/romfs.txt: fixing link to genromfs
  drivers:scsi Change printk typo initate -> initiate
  serial, pch uart: Remove duplicate inclusion of linux/pci.h header
  fs/eventpoll.c: fix spelling
  mm: Fix out-of-date comments which refers non-existent functions
  drm: Fix printk typo 'failled'
  coh901318.c: Change initate to initiate.
  mbox-db5500.c Change initate to initiate.
  edac: correct i82975x error-info reported
  edac: correct i82975x mci initialisation
  edac: correct commented info
  fs: update comments to point correct document
  target: remove duplicate include of target/target_core_device.h from drivers/target/target_core_hba.c
  ...

Trivial conflict in fs/eventpoll.c (spelling vs addition)
2011-03-18 10:37:40 -07:00