DMA drivers no longer need to be notified of dependency submission
events as async_tx_run_dependencies and async_tx_channel_switch will
handle the scheduling and execution of dependent operations.
[sfr@canb.auug.org.au: extend this for fsldma]
Acked-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Shrink struct dma_async_tx_descriptor and introduce
async_tx_channel_switch to properly inject a channel switch interrupt in
the descriptor stream. This simplifies the locking model as drivers no
longer need to handle dma_async_tx_descriptor.lock.
Acked-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Make PMP support optional by adding CONFIG_SATA_PMP and leaving out
libata-pmp.c if it isn't set. PMP helpers return constant values if
PMP support is not enabled and PMP declarations alias non-PMP
counterparts. This makes the compiler to leave out PMP related part
out and LLDs to use non-PMP counterparts automatically.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Implement helpers to test whether PMP is supported, attached and
determine pmp number to use when issuing SRST to a link. While at it,
move ata_is_host_link() so that it's together with the two new PMP
helpers.
This change simplifies LLDs and helps making PMP support optional.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Most of PMP support code is already in libata-pmp.c. All that are in
libata-core.c are sata_pmp_port_ops and EXPORTs. Move them to
libata-pmp.c. Also, collect PMP related prototypes and declarations
in header files and move them right above of SFF stuff.
This change is to make PMP support optional.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Now that SFF support is completely separated out from the core layer,
it can be made optional. Add CONFIG_ATA_SFF and let SFF drivers
depend on it. If CONFIG_ATA_SFF isn't set, all codes in libata-sff.c
and data structures for SFF support are disabled. This saves good
number of bytes for small systems.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Now that SFF assumptions are separated out from non-SFF reset
sequence, port_ops->sff_dev_select() is no longer necessary for
non-SFF controllers. Kill ata_noop_dev_select() and ->sff_dev_select
initialization from base and other non-SFF port_ops.
Signed-off-by: Tejun Heo <htejun@gmail.com>
ata_qc_complete_multiple() took @finish_qc and called it on every qc
before completing it. This was to give opportunity to update TF cache
before ata_qc_complete() tries to fill result_tf. Now that result TF
is a separate operation, this is no longer necessary.
Update sata_sil24, which was the only user of this mechanism, such
that it implements its own ops->qc_fill_rtf() and drop @finish_qc from
ata_qc_complete_multiple().
Signed-off-by: Tejun Heo <htejun@gmail.com>
On command completion, ata_qc_complete() directly called ops->tf_read
to fill qc->result_tf. This patch adds ops->qc_fill_rtf to replace
hardcoded ops->tf_read usage.
ata_sff_qc_fill_rtf() which uses ops->tf_read to fill result_tf is
implemented and set in ata_base_port_ops and other ops tables which
don't inherit from ata_base_port_ops, so this patch doesn't introduce
any behavior change.
ops->qc_fill_rtf() is similar to ops->sff_tf_read() but can only be
called when a command finishes. As some non-SFF controllers don't
have TF registers defined unless they're associated with in-flight
commands, this limited operation makes life easier for those drivers
and help lifting SFF assumptions from libata core layer.
Signed-off-by: Tejun Heo <htejun@gmail.com>
If PMP fan-out reset fails and SCR isn't accessible, PMP should be
reset. This used to be tested by sata_pmp_std_hardreset() and
communicated to EH by -ERESTART. However, this logic is generic and
doesn't really have much to do with specific hardreset implementation.
This patch moves SCR access failure detection logic to ata_eh_reset()
where it belongs. As this makes sata_pmp_std_hardreset() identical to
sata_std_hardreset(), the function is killed and replaced with the
standard method.
Signed-off-by: Tejun Heo <htejun@gmail.com>
SError used to be cleared in ->postreset. This has small hotplug race
condition. If a device is plugged in after reset is complete but
postreset hasn't run yet, its hotplug event gets lost when SError is
cleared. This patch makes sata_link_resume() clear SError. This
kills the race condition and makes a lot of sense as some PMP and host
PHYs don't work properly without SError cleared.
This change makes sata_pmp_std_{pre|post}_reset()'s unnecessary as
they become identical to ata_std counterparts. It also simplifies
sata_pmp_hardreset() and ahci_vt8251_hardreset().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Implement sata_std_hardreset(), which simply wraps around
sata_link_hardreset(). sata_std_hardreset() becomes new standard
hardreset method for sata_port_ops and sata_sff_hardreset() moves from
ata_base_port_ops to ata_sff_port_ops, which is where it really
belongs.
ata_is_builtin_hardreset() is added so that both
ata_std_error_handler() and ata_sff_error_handler() skip both builtin
hardresets if SCR isn't accessible.
piix_sidpr_hardreset() in ata_piix.c is identical to
sata_std_hardreset() in functionality and got replaced with the
standard function.
Signed-off-by: Tejun Heo <htejun@gmail.com>
sata_sff_hardreset() contains link readiness wait logic which isn't
SFF specific. Move that part into sata_link_hardreset(), which now
takes two more parameters - @online and @check_ready. Both are
optional. The former is out parameter for link onlineness after
reset. The latter is used to wait for link readiness after hardreset.
Users of sata_link_hardreset() is updated to use new funtionality and
ahci_hardreset() is updated to use sata_link_hardreset() instead of
sata_sff_hardreset(). This doesn't really cause any behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Factor out waiting logic (which is common to all ATA controllers) from
ata_sff_wait_ready() into ata_wait_ready(). ata_wait_ready() takes
@check_ready function pointer and uses it to poll for readiness. This
allows non-SFF controllers to use ata_wait_ready() to wait for link
readiness.
This patch also implements ata_wait_after_reset() - generic version of
ata_sff_wait_after_reset() - using ata_wait_ready().
ata_sff_wait_ready() is reimplemented using ata_wait_ready() and
ata_sff_check_ready(). Functionality remains the same.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Previously, post-softreset readiness is waited as follows.
1. ata_sff_wait_after_reset() waits for 150ms and then for
ATA_TMOUT_FF_WAIT if status is 0xff and other conditions meet.
2. ata_bus_softreset() finishes with -ENODEV if status is still 0xff.
If not, continue to #3.
3. ata_bus_post_reset() waits readiness of dev0 and/or dev1 depending
on devmask using ata_sff_wait_ready().
And for post-hardreset readiness,
1. ata_sff_wait_after_reset() waits for 150ms and then for
ATA_TMOUT_FF_WAIT if status is 0xff and other conditions meet.
2. sata_sff_hardreset waits for device readiness using
ata_sff_wait_ready().
This patch merges and unifies post-reset readiness waits into
ata_sff_wait_ready() and ata_sff_wait_after_reset().
ATA_TMOUT_FF_WAIT handling is merged into ata_sff_wait_ready(). If TF
status is 0xff, link status is unknown and the port is SATA, it will
continue polling till ATA_TMOUT_FF_WAIT.
ata_sff_wait_after_reset() is updated to perform the following steps.
1. waits for 150ms.
2. waits for dev0 readiness using ata_sff_wait_ready(). Note that
this is done regardless of devmask, as ata_sff_wait_ready() handles
0xff status correctly, this preserves the original behavior except
that it may wait longer after softreset if link is online but
status is 0xff. This behavior change is very unlikely to cause any
actual difference and is intended. It brings softreset behavior to
that of hardreset.
3. waits for dev1 readiness just the same way ata_bus_post_reset() did.
Now both soft and hard resets call ata_sff_wait_after_reset() after
reset to wait for readiness after resets. As
ata_sff_wait_after_reset() contains calls to ->sff_dev_select(),
explicit call near the end of sata_sff_hardreset() is removed.
This change makes reset implementation simpler and more consistent.
While at it, make the magical 150ms wait post-reset wait duration a
constant and ata_sff_wait_ready() and ata_sff_wait_after_reset() take
@link instead of @ap. This is to make them consistent with other
reset helpers and ease core changes.
pata_scc is updated accordingly.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Separate out generic ATA portion from ata_sff_postreset() into
ata_std_postreset() and implement ata_sff_postreset() using the std
version.
ata_base_port_ops now has ata_std_postreset() for its postreset and
ata_sff_port_ops overrides it to ata_sff_postreset().
This change affects pdc_adma, ahci, sata_fsl and sata_sil24. pdc_adma
now specifies postreset to ata_sff_postreset() explicitly. sata_fsl
and sata_sil24 now use ata_std_postreset() which makes no difference
to them. ahci now calls ata_std_postreset() from its own postreset
method, which causes no behavior difference.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Separate out generic ATA portion from ata_sff_prereset() into
ata_std_prereset() and implement ata_sff_prereset() using the std
version. Waiting for device readiness is the only SFF specific part.
ata_base_port_ops now has ata_std_prereset() for its prereset and
ata_sff_port_ops overrides it to ata_sff_prereset(). This change can
affect pdc_adma, ahci, sata_fsl and sata_sil24. pdc_adma implements
its own prereset using ata_sff_prereset() and the rest has hardreset
and thus are unaffected by this change.
This change reflects real world situation. There is no generic way to
wait for device readiness for non-SFF controllers and some of them
don't have any mechanism for that. Non-sff drivers which don't have
hardreset should wrap ata_std_prereset() and wait for device readiness
itself but there's no such driver now and isn't likely to be popular
in the future either.
Signed-off-by: Tejun Heo <htejun@gmail.com>
->sff_irq_clear() is called only from SFF interrupt handler, so there
is no reason to initialize it for non-SFF controllers. Also,
ata_sff_irq_clear() can handle both BMDMA and non-BMDMA SFF
controllers.
This patch kills ata_noop_irq_clear() and removes it from base
port_ops and sets ->sff_irq_clear to ata_sff_irq_clear() in sff
port_ops instead of bmdma port_ops.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Add sff_ prefix to SFF specific port ops.
This rename is in preparation of separating SFF support out of libata
core layer. This patch strictly renames ops and doesn't introduce any
behavior difference.
Signed-off-by: Tejun Heo <htejun@gmail.com>
SFF functions have confusing names. Some have sff prefix, some have
bmdma, some std, some pci and some none. Unify the naming by...
* SFF functions which are common to both BMDMA and non-BMDMA are
prefixed with ata_sff_.
* SFF functions which are specific to BMDMA are prefixed with
ata_bmdma_.
* SFF functions which are specific to PCI but apply to both BMDMA and
non-BMDMA are prefixed with ata_pci_sff_.
* SFF functions which are specific to PCI and BMDMA are prefixed with
ata_pci_bmdma_.
* Drop generic prefixes from LLD specific routines. For example,
bfin_std_dev_select -> bfin_dev_select.
The following renames are noteworthy.
ata_qc_issue_prot() -> ata_sff_qc_issue()
ata_pci_default_filter() -> ata_bmdma_mode_filter()
ata_dev_try_classify() -> ata_sff_dev_classify()
This rename is in preparation of separating SFF support out of libata
core layer. This patch strictly renames functions and doesn't
introduce any behavior difference.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Currently whether a command should be retried after failure is
determined inside ata_eh_finish(). Add ATA_QCFLAG_RETRY and move the
logic into ata_eh_autopsy(). This makes things clearer and helps
extending retry determination logic.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
ata_chk_status() just calls ops->check_status and it only adds
confusion with other status functions. Kill it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
ata_pci_default_filter() doesn't really have anything to do with PCI.
It's generally applicable to BMDMA controllers. Move it out of
CONFIG_PCI.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
* Move SFF related functions from libata-core.c to libata-sff.c.
ata_[bmdma_]sff_port_ops, ata_devchk(), ata_dev_try_classify(),
ata_std_dev_select(), ata_tf_to_host(), ata_busy_sleep(),
ata_wait_after_reset(), ata_wait_ready(), ata_bus_post_reset(),
ata_bus_softreset(), ata_bus_reset(), ata_std_softreset(),
sata_std_hardreset(), ata_fill_sg(), ata_fill_sg_dumb(),
ata_qc_prep(), ata_dump_qc_prep(), ata_data_xfer(),
ata_data_xfer_noirq(), ata_pio_sector(), ata_pio_sectors(),
atapi_send_cdb(), __atapi_pio_bytes(), atapi_pio_bytes(),
ata_hsm_ok_in_wq(), ata_hsm_qc_complete(), ata_hsm_move(),
ata_pio_task(), ata_qc_issue_prot(), ata_host_intr(),
ata_interrupt(), ata_std_ports()
* Make ata_pio_queue_task() global as it's now called from
libata-sff.c.
* Move SFF related stuff in include/linux/libata.h and
drivers/ata/libata.h into one place. While at it, move timing
constants into the global enum definition and fortify comments a
bit.
This patch strictly moves stuff around and as such doesn't cause any
functional difference.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Currently reset methods are not specified directly in the
ata_port_operations table. If a LLD wants to use custom reset
methods, it should construct and use a error_handler which uses those
reset methods. It's done this way for two reasons.
First, the ops table already contained too many methods and adding
four more of them would noticeably increase the amount of necessary
boilerplate code all over low level drivers.
Second, as ->error_handler uses those reset methods, it can get
confusing. ie. By overriding ->error_handler, those reset ops can be
made useless making layering a bit hazy.
Now that ops table uses inheritance, the first problem doesn't exist
anymore. The second isn't completely solved but is relieved by
providing default values - most drivers can just override what it has
implemented and don't have to concern itself about higher level
callbacks. In fact, there currently is no driver which actually
modifies error handling behavior. Drivers which override
->error_handler just wraps the standard error handler only to prepare
the controller for EH. I don't think making ops layering strict has
any noticeable benefit.
This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and
their PMP counterparts propoer ops. Default ops are provided in the
base ops tables and drivers are converted to override individual reset
methods instead of creating custom error_handler.
* ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs
aren't accessible. sata_promise doesn't need to use separate
error_handlers for PATA and SATA anymore.
* softreset is broken for sata_inic162x and sata_sx4. As libata now
always prefers hardreset, this doesn't really matter but the ops are
forced to NULL using ATA_OP_NULL for documentation purpose.
* pata_hpt374 needs to use different prereset for the first and second
PCI functions. This used to be done by branching from
hpt374_error_handler(). The proper way to do this is to use
separate ops and port_info tables for each function. Converted.
Signed-off-by: Tejun Heo <htejun@gmail.com>
libata core layer doesn't care about sht or ->irq_handler. Those are
only of interest to the LLD during initialization. This is confusing
and has caused several drivers to have duplicate unused initializers
for these fields.
Currently only sata_nv uses these fields. Make sata_nv use
->private_data, which is supposed to carry LLD-specific information,
instead and kill ->sht and ->irq_handler. nv_pi_priv structure is
defined and struct literals are used to initialize private_data.
Notational overhead is negligible.
Signed-off-by: Tejun Heo <htejun@gmail.com>
port_info->private_data is currently used for two purposes - to record
private data about the port_info or to specify host->private_data to
use when allocating ata_host.
This overloading is confusing and counter-intuitive in that
port_info->private_data becomes host->private_data instead of
port->private_data. In addition, port_info and host don't correspond
to each other 1-to-1. Currently, the first non-NULL
port_info->private_data is used.
This patch makes port_info->private_data just be what it is -
private_data for the port_info where LLD can jot down extra info.
libata no longer sets host->private_data to the first non-NULL
port_info->private_data, @host_priv argument is added to
ata_pci_init_one() instead. LLDs which use ata_pci_init_one() can use
this argument to pass in pointer to host private data. LLDs which
don't should use init-register model anyway and can initialize
host->private_data directly.
Adding @host_priv instead of using init-register model for LLDs which
use ata_pci_init_one() is suggested by Alan Cox.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
ata_pci_init_one() is the only function which uses ops->irq_handler
and pi->sht. Other initialization functions take the same information
as arguments. This causes confusion and duplicate unused entries in
structures.
Make ata_pci_init_one() take sht as an argument and use ata_interrupt
implicitly. All current users use ata_interrupt and if different irq
handler is necessary open coding ata_pci_init_one() using
ata_prepare_sff_host() and ata_activate_sff_host can be done under ten
lines including error handling and driver which requires custom
interrupt handler is likely to require custom initialization anyway.
As ata_pci_init_one() was the last user of ops->irq_handler, this
patch also kills the field.
Signed-off-by: Tejun Heo <htejun@gmail.com>
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
libata lets low level drivers build scsi_host_template and register it
to the SCSI layer. This allows low level drivers high level of
flexibility but also burdens them with lots of boilerplate entries.
This patch implements SHT initializers which can be used to initialize
all the boilerplate entries in a sht. Three variants of them are
implemented - BASE, BMDMA and NCQ - for different types of drivers.
Note that entries can be overriden by putting individual initializers
after the helper macro.
All sht tables are identical before and after this patch.
Signed-off-by: Tejun Heo <htejun@gmail.com>
->irq_clear() is used to clear IRQ bit of a SFF controller and isn't
useful for drivers which don't use libata SFF HSM implementation.
However, it's a required callback and many drivers implement their own
noop version as placeholder. This patch implements ata_noop_irq_clear
and use it to replace those custom placeholders.
Also, SFF drivers which don't support BMDMA don't need to use
ata_bmdma_irq_clear(). It becomes noop if BMDMA address isn't
initialized. Convert them to use ata_noop_irq_clear().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Over the time, ops in ata_port_operations has become a bit confusing.
Reorganize. SFF/BMDMA ops are separated into separate a group as they
will be taken out of ata_port_operations later.
Signed-off-by: Tejun Heo <htejun@gmail.com>
ata_ehi_schedule_probe() was created to hide details of link-resuming
reset magic. Now that all the softreset workarounds are gone,
scheduling probe is very simple - set probe_mask and request RESET.
Kill ata_ehi_schedule_probe() and open code it. This also increases
consistency as ata_ehi_schedule_probe() couldn't cover individual
device probings so they were open-coded even when the helper existed.
While at it, define ATA_ALL_DEVICES as mask of all possible devices on
a link and always use it when requesting probe on link level for
simplicity and consistency. Setting extra bits in the probe_mask
doesn't hurt anybody.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Some controllers can't reliably record the initial D2H FIS after SATA
link is brought online for whatever reason. Advanced controllers
which don't have traditional TF register based interface often have
this problem as they don't really have the TF registers to update
while the controller and link are being initialized.
SKIP_D2H_BSY works around the problem by skipping the wait for device
readiness before issuing SRST, so for such controllers libata issues
SRST blindly and hopes for the best.
Now that libata defaults to hardreset, this workaround is no longer
necessary. For controllers which have support for hardreset, SRST is
never issued by itself. It is only issued as follow-up SRST for
device classification and PMP initialization, so there's no need to
wait for it from prereset.
Kill ATA_LFLAG_SKIP_D2H_BSY.
Signed-off-by: Tejun Heo <htejun@gmail.com>
ATA_EHI_RESUME_LINK has two functions - promote reset to hardreset if
ATA_LFLAG_HRST_TO_RESUME is set and preventing EH from shortcutting
reset action when probing is requested. The former is gone now and
the latter can easily be achieved by making EH to perform at least one
reset if reset is requested, which also makes more sense than
depending on RESUME_LINK flag.
As ATA_EHI_RESUME_LINK was the only EHI reset modifier, this also
kills reset modifier handling.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Now that hardreset is the preferred method of resetting, there's no
need for ATA_LFLAG_HRST_TO_RESUME flag. Kill it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
When both soft and hard resets are available, libata preferred
softreset till now. The logic behind it was to be softer to devices;
however, this doesn't really help much. Rationales for the change:
* BIOS may freeze lock certain things during boot and softreset can't
unlock those. This by itself is okay but during operation PHY event
or other error conditions can trigger hardreset and the device may
end up with different configuration.
For example, after a hardreset, previously unlockable HPA can be
unlocked resulting in different device size and thus revalidation
failure. Similar condition can occur during or after resume.
* Certain ATAPI devices require hardreset to recover after certain
error conditions. On PATA, this is done by issuing the DEVICE RESET
command. On SATA, COMRESET has equivalent effect. The problem is
that DEVICE RESET needs its own execution protocol.
For SFF controllers with bare TF access, it can be easily
implemented but more advanced controllers (e.g. ahci and sata_sil24)
require specialized implementations. Simply using hardreset solves
the problem nicely.
* COMRESET initialization sequence is the norm in SATA land and many
SATA devices don't work properly if only SRST is used. For example,
some PMPs behave this way and libata works around by always issuing
hardreset if the host supports PMP.
Like the above example, libata has developed a number of mechanisms
aiming to promote softreset to hardreset if softreset is not going
to work. This approach is time consuming and error prone.
Also, note that, dependingon how you read the specs, it could be
argued that PMP fan-out ports require COMRESET to start operation.
In fact, all the PMPs on the market except one don't work properly
if COMRESET is not issued to fan-out ports after PMP reset.
* COMRESET is an integral part of SATA connection and any working
device should be able to handle COMRESET properly. After all, it's
the way to signal hardreset during reboot. This is the most used
and recommended (at least by the ahci spec) method of resetting
devices.
So, this patch makes libata prefer hardreset over softreset by making
the following changes.
* Rename ATA_EH_RESET_MASK to ATA_EH_RESET and use it whereever
ATA_EH_{SOFT|HARD}RESET used to be used. ATA_EH_{SOFT|HARD}RESET is
now only used to tell prereset whether soft or hard reset will be
issued.
* Strip out now unneeded promote-to-hardreset logics from
ata_eh_reset(), ata_std_prereset(), sata_pmp_std_prereset() and
other places.
Signed-off-by: Tejun Heo <htejun@gmail.com>
We were already doing what amounts to a get_phy_id from within
get_phy_device, and rather than duplicate this for the TBIPA
probing, we might as well just factor it out and make it available
instead.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
In order to not trip the clocksource watchdog, kgdb must touch the
clocksource watchdog on the return to normal system run state.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch fixes the hang regression with kgdb when the NMI interrupt
comes in while the master core is returning from an exception.
Adjust the NMI logic such that KGDB will not stop NMI exceptions from
occurring by in general returning NOTIFY_DONE. It is not possible to
distinguish the debug NMI sync vs the normal NMI apic interrupt so
kgdb needs to catch the unknown NMI if it the debugger was previously
active on one of the cpus.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
simplified and streamlined kgdb support on x86, both 32-bit and 64-bit,
based on patch from:
Subject: kgdb: core-lite
From: Jason Wessel <jason.wessel@windriver.com>
[ and countless other authors - see the patch for details. ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
polled console handling support, to access a console in an irq-less
way while in debug or irq context.
absolutely zero impact as long as CONFIG_CONSOLE_POLL is disabled.
(which is the default)
[ jan.kiszka@siemens.com: lots of cleanups ]
[ mingo@elte.hu: redesign, splitups, cleanups. ]
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
kgdb core code. Handles the protocol and the arch details.
[ mingo@elte.hu: heavily modified, simplified and cleaned up. ]
[ xemul@openvz.org: use find_task_by_pid_ns ]
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
add probe_kernel_read() and probe_kernel_write().
Uninlined and restricted to kernel range memory only, as suggested
by Linus.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Move wakeup code to .c, so that video mode setting code can be shared
between boot and wakeup. Remove nasty assembly code in 64-bit case by
re-using trampoline code. Stack setup was fixed to clear high 16bits
of %esp, maybe that fixes some machines.
.c code sharing and morse code was done H. Peter Anvin, Sam Ravnborg
reviewed kbuild related stuff, and it seems okay to him. Rafael did
some cleanups.
[rjw:
* Made the patch stop breaking compilation on x86-32
* Added arch/x86/kernel/acpi/sleep.h
* Got rid of compiler warnings in arch/x86/kernel/acpi/sleep.c
* Fixed 32-bit compilation on x86-64 systems
* Added include/asm-x86/trampoline.h and fixed the non-SMP
compilation on 64-bit x86
* Removed arch/x86/kernel/acpi/sleep_32.c which was not used
* Fixed some breakage caused by the integration of smpboot.c done
under us in the meantime]
Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Cleanup references to the early cpu maps for the non-SMP configuration
and remove some functions called for SMP configurations only.
Cc: Andi Kleen <ak@suse.de>
Cc: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
UV supports really big systems. So big, in fact, that the APICID register
does not contain enough bits to contain an APICID that is unique across all
cpus.
The UV BIOS supports 3 APICID modes:
- legacy mode. This mode uses the old APIC mode where
APICID is in bits [31:24] of the APICID register.
- x2apic mode. This mode is whitebox-compatible. APICIDs
are unique across all cpus. Standard x2apic APIC operations
(Intel-defined) can be used for IPIs. The node identifier
fits within the Intel-defined portion of the APICID register.
- x2apic-uv mode. In this mode, the APICIDs on each node have
unique IDs, but IDs on different node are not unique. For example,
if each mode has 32 cpus, the APICIDs on each node might be
0 - 31. Every node has the same set of IDs.
The UV hub is used to route IPIs/interrupts to the correct node.
Traditional APIC operations WILL NOT WORK.
In x2apic-uv mode, the ACPI tables all contain a full unique ID (note:
exact bit layout still changing but the following is close):
nnnnnnnnnnlc0cch
n = unique node number
l = socket number on board
c = core
h = hyperthread
Only the "lc0cch" bits are written to the APICID register. The remaining bits are
supplied by having the get_apic_id() function "OR" the extra bits into the value
read from the APICID register. (Hmmm.. why not keep the ENTIRE APICID register
in per-cpu data....)
The x2apic-uv mode is recognized by the MADT table containing:
oem_id = "SGI"
oem_table_id = "UV-X"
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Add UV macros for converting between cpu numbers, blade numbers
and node numbers. Note that these are used ONLY within x86_64 UV
modules, and are not for general kernel use.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Definitions of UV MMRs.
Note: this file is auto-generated by hardware design tools.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Increase the number of bits in an apicid from 8 to 32.
By default, MP_processor_info() gets the APICID from the
mpc_config_processor structure. However, this structure limits
the size of APICID to 8 bits. This patch allows the caller of
MP_processor_info() to optionally pass a larger APICID that will
be used instead of the one in the mpc_config_processor struct.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Add functions that can be used to determine if an x86_64
system is a SGI "UV" system. UV systems come in 3 types and
are identified by the OEM ID in the MADT.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Introduce a function to read the local APIC_ID.
This change is in preparation for additional changes to
the APICID functions that will come in a later patch.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch renames VM_MASK to X86_VM_MASK (which
in turn defined as alias to X86_EFLAGS_VM) to better
distinguish from virtual memory flags. We can't just
use X86_EFLAGS_VM instead because it is also used
for conditional compilation
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
A 1G section size makes memory hotplug too coarse in a virtual
environment. Retuce it by a factor of 2 to 512M. I would have liked
to make it smaller, but it runs out of reserved flags in the page flags.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: Yasunori Goto <y-goto@jp.fujitsu.com>
Cc: Christoph Lameter <clameter@sgi.com>
Cc: Dave Hansen <dave@linux.vnet.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Merge what's left from smp_32.h and smp_64.h into smp.h
By now, they're basically extern definitions.
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
we merge everything that is inside CONFIG_SMP
to smp.h. They differ a little bit, so we use
CONFIG_X86_32_SMP and CONFIG_X86_64_SMP as markers.
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This implementation in x86_64 is clean and consistent, but we
sacrifice it for the sake of being equal to i386 (since the other
way around would be harder).
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Although those constants are always defined in x86_64,
and will have the effect of just including the headers
in the very way we did before, I'm doing this in a separate
patch to be conservative and avoid surprises.
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
The code is now the same between i386 and x86_64. We already
know what happens when it reaches this point: They go away
from the arch-specific headers, and suddenly appears in the common
header.
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
We provide a bogus macro for x86_64 in case CONFIG_X86_LOCAL_APIC
is not set. It will always be set for x86_64, so the effect
is just to make the code equal to i386.
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
APIC_DEFINITION is not defined in x86_64, so in practice, we keep
our old code here. But as a nice side effect, the code is now
equal to smp_32.h.
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
The new cacheflush.h API's didn't have any comments describing
how they're to be used yet and the conventions around these functions.
This patch adds comments to this effect; in order for that to be
a logical series, some prototypes had to move around.
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Using a naked parameterless macro could lead to other tokens being
unexpectedly replaced.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
When compilers became generally better at optimizing code than humans, the
register keyword became mostly useless. For the floppy driver it certainly
is since it's so slow compared to the rest of the system that optimizing
access to a single variable or two isn't going to make any real difference
So let's just leave it to the compiler - it'll do a better job anyway.
This patch does away with a few register keywords in the x86 floppy driver.
Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
On AMD SMM protected memory is part of the address map, but handled
internally like an MTRR. That leads to large pages getting split
internally which has some performance implications. Check for the
AMD TSEG MSR and split the large page mapping on that area
explicitely if it is part of the direct mapping.
There is also SMM ASEG, but it is in the first 1MB and already covered by
the earlier split first page patch.
Idea for this came from an earlier patch by Andreas Herrmann
On a RevF dual Socket Opteron system kernbench shows a clear
improvement from this:
(together with the earlier patches in this series, especially the
split first 2MB patch)
[lower is better]
no split stddev split stddev delta
Elapsed Time 87.146 (0.727516) 84.296 (1.09098) -3.2%
User Time 274.537 (4.05226) 273.692 (3.34344) -0.3%
System Time 34.907 (0.42492) 34.508 (0.26832) -1.1%
Percent CPU 322.5 (38.3007) 326.5 (44.5128) +1.2%
=> About 3.2% improvement in elapsed time for kernbench.
With GB pages on AMD Fam1h the impact of splitting is much higher of course,
since it would split two full GB pages (together with the first
1MB split patch) instead of two 2MB pages. I could not benchmark
a clear difference in kernbench on gbpages, so I kept it disabled
for that case
That was only limited benchmarking of course, so if someone
was interested in running more tests for the gbpages case
that could be revisited (contributions welcome)
I didn't bother implementing this for 32bit because it is very
unlikely the 32bit lowmem mapping overlaps into the TSEG near 4GB
and the 2MB low split is already handled for both.
[ mingo@elte.hu: do it on gbpages kernels too, there's no clear reason
why it shouldnt help there. ]
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: andreas.herrmann3@amd.com
Cc: mingo@elte.hu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
RDMSR for 64bit values with exception handling.
Makes it easier to deal with 64bit valued MSRs. The old 64bit code
base had that too as checking_rdmsrl(), but it got dropped somehow.
Signed-off-by: Andi Kleen <andi@firstfloor.org>
Cc: andreas.herrmann3@amd.com
Cc: mingo@elte.hu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Add a new function to force split large pages into 4k pages.
This is needed for some followup optimizations.
I had to add a new field to cpa_data to pass down the information
that try_preserve_large_page should not run.
Right now no set_page_4k() because I didn't need it and all the
specialized users I have in mind would be more comfortable with
pure addresses. I also didn't export it because it's unlikely
external code needs it.
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: andreas.herrmann3@amd.com
Cc: mingo@elte.hu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
When end_pfn is not aligned to 2MB (or 1GB) then the kernel might
map more memory than end_pfn. Account this in max_pfn_mapped.
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: andreas.herrmann3@amd.com
Cc: mingo@elte.hu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Even on 32bit 2MB pages can map more memory than is in the true
max_low_pfn if end_pfn is not highmem and not aligned to 2MB.
Add a end_pfn_map similar to x86-64 that accounts for this
fact. This is important for code that really needs to know about
all mapping aliases.
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: andreas.herrmann3@amd.com
Cc: mingo@elte.hu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
All of early setup runs with interrupts disabled, so there is no
need to set up early exception handlers for vectors >= 32
This saves some minor text size.
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: mingo@elte.hu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Some of pde bits weren't documented, add the short description to them.
Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
