Commit Graph

55 Commits (cdee99d7461d928815db6219fb14d37f99241d44)

Author SHA1 Message Date
David S. Miller 221b2fb818 [SPARC64]: Don't expect cfg space in PCI PBM ranges on SUN4V.
PCI cfg space is accessed transparently through the Hypervisor and not
through direct cpu PIO operations.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 01:12:30 -08:00
David S. Miller 1839794464 [SPARC64]: First cut at SUN4V PCI IOMMU handling.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 01:12:15 -08:00
David S. Miller 7eae642f75 [SPARC64]: Implement SUN4V PCI config space access.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 01:12:12 -08:00
David S. Miller bade562216 [SPARC64]: More SUN4V PCI controller work.
Add assembler file for PCI hypervisor calls.
Setup basic skeleton of SUN4V PCI controller driver.

Add 32-bit devhandle to PBM struct, as this is needed for
hypervisor calls.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 01:12:11 -08:00
David S. Miller 8f6a93a196 [SPARC64]: Beginnings of SUN4V PCI controller support.
Abstract out IOMMU operations so that we can have a different
set of calls on sun4v, which needs to do things through
hypervisor calls.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-20 01:12:10 -08:00