Commit graph

4 commits

Author SHA1 Message Date
Olof Johansson
dee4718330 ARM: tegra: fuse: add bct strapping reading
This is used by the memory setup code to pick the right memory
timing table, if needed.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:24:59 -08:00
Olof Johansson
9a1086da34 ARM: tegra: fuse: add functions to access chip revision
Add function to get chip revision, and print it out at boot time.

Restructure the fuse access to just use cached variables instead
of always reading the fuses, and export those variables directly
instead of using accessor functions.

Add a SKU ID table of currently known values.

Based on code originally by Colin Cross <ccross@android.com>.

Changes since v1:

* Add A01 minor rev support
* Don't decode for A03p on anything but T2x

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-02-06 18:24:59 -08:00
Olof Johansson
d262f49d10 ARM: tegra: fuse: use apbio dma for register access
Use the apbio dma functions for accessing the fuse registers.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:24:58 -08:00
Colin Cross
73625e3e2e [ARM] tegra: Add support for reading fuses
The Tegra SOC contains fuses to identify the CPU type and
bin, and a unique id.  The CPU info is required to determine
the correct voltages for each cpu and core frequency.

Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21 18:12:09 -07:00