Commit graph

15 commits

Author SHA1 Message Date
Rupjyoti Sarmah
3fb7933850 powerpc/4xx: Adding PCIe MSI support
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex.

Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com>
Signed-off-by: Tirumala R Marri <tmarri@apm.com>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-26 15:00:37 +10:00
Stefan Roese
499f49026e powerpc/44x: Add reset-type to katmai.dts
Katmai needs "reset-type" = "chip reset" (2) to correctly reboot the
board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-05-07 15:07:29 -04:00
Stefan Roese
036f290d89 powerpc/44x: Add MTD support (NOR FLASH) to Katmai dts
This patch adds NOR FLASH MTD support to the Katmai (440SPe) dts file.
For this the OPB ranges address is mapped differently (base 0x00000000
-> 0xe0000000). This results in the address being identical to the lower
32bit of its physical address. This is needed for the MTD mapping to work
correctly, since U-Boot will insert the physical addresses of the EBC
chip selects into the EBC ranges property. This is the way its done in
most other 4xx dts files as well.

Additionally with a small whitespace cleanup.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10 08:21:15 -05:00
Anatolij Gustschin
070bae1fb0 powerpc/44x: Extend Katmai dts for ADMA and RAID56 support
Add nodes for PPC440SPe DMA, I2O, XOR engines and Memory
Queue module which are used in the updated PPC440SPe ADMA
driver. Also extend plb ranges property to specify address
ranges for DMA0/1 and I2O engines.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2009-12-11 09:51:42 -05:00
pbathija@amcc.com
2e991cfa9b powerpc/44x: Fix DMA ranges in DTS file for Katmai board.
Set PCI-E node inbound DMA ranges size to 4GB for correct boot up of Katmai.

Signed-off-by: Pravin Bathija <pbathija@amcc.com>
Acked-by: Feng Kan <fkan@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Acked-by: Loc Ho <lho@amcc.com>
Acked-by: Tirumala Reddy Marri <tmarri@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2009-12-04 07:01:54 -05:00
Stefan Roese
59e1d4952d powerpc/44x: Enable 64bit (>= 4GB) memory size in Katmai dts
Additionally to increasing #size-cells to in the root node, we also
need to explicitly define the ranges property in the plb node, because
of the different #size-cells between child and parent.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2009-11-04 09:32:44 -05:00
Grant Erickson
05781ccd74 ibm_newemac: Parameterize EMAC Multicast Match Handling
Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.

As the driver stands today, it assumes that all EMACs have 4 IAHT and
GAHT 32-bit registers, starting at offset 0x30 from the register base,
with only 16-bits of each used for a total of 64 match slots.

The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4
core. This core has 8 IAHT and GAHT registers, starting at offset 0x80
from the register base, with ALL 32-bits of each used for a total of
256 match slots.

This adds a new compatible device tree entry "emac4sync" and a new,
related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros
and inlines which supply the appropriate parameterized value based on
the presence or absence of the EMAC4SYNC feature.

The code has further been reworked where appropriate to use those macros
and inlines.

In addition, the register size passed to ioremap is now taken from the
device tree:

	c4 for EMAC4SYNC cores
	74 for EMAC4 cores
	70 for EMAC cores

rather than sizeof (emac_regs).

Finally, the device trees have been updated with the appropriate compatible
entries and resource sizes.

This has been tested on an AMCC Haleakala board such that: 1) inbound
ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11
and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from
'haleakala.local' to those same systems in the '.local' domain via MDNS
now work.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-07-09 16:30:46 +10:00
David Gibson
71f349799b [POWERPC] Convert remaining dts-v0 files to v1
At the moment we have a mixture of left-over version 0 and new-format
version 1 files in arch/powerpc/boot/dts.  This is potentially
confusing to people new to the dts format attempting to figure it out.

So, this patch converts all the as-yet unconverted dts v0 files and
converts them to v1.  They're mechanically-converted, and not hand
tweaked so in some cases they're not 100% in keeping with usual v1
style, but the convertor program does have some heuristics so the
discrepancies aren't too bad.

I have checked that this patch produces no changes to the resulting
dtb binaries.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-05-29 07:06:56 -05:00
Stefan Roese
9d7030be33 [POWERPC] 4xx: Change dts files to support jumbo frames
This patch changes the "max-frame-size" property to 9000 for all gbit
enabled 4xx boards. All those ports generally support jumbo frames, so
let's give the user a chance to enable it.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-04-05 09:32:37 -05:00
Stefan Roese
3db3ba0347 [POWERPC] 4xx: Fix L1 cache size in katmai DTS
This patch changes the katmai (440SPe) L1 cache size to 32k. Some
whitespace issues are cleaned up too.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-02-27 09:47:11 -06:00
Stefan Roese
e563db977f [POWERPC] 4xx: Remove "i2c" and "xxmii-interface" device_types from dts
Remove all "i2c" and "xxmii-interface" (rgmii etc) device_type entries
from the 4xx dts files.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-02-15 21:35:30 -06:00
Stefan Roese
8aaed98c1e [POWERPC] 4xx: Add aliases node to 4xx dts files
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:36:30 -06:00
Josh Boyer
72fda1148e [POWERPC] 4xx: Rename CPU nodes to avoid dtc incompatibility
Recent DTC versions disallow certain special characters in full paths without
being quoted with {}.  That however breaks compatibility with older DTC
versions.  Work around this by renaming the CPU nodes for the 4xx files to a
generic node name, and specify the processor type in the model property of the
CPU node.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:33:47 -06:00
Stefan Roese
accf5ef254 [POWERPC] 4xx: Add 440SPe revA runtime detection to PCIe
This patch adds runtime detection of the 440SPe revision A chips. These
chips are equipped with a slighly different PCIe core and need special/
different initialization. The compatible node is changed to
"plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that
can be equipped with both PPC revisions like the AMCC Yucca.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:19:03 -06:00
Benjamin Herrenschmidt
3de9c9cd22 [POWERPC] 4xx: Base support for 440SPe "Katmai" eval board
This adds base support for the Katmai board, including PCI-X and
PCI-Express (but no RTC, nvram, etc... yet).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:14:57 -06:00