Commit graph

6823 commits

Author SHA1 Message Date
Mark Maule
10083072bf [PATCH] PCI: per-platform IA64_{FIRST,LAST}_DEVICE_VECTOR definitions
Abstract IA64_FIRST_DEVICE_VECTOR/IA64_LAST_DEVICE_VECTOR since SN platforms
use a subset of the IA64 range.  Implement this by making the above macros
global variables which the platform can override in it setup code.

Also add a reserve_irq_vector() routine used by SN to mark a vector's as
in-use when that weren't allocated through assign_irq_vector().

Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-06-21 11:59:59 -07:00
Kelly Daly
2191fe3e39 [POWERPC] re-enable OProfile for iSeries, using timer interrupt
This patch removes the changes from an earlier patch that disables
oProfile for iSeries within the oProfile KConfig (submitted Feb 23,
2006).  Checks within the arch init for iSeries, still allowing profiling
for timer interrupts (using firmware_has_feature).

Signed-off-by: Kelly Daly <kelly@au.ibm.com>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:33 +10:00
Anton Blanchard
0bb474a48e [POWERPC] support ibm,extended-*-frequency properties
Support the ibm,extended-*-frequency properties found in recent POWER5
firmware:

cpus/PowerPC,POWER5@0/clock-frequency
                 59aa5880 (1504336000)
cpus/PowerPC,POWER5@0/ibm,extended-clock-frequency
                 00000000 59aa5880
cpus/PowerPC,POWER5@0/timebase-frequency
                 0b354b10 (188042000)
cpus/PowerPC,POWER5@0/ibm,extended-timebase-frequency
                 00000000 0b354b10

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:33 +10:00
Nathan Lynch
ccba051c37 [POWERPC] Extra sanity check in EEH code
Don't dereference a device node that isn't there.  A "shouldn't
happen" case, but someone ran into it with a possibly misconfigured
device tree.

Signed-off-by: Nathan Lynch <ntl@pobox.com>
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:33 +10:00
Anton Blanchard
d3c58fb177 [POWERPC] Dont look for class-code in pci children
Looking for class-code in PCI children breaks with direct slots. Lets
just count all children.

Signed-off-by: Anton Blanchard <anton@samba.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:33 +10:00
Andreas Schwab
72abd54035 [POWERPC] Unify ppc syscall tables
Avoid duplication of the syscall table for the cell platform.  Based on an
idea from David Woodhouse.

Signed-off-by: Andreas Schwab <schwab@suse.de>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:32 +10:00
Mark A. Greer
868ea0c925 [POWERPC] mpic: add support for serial mode interrupts
On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> >
> > This patch adds the software support for that mode.
>
> You hard code the clock ratio... why not add a separate call to be
> called after mpic_init,
> something like mpic_set_serial_int(int mpic, int enable, int
> clock_ratio) ?

How's this?
--

MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.

This patch adds the software support for that mode.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--

 arch/powerpc/sysdev/mpic.c |   20 ++++++++++++++++++++
 include/asm-powerpc/mpic.h |   10 ++++++++++
 2 files changed, 30 insertions(+)
--
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:32 +10:00
Linas Vepstas
0aa8d15b01 [POWERPC] pseries: Print PCI slot location code on failure
The PCI error recovery code will printk diagnostic info when
a PCI error event occurs. Change the messages to include the slot
location code, which is how most sysadmins will know the device.

Signed-off-by: Linas Vepstas <linas@austin.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:32 +10:00
arnd@arndb.de
379507181a [POWERPC] spufs: one more fix for 64k pages
The SPU context save/restore code is currently built
for a 4k page size and we provide a _shipped version
of it since most people don't have the spu toolchain
that is needed to rebuild that code.

This patch hardcodes the data structures to a 64k
page alignment, which also guarantees 4k alignment
but unfortunately wastes 60k of memory per SPU
context that is created in the running system.

We will follow up on this with another patch to
reduce that overhead or maybe redo the context
save/restore logic to do this part entirely different,
but for now it should make experimental systems
work with either page size.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:32 +10:00
arnd@arndb.de
c983294872 [POWERPC] spufs: fail spu_create with invalid flags
At this time, all flags are invalid. Since we are
planning to actually add valid flags in the future,
we better check if any were passed by the user.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:32 +10:00
Masato Noguchi
ba723fe2b2 [POWERPC] spufs: clear class2 interrupt status before wakeup
SPU interrupt status must be cleared before handle it.
Otherwise, kernel may drop some interrupt packet.

Currently, class2 interrupt treated like:
 1) call callback to wake up waiting process
 2) mask raised mailbox interrupt
 3) clear interrupt status

I changed like:
 1) mask raised mailbox interrupt
 2) clear interrupt status
 3) call callback to wake up waiting process

Clearing status before masking will make spurious interrupt.
Thus, it is necessary to hold by steps I described above, I think.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:32 +10:00
Masato Noguchi
6e18b27bd0 [POWERPC] spufs: fix Makefile for "make clean"
added spu_{save,restore}_dump.h to target of 'make clean'

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:31 +10:00
Masato Noguchi
2eabbbd33e [POWERPC] spufs: remove stop_code from struct spu
This patch remove 'stop_code' -- discarded member of struct spu.
It is written at initialize and interrupt, but never read
in current implementation.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:31 +10:00
Geoff Levand
a91942ae7e [POWERPC] spufs: fix spu irq affinity setting
This changes the hypervisor abstraction of setting cpu affinity to a
higher level to avoid platform dependent interrupt controller
routines.  I replaced spu_priv1_ops:spu_int_route_set() with a
new routine spu_priv1_ops:spu_cpu_affinity_set().

As a by-product, this change eliminated what looked like an
existing bug in the set affinity code where spu_int_route_set()
mistakenly called int_stat_get().

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:31 +10:00
Geoff Levand
540270d82d [POWERPC] spufs: further abstract priv1 register access
To support muti-platform binaries the spu hypervisor accessor
routines must have runtime binding.

I removed the existing statically linked routines in spu.h
and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h
that operate indirectly through an ops struct spu_priv1_ops.
spu_priv1_mmio.c contains the instance of the accessor routines
for running on raw hardware.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:31 +10:00
Geoff Levand
c01ea72a3b [POWERPC] spufs: split the Cell BE support into generic and platform dependant parts
Creates new config variables PPC_CELL_NATIVE and PPC_IBM_CELL_BLADE.
The existing CONFIG_PPC_CELL is now used to denote the generic
Cell processor support.

PPC_CELL = make descends into platforms/cell
PPC_CELL_NATIVE = add bare metal support
PPC_IBM_CELL_BLADE = add blade device drivers, etc.

Also renames spu_priv1.c to spu_priv1_mmio.c.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:31 +10:00
arnd@arndb.de
e46a0237fd [POWERPC] spufs: dont try to access SPE channel 1 count
The save/restore sequence for SPE contexts currently attempts to save
and restore the channel count for SPE channel 1 (the SPU_WriteEventMask
channel.  But the CBE architecture (section 9.11.2) clearly states
that this channel does not have an associated count.  Hardware simply
ignores the attempt to write this count, but the simulator generates
a warning message.

WARNING: 279721590: SPE7: Attempt to write channel count for CH 1 with
no associated count is ignored.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:31 +10:00
Jeremy Kerr
ecec21770d [POWERPC] spufs: use kzalloc in create_spu
Clean up create_spu() a little by using kzalloc instead of kmalloc +
assignments.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:30 +10:00
arnd@arndb.de
970f1baae7 [POWERPC] spufs: fix initial state of wbox file
The wbox channel count of an spu is now initialized
to four for the saved context. This makes it possible
to write to the mailbox right away without waiting
for the SPE to become scheduled first.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:30 +10:00
arnd@arndb.de
7b1a701480 [POWERPC] spufs: add a phys-id attribute to each SPU context
For performance analysis, it is often interesting to know
which physical SPE a thread is currently running on, and,
more importantly, if it is running at all.

This patch adds a simple attribute to each SPU directory
with that information.
The attribute is read-only and called 'phys-id'. It contains
an ascii string with the number of the physical SPU (e.g.
"0x5"), or alternatively the string "0xffffffff" (32 bit -1)
when it is not running at all at the time that the file
is read.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:30 +10:00
arnd@arndb.de
724bd80e81 [POWERPC] spufs: set up correct SLB entries for 64k pages
spufs currently knows only 4k pages and 16M hugetlb
pages. Make it use the regular methods for deciding on
the SLB bits.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:30 +10:00
Michael Ellerman
0309f02d8e [POWERPC] spufs: fix deadlock in spu_create error path
spufs_rmdir tries to acquire the spufs root
i_mutex, which is already held by spufs_create_thread.

This was tracked as Bug #H9512.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:30 +10:00
arnd@arndb.de
d9379c4bce [POWERPC] spufs: restore mapping of mssync register
A recent change to the way that the mfc file gets mapped made it
impossible to map the SPE Multi-Source Synchronization register
into user space, but that may be needed by some applications.

This restores the missing functionality.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:30 +10:00
arnd@arndb.de
91edfa49b9 [POWERPC] cell: always build spu base into the kernel
The spu_base module is rather deeply intermixed with the
core kernel, so it makes sense to have that built-in.
This will let us extend the base in the future without
having to export more core symbols just for it.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:30 +10:00
Jeremy Kerr
1d64093f66 [POWERPC] cell: register SPUs as sysdevs
SPUs are registered as system devices, exposing attributes through
sysfs. Since the sysdev includes a kref, we can remove the one in
struct spu (it isn't used at the moment anyway).

Currently only the interrupt source and numa node attributes are added.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:29 +10:00
arnd@arndb.de
0f0f90c304 [POWERPC] cell: update defconfig
Enable some of the most requested features in defconfig
and refresh with the latest powerpc.git Kconfig files.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:29 +10:00
arnd@arndb.de
b40feec8ef [POWERPC] cell: fix interrupt priority handling
Checking the priority field to test for irq validity is
completely bogus and breaks with future external interrupt
controllers.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:29 +10:00
Benjamin Herrenschmidt
acf7d76827 [POWERPC] cell: add RAS support
This is a first version of support for the Cell BE "Reliability,
Availability and Serviceability" features.

It doesn't yet handle some of the RAS interrupts (the ones described in
iic_is/iic_irr), I'm still working on a proper way to expose these. They
are essentially a cascaded controller by themselves (sic !) though I may
just handle them locally to the iic driver. I need also to sync with
David Erb on the way he hooked in the performance monitor interrupt.

So that's all for 2.6.17 and I'll do more work on that with my rework of
the powerpc interrupt layer that I'm hacking on at the moment.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:29 +10:00
Jon Loeliger
b809b3e86f [POWERPC] Add mpc8641hpcn PCI/PCI-Express platform files.
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:28 +10:00
Jon Loeliger
4ca4b6274c [POWERPC] Add the MPC8641 HPCN platform files.
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:28 +10:00
Jon Loeliger
ee0339f205 [POWERPC] Add starting of secondary 86xx CPUs.
Clear the high BATS during load_up_mmu if FTR_HAS_HIGH_BATS.
Allow just a bit more time for secondary CPUs to phone home.

Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:28 +10:00
Jon Loeliger
9674ed38d8 [POWERPC] Add 8641 CPU table entry.
Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:28 +10:00
Jon Loeliger
96abe9358b [POWERPC] Add mpc8641_hpcn_defconfig config file.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:28 +10:00
Jon Loeliger
c9b484b5c1 [POWERPC] Add the mpc8641 hpcn Kconfig and Makefiles.
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:27 +10:00
Jon Loeliger
8a30088794 [POWERPC] Prevent duplicate lmb reservations for Device Tree blob.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:27 +10:00
Jon Loeliger
2198c07049 [POWERPC] Guard L3CR references with CPU_FTR_L3CR.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:27 +10:00
John Rose
7932f0b82f [POWERPC] RTAS delay, fix module build breaks
Export both news RTAS delay functions, and change the scanlog module to
use the new delay functions.

Signed-off-by: John Rose <johnrose@austin.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:27 +10:00
Linus Torvalds
050335db2a Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (42 commits)
  [ARM] Fix tosa build error
  [ARM] 3610/1: Make reboot work on Versatile
  [ARM] 3609/1: S3C24XX: defconfig update for s3c2410_defconfig
  [ARM] 3591/1: Anubis: IDE device definitions
  [ARM] Include asm/hardware.h not asm/arch/hardware.h
  [ARM] 3594/1: Poodle: Add touchscreen support + other updates
  [ARM] 3564/1: sharpsl_pm: Abstract some machine specific parameters
  [ARM] 3561/1: Poodle: Correct the MMC/SD power control
  [ARM] 3593/1: Add reboot and shutdown handlers for Zaurus handhelds
  [ARM] 3599/1: AT91RM9200 remove global variables
  [ARM] 3607/1: AT91RM9200 misc fixes
  [ARM] 3605/1: AT91RM9200 Power Management
  [ARM] 3604/1: AT91RM9200 New boards
  [ARM] 3603/1: AT91RM9200 remove old files
  [ARM] 3592/1: AT91RM9200 Serial driver update
  [ARM] 3590/1: AT91RM9200 Platform devices support
  [ARM] 3589/1: AT91RM9200 DK/EK board update
  [ARM] 3588/1: AT91RM9200 CSB337/637 board update
  [ARM] 3587/1: AT91RM9200 hardware headers
  [ARM] 3586/1: AT91RM9200 header update
  ...
2006-06-20 17:52:36 -07:00
Linus Torvalds
be883da759 Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
  [SPARC64]: Update defconfig.
  [SPARC64]: Don't double-export synchronize_irq.
  [SPARC64]: Move over to GENERIC_HARDIRQS.
  [SPARC64]: Virtualize IRQ numbers.
  [SPARC64]: Kill ino_bucket->pil
  [SPARC]: Kill __irq_itoa().
  [SPARC64]: bp->pil can never be zero
  [SPARC64]: Send all device interrupts via one PIL.
  [SPARC]: Fix iommu_flush_iotlb end address
  [SPARC]: Mark smp init functions as cpuinit
  [SPARC]: Add missing rw can_lock macros
  [SPARC]: Setup cpu_possible_map
  [SPARC]: Add topology_init()
2006-06-20 17:39:28 -07:00
Russell King
905f14672e [ARM] Fix tosa build error
tosa.c references mdelay(), but was missing linux/delay.h

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 23:27:37 +01:00
Linus Torvalds
2edc322d42 Merge git://git.infradead.org/~dwmw2/rbtree-2.6
* git://git.infradead.org/~dwmw2/rbtree-2.6:
  [RBTREE] Switch rb_colour() et al to en_US spelling of 'color' for consistency
  Update UML kernel/physmem.c to use rb_parent() accessor macro
  [RBTREE] Update hrtimers to use rb_parent() accessor macro.
  [RBTREE] Add explicit alignment to sizeof(long) for struct rb_node.
  [RBTREE] Merge colour and parent fields of struct rb_node.
  [RBTREE] Remove dead code in rb_erase()
  [RBTREE] Update JFFS2 to use rb_parent() accessor macro.
  [RBTREE] Update eventpoll.c to use rb_parent() accessor macro.
  [RBTREE] Update key.c to use rb_parent() accessor macro.
  [RBTREE] Update ext3 to use rb_parent() accessor macro.
  [RBTREE] Change rbtree off-tree marking in I/O schedulers.
  [RBTREE] Add accessor macros for colour and parent fields of rb_node
2006-06-20 14:51:22 -07:00
Linus Torvalds
ff9144530e Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits)
  [ARM] 3559/1: S3C2442: core and serial port
  [ARM] 3557/1: S3C24XX: centralise and cleanup uart registration
  [ARM] 3558/1: SMDK24XX: LED platform devices
  [ARM] 3534/1: add spi support to lubbock platform
  [ARM] 3554/1: ARM: Fix dyntick locking
  [ARM] 3553/1: S3C24XX: earlier print of cpu idcode info
  [ARM] 3552/1: S3C24XX: Move VA of GPIO for low-level debug
  [ARM] 3551/1: S3C24XX: PM code failes to compile with CONFIG_DCACHE_WRITETHROUGH
  [ARM] 3550/1: OSIRIS: fix serial port map for 1:1
  [ARM] 3548/1: Fix the ARMv6 CPU id in compressed/head.S
  [ARM] 3335/1: Old-abi Thumb sys_syscall broken
  [ARM] 3467/1: [3/3] Support for Philips PNX4008 platform: defconfig
  [ARM] 3466/1: [2/3] Support for Philips PNX4008 platform: chip support
  [ARM] 3465/1: [1/3] Support for Philips PNX4008 platform: headers
  [ARM] 3407/1: lpd7x: documetation update
  [ARM] 3406/1: lpd7x: compilation fix for smc91x
  [ARM] 3405/1: lpd7a40x: CPLD ssp driver
  [ARM] 3404/1: lpd7a40x: AMBA CLCD support
  [ARM] 3403/1: lpd7a40x: updated default configurations
  [ARM] 3402/1: lpd7a40x: serial driver bug fix
  ...
2006-06-20 14:49:00 -07:00
Deepak Saxena
4af6fee188 [ARM] 3610/1: Make reboot work on Versatile
Patch from Deepak Saxena

This patch makes soft reboot work on the Versatile board. Thanks to
Catalin Marinas @ ARM for pointing out the proper way to do this.

Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 21:30:44 +01:00
Russell King
098a4cb7c0 Merge S3Cxxxx branch 2006-06-20 20:57:34 +01:00
Russell King
ea75ee9ab8 [ARM] Include asm/hardware.h not asm/arch/hardware.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 19:53:16 +01:00
Russell King
3a8182bd88 Merge Zaurus branch 2006-06-20 19:49:07 +01:00
Russell King
695a9d236a Merge AT91 branch 2006-06-20 19:48:18 +01:00
Andrew Victor
55c20c0af7 [ARM] 3599/1: AT91RM9200 remove global variables
Patch from Andrew Victor

This patch removes some now unnecessary global variables -
at91_master_clock, at91_serial_map, at91_console_port.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 19:31:39 +01:00
Ben Dooks
ec57b709c3 [ARM] 3609/1: S3C24XX: defconfig update for s3c2410_defconfig
Patch from Ben Dooks

Update s3c2410_defconfig to latest kernel with the
latest patches

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 19:31:06 +01:00
Andrew Victor
5c3fddced9 [ARM] 3607/1: AT91RM9200 misc fixes
Patch from Andrew Victor

This final patch includes some general fixes.

1. Link in pm.o if CONFIG_PM is enabled.  [Should have been included in
patch 3605/1].
2. Use __raw_readl()/__raw_writel() when accessing System Peripheral
registers.
3. Removed some unnecessary includes

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 19:30:20 +01:00
Andrew Victor
907d6deb62 [ARM] 3605/1: AT91RM9200 Power Management
Patch from Andrew Victor

This patch adds the core Power Management support for the AT91RM9200
processor.  It will support suspend-to-RAM and standby modes.

The suspend-to-RAM functionality is not 100% complete.  The code that
needs to be execute from the internal SRAM to restore the system is
outstanding.  For now we just fall through to Standby mode.

The AT91-specific at91_suspend_entering_slow_clock() function will
eventually be replaced by clk_must_disable() once that functionality is
added to mainline clock API.

Patch from David Brownell.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 19:30:19 +01:00
Andrew Victor
6902f523a3 [ARM] 3604/1: AT91RM9200 New boards
Patch from Andrew Victor

This patch adds support for an additional 4 AT91RM9200-based boards:

1. Conitec ARM&EVA  [MACH_CARMEVA]
   (http://www.conitec.net/english/linuxboard.htm)

2. KwikByte KB920x  [MACH_KB9200]
   (http://kwikbyte.com/KB9202_description_new.htm)

3. Embest ATEB9200  [MACH_ATEB9200]
   (http://www.embedinfo.com/english/product/ATEB9200.asp)

4. Sperry-Sun KAFA board  [MACH_KAFA]
   (unknown)

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-20 19:30:18 +01:00
David S. Miller
4c5eb38af2 [SPARC64]: Update defconfig.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:27:08 -07:00
David S. Miller
c8bfcd95de [SPARC64]: Don't double-export synchronize_irq.
It is done by the generic IRQ layer now.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:23:56 -07:00
David S. Miller
e18e2a00ef [SPARC64]: Move over to GENERIC_HARDIRQS.
This is the long overdue conversion of sparc64 over to
the generic IRQ layer.

The kernel image is slightly larger, but the BSS is ~60K
smaller due to the reduced size of struct ino_bucket.

A lot of IRQ implementation details, including ino_bucket,
were moved out of asm-sparc64/irq.h and are now private to
arch/sparc64/kernel/irq.c, and most of the code in irq.c
totally disappeared.

One thing that's different at the moment is IRQ distribution,
we do it at enable_irq() time.  If the cpu mask is ALL then
we round-robin using a global rotating cpu counter, else
we pick the first cpu in the mask to support single cpu
targetting.  This is similar to what powerpc's XICS IRQ
support code does.

This works fine on my UP SB1000, and the SMP build goes
fine and runs on that machine, but lots of testing on
different setups is needed.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:23:32 -07:00
David S. Miller
8047e247c8 [SPARC64]: Virtualize IRQ numbers.
Inspired by PowerPC XICS interrupt support code.

All IRQs are virtualized in order to keep NR_IRQS from needing
to be too large.  Interrupts on sparc64 are arbitrary 11-bit
values, but we don't need to define NR_IRQS to 2048 if we
virtualize the IRQs.

As PCI and SBUS controller drivers build device IRQs, we divy
out virtual IRQ numbers incrementally starting at 1.  Zero is
a special virtual IRQ used for the timer interrupt.

So device drivers all see virtual IRQs, and all the normal
interfaces such as request_irq(), enable_irq(), etc. translate
that into a real IRQ number in order to configure the IRQ.

At this point knowledge of the struct ino_bucket is almost
entirely contained within arch/sparc64/kernel/irq.c  There are
a few small bits in the PCI controller drivers that need to
be swept away before we can remove ino_bucket's definition
out of asm-sparc64/irq.h and privately into kernel/irq.c

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:22:35 -07:00
David S. Miller
37cdcd9e82 [SPARC64]: Kill ino_bucket->pil
And reuse that struct member for virt_irq, which will
be used in future changesets for the implementation of
mapping between real and virtual IRQ numbers.

This nicely kills off a ton of SBUS and PCI controller
PIL assignment code which is no longer necessary.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:21:57 -07:00
David S. Miller
c6387a48cf [SPARC]: Kill __irq_itoa().
This ugly hack was long overdue to die.

It was a way to print out Sparc interrupts in a more freindly format,
since IRQ numbers were arbitrary opaque 32-bit integers which vectored
into PIL levels.  These 32-bit integers were not necessarily in the
0-->NR_IRQS range, but the PILs they vectored to were.

The idea now is that we will increase NR_IRQS a little bit and use a
virtual<-->real IRQ number mapping scheme similar to PowerPC.

That makes this IRQ printing hack irrelevant, and furthermore only a
handful of drivers actually used __irq_itoa() making it even less
useful.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:21:29 -07:00
David S. Miller
6a76267f0e [SPARC64]: bp->pil can never be zero
Only pil0_dummy_bucket had a pil of zero and we just killed that
off, so we can delete all special case code that used bp->pil==0
as a way to identify a dummy bucket.

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:20:30 -07:00
David S. Miller
fd0504c321 [SPARC64]: Send all device interrupts via one PIL.
This is the first in a series of cleanups that will hopefully
allow a seamless attempt at using the generic IRQ handling
infrastructure in the Linux kernel.

Define PIL_DEVICE_IRQ and vector all device interrupts through
there.

Get rid of the ugly pil0_dummy_{bucket,desc}, instead vector
the timer interrupt directly to a specific handler since the
timer interrupt is the only event that will be signaled on
PIL 14.

The irq_worklist is now in the per-cpu trap_block[].

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 01:20:00 -07:00
Bob Breuer
3185d4d287 [SPARC]: Fix iommu_flush_iotlb end address
Fix the calculation of the end address when flushing iotlb entries to
ram.  This bug has been a cause of esp dma errors, and it affects
HyperSPARC systems much worse than SuperSPARC systems.

Signed-off-by: Bob Breuer <breuerr@mc.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 00:36:56 -07:00
Bob Breuer
92d452f0eb [SPARC]: Mark smp init functions as cpuinit
Fix the smp related section mismatch warnings by marking the smp init
functions as cpuinit.

Signed-off-by: Bob Breuer <breuerr@mc.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 00:36:10 -07:00
Bob Breuer
7202fb496a [SPARC]: Setup cpu_possible_map
Setup cpu_possible_map so the secondary cpus will get started.

Signed-off-by: Bob Breuer <breuerr@mc.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 00:30:31 -07:00
Bob Breuer
a8cbdcea34 [SPARC]: Add topology_init()
Fix a crash in SMP mode by adding the missing topology_init.
Also makes /proc/cpuinfo backwards compatible with 2.4.

Signed-off-by: Bob Breuer <breuerr@mc.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-20 00:28:33 -07:00
Langsdorf, Mark
6cad647da2 [CPUFREQ] correct powernow-k8 fid/vid masks for extended parts
The fid/vid masks for parts using the extended parts are slightly incorrect and can result in
incorrect fid/vid codes being applied.  No instances of this problem have been reported in
the field but it could be a problem with future parts.

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-06-20 01:46:04 -04:00
Langsdorf, Mark
e7bdd7a531 [CPUFREQ] Clarify powernow-k8 cpu_family statements
This patch clarifies the meaning of the cpu_family if
statements in the hw pstate driver patch for powernow-k8

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-06-20 01:46:04 -04:00
Linus Torvalds
25f42b6af0 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (51 commits)
  [MIPS] Make timer interrupt frequency configurable from kconfig.
  [MIPS] Correct HAL2 Kconfig description
  [MIPS] Fix R4K cache macro names
  [MIPS] Add Missing R4K Cache Macros to IP27 & IP32
  [MIPS] Support for the RM9000-based Basler eXcite smart camera platform.
  [MIPS] Support for the R5500-based NEC EMMA2RH Mark-eins board
  [MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.
  [MIPS] SN: include asm/sn/types.h for nasid_t.
  [MIPS] Random fixes for sb1250
  [MIPS] Fix bcm1480 compile
  [MIPS] Remove support for NEC DDB5476.
  [MIPS] Remove support for NEC DDB5074.
  [MIPS] Cleanup memory managment initialization.
  [MIPS] SN: Declare bridge_pci_ops.
  [MIPS] Remove unused function alloc_pci_controller.
  [MIPS] IP27: Extract pci_ops into separate file.
  [MIPS] IP27: Use symbolic constants instead of magic numbers.
  [MIPS] vr41xx: remove unnecessay items from vr41xx/Kconfig.
  [MIPS] IP27: Cleanup N/M mode configuration.
  [MIPS] IP27: Throw away old unused hacks.
  ...
2006-06-19 19:07:12 -07:00
Linus Torvalds
bbf70132db Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq
* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
  [CPUFREQ] sets nforce2 minimum PLL divider to 2.
  [CPUFREQ] Make powernow-k7 work on SMP kernels.
  [CPUFREQ] cpufreq core {d,}printk adjustments
  [CPUFREQ] dprintk adjustments to cpufreq-speedstep-centrino
  [CPUFREQ] dprintk adjustments to cpufreq-nforce2
  [CPUFREQ] Prepare powernow-k8 for future CPUs.
  [CPUFREQ] Make acpi-cpufreq 'sticky'.
  [CPUFREQ] Remove strange No-op from longrun.c
  [CPUFREQ] Remove more freq_table reinitialisations.
  [CPUFREQ] Fix another redundant initialisation in freq_table
  [CPUFREQ] Remove duplicate assignment in freq_table
  [CPUFREQ] CodingStyle nits in cpufreq_stats.c
  [CPUFREQ] Remove duplicate assignment from cpufreq-nforce2
  [CPUFREQ] Remove pointless reinitialisations in acpi-cpufreq
  [CPUFREQ] Remove pointless reinitialisation from powernow-k8
  [CPUFREQ] Remove redundant initialisation from longhaul.
  [CPUFREQ] Clean up longhaul's speed pretty-printer
  [CPUFREQ] Disambiguate loop indexes in powernow-k7
  [CPUFREQ] Typo in powernow-k8
2006-06-19 18:51:21 -07:00
Richard Purdie
faed568413 [ARM] 3594/1: Poodle: Add touchscreen support + other updates
Patch from Richard Purdie

Poodle Updates:
* Update corgi_ssp to make the GPIO chip selects optional
* Enable corgi_ssp for use by poodle
* Add corgi touchscreen platform device for poodle
* Export locomo platform device.
* Set framebuffer device parent correctly

Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-19 20:46:05 +01:00
Richard Purdie
f8703dc8cb [ARM] 3564/1: sharpsl_pm: Abstract some machine specific parameters
Patch from Richard Purdie

Abstract some machine specific parameters from the sharpsl_pm core
into the machine specific drivers. This allows the core to support
tosa/poodle.

Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-19 19:58:52 +01:00
Richard Purdie
88660351cb [ARM] 3561/1: Poodle: Correct the MMC/SD power control
Patch from Richard Purdie

Correct the Poodle power control for the MMC/SD port. Also
add write protection switch support.

Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-19 19:58:51 +01:00
Richard Purdie
74617fb6b8 [ARM] 3593/1: Add reboot and shutdown handlers for Zaurus handhelds
Patch from Richard Purdie

Add functionality to allow machine specific reboot handlers on ARM.
Add machine specific reboot and poweroff handlers for all PXA Zaurus
models.

Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-19 19:57:12 +01:00
Ben Dooks
bf1c56a3aa [ARM] 3591/1: Anubis: IDE device definitions
Patch from Ben Dooks

Platform device definitions for the two IDE ports
on the Simtec Anubis board.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-19 18:30:04 +01:00
Andrew Victor
067bbada4c [ARM] 3589/1: AT91RM9200 DK/EK board update
Patch from Andrew Victor

This patch updates the support for the Atmel DK and EK boards.

The changes include:
1. Use the new at91_uart_config structure and device registration
functions for the UARTs.
2. Registration of I2C and SPI platform devices.
3. The USB Device pullup line is connected to reset, so multidrive needs
to be enabled on the line.  [Patch from David Brownell].

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-19 18:16:45 +01:00
Atsushi Nemoto
1723b4a34a [MIPS] Make timer interrupt frequency configurable from kconfig.
Make HZ configurable.  DECSTATION can select 128/256/1024 HZ, JAZZ can
only select 100 HZ, others can select 100/128/250/256/1000/1024 HZ if
not explicitly specified).  Also remove all mach-xxx/param.h files and
update all defconfigs according to current HZ value.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:27 +01:00
Ralf Baechle
35189fad3c [MIPS] Support for the RM9000-based Basler eXcite smart camera platform.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:26 +01:00
dmitry pervushin
355c471f2f [MIPS] Support for the R5500-based NEC EMMA2RH Mark-eins board
Signed-off-by: dmitry pervushin  <dpervushin@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:26 +01:00
Thomas Bogendoerfer
4a0312fca6 [MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.
Added support for RM200C machines with big endian firmware
Added support for RM200-C40 (R5000 support)
    
Signed-off-by: Florian Lohoff <flo@rfc822.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Thiemo Seufer
4fb60a4b80 [MIPS] Random fixes for sb1250
Random improvements for sb1250: Silence compiler warnings, a bugfix for
the profiling code, and a comment typo.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Thiemo Seufer
b75d4c1d68 [MIPS] Fix bcm1480 compile
Fix compilation for bcm1480, a hpt is only available on sb1250/bcm112x.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Ralf Baechle
470b160364 [MIPS] Remove support for NEC DDB5476.
As warned several times before.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Ralf Baechle
eaff388874 [MIPS] Remove support for NEC DDB5074.
As warned several times before.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Ralf Baechle
2925aba422 [MIPS] Cleanup memory managment initialization.
Historically plat_mem_setup did the entire platform initialization.  This
was rather impractical because it meant plat_mem_setup had to get away
without any kind of memory allocator.  To keep old code from breaking
plat_setup was just renamed to plat_setup and a second platform
initialization hook for anything else was introduced.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:23 +01:00
Ralf Baechle
610019badd [MIPS] Remove unused function alloc_pci_controller.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:23 +01:00
Ralf Baechle
9e0c7afd0e [MIPS] IP27: Extract pci_ops into separate file.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:23 +01:00
Ralf Baechle
3a11545615 [MIPS] IP27: Use symbolic constants instead of magic numbers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:23 +01:00
Yoichi Yuasa
c340cc504c [MIPS] vr41xx: remove unnecessay items from vr41xx/Kconfig.
Remove unnecessary items from vr41xx/Kconfig.  SYS_HA_CPU_VR41XX has
already been selected by MACH_VR41XX.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:23 +01:00
Ralf Baechle
f456acae4f [MIPS] IP27: Cleanup N/M mode configuration.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:23 +01:00
Rodolfo Giometti
952fa954a6 [MIPS] APM emu support
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:22 +01:00
Ralf Baechle
aa9772e330 [MIPS] SN: Rename SGI_SN0_N_MODE -> SGI_SN_N_MODE.
It's not SN0-specific.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:22 +01:00
Ralf Baechle
d8cb4e119f [MIPS] Cleanup ARCH_DISCONTIGMEM_ENABLE and NUMA configuration.
IP27 configuration isn't the only NUMA system - it just happens to be
the currently only supported MIPS NUMA system.  So move the necessary
options back into the main MIPS Kconfig file.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:21 +01:00
Ralf Baechle
5e46c3aefe [MIPS] C99-ify struct resource initialization.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:20 +01:00
Ralf Baechle
cbb306962e [MIPS] Remove duplicate declarations from Alchemy code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:20 +01:00
Sergei Shtylyov
fbd7a38ffb [MIPS] arch/mips/au1000/time.c cleanup
Mark au1xxx_timer_setup() __init, just because it is. Get rid of
unneeded extern's (note that (*do_gettimeoffset)() is already declared by
<asm/time.c>) and an unused variable. Kill some whitespace...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:19 +01:00
Ralf Baechle
b0b0e13e7d [MIPS] Remove unused instances of prom_build_cpu_map.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:19 +01:00
Thiemo Seufer
c583122c26 [MIPS] Qemu system shutdown support
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:19 +01:00
Atsushi Nemoto
eae89076e6 [MIPS] Unify mips_fpu_soft_struct and mips_fpu_hard_structs.
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are
completely same now and the kernel fpu emulator assumes that.  This
patch unifies them to mips_fpu_struct and get rid of mips_fpu_union.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:18 +01:00
Ralf Baechle
5deee2dbf4 [MIPS] Remove prototype for non-existing function.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:18 +01:00
Mark.Zhan
a240a46964 [MIPS] Wind River 4KC PPMC Eval Board Support
Support for the GT-64120-based Wind River 4KC PPMC Evaluation board.

Signed-off-by: Rongkai.Zhan <Rongkai.zhan@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:18 +01:00
Herbert Valerio Riedel
a643d2b574 [MIPS] Au1xxx: board specific irq code cleanup
Convert sizeof/sizeof use to use of ARRAY_SIZE macro, and annotate
irqmap structures as __initdata.

Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:17 +01:00