Commit graph

439 commits

Author SHA1 Message Date
Paul Mundt
9762528f37 sh: Kill off deprecated fixed PCI memory window accessors.
This kills off the deprected fixed memory range accessors for
the cases of non-translatable ioremapping.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-29 16:14:29 +09:00
Paul Mundt
9d56dd3b08 sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-26 12:58:40 +09:00
Paul Mundt
2dc2f8e0c4 sh: Kill off the special uncached section and fixmap.
Now that cached_to_uncached works as advertized in 32-bit mode and we're
never going to be able to map < 16MB anyways, there's no need for the
special uncached section. Kill it off.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-21 16:05:25 +09:00
Paul Mundt
3125ee72dc sh: Track the uncached mapping size.
This provides a variable for tracking the uncached mapping size, and uses
it for pretty printing the uncached lowmem range. Beyond this, we'll also
be building on top of this for figuring out from where the remainder of
P2 becomes usable when constructing unrelated mappings.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-21 15:54:31 +09:00
Paul Mundt
35f99c0da1 sh: pretty print virtual memory map on boot.
This cribs the pretty printing from arch/x86/mm/init_32.c to dump the
virtual memory layout on boot. This is primarily intended as a debugging
aid, given that the newer CPUs have full control over their address space
and as such have little to nothing in common with the legacy layout.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-20 18:48:17 +09:00
Paul Mundt
920efaabcb sh: Correct iounmap fixmap teardown.
iounmap_fixed() had a couple of bugs in it that caused it to effectively
fail at life. The total number of pages to unmap factored in the mapping
offset and aligned up to the next page boundary, which doesn't match the
ioremap_fixed() behaviour.

When ioremap_fixed() pegs a slot, the address in the mapping data already
contains the offset displacement, and the size is recorded verbatim given
that we're only interested in total number of pages required. As such, we
need to calculate the total number from the original size in the unmap
path as well.

At the same time, there was also an off-by-1 problem in the fixmap index
calculation which has also been corrected.

Previously subsequent remaps of an identical fixmap index would trigger
the pte_ERROR() in set_pte_phys():

	arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
	arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
	arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
	arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
	arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
	arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).

With this patch in place, the iounmap-driven fixmap teardown actually
does what it's supposed to do.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-20 18:10:30 +09:00
Paul Mundt
2efa53b269 sh: Make 29/32-bit mode check helper generally available.
Presently __in_29bit_mode() is only defined for the PMB case, but
it's also easily derived from the CONFIG_29BIT and CONFIG_32BIT &&
CONFIG_PMB=n cases.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-20 16:40:48 +09:00
Paul Mundt
88ea1a445a sh64: Fix up PC casting in unaligned fixup notifier with 32bit ABI.
Presently the build bails with the following:

  CC      arch/sh/mm/alignment.o
cc1: warnings being treated as errors
arch/sh/mm/alignment.c: In function 'unaligned_fixups_notify':
arch/sh/mm/alignment.c:69: warning: cast to pointer from integer of different size
arch/sh/mm/alignment.c:74: warning: cast to pointer from integer of different size
make[2]: *** [arch/sh/mm/alignment.o] Error 1

This is due to the fact that regs->pc is always 64-bit, while the pointer size
depends on the ABI. Wrapping through instruction_pointer() takes care of the
appropriate casting for both configurations.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 15:41:50 +09:00
Paul Mundt
cb6d04468d sh: Kill off now bogus fixmap/page wiring documentation.
The plans for _PAGE_WIRED were detailed in a comment with the fixmap
code, but as it's now all taken care of, we no longer have any reason for
keeping it around, particularly since it's no longer accurate. Kill it
off.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 15:22:52 +09:00
Paul Mundt
bb29c677b3 sh: Split out MMUCR.URB based entry wiring in to shared helper.
Presently this is duplicated between tlb-sh4 and tlb-pteaex. Split the
helpers out in to a generic tlb-urb that can be used by any parts
equipped with MMUCR.URB.

At the same time, move the SH-5 code out-of-line, as we require single
global state for DTLB entry wiring.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 15:20:35 +09:00
Paul Mundt
acf2c9685f sh: Kill off duplicate address alignment in ioremap_fixed().
This is already taken care of in the top-level ioremap, and now that
no one should be calling ioremap_fixed() directly we can simply throw the
mapping displacement in as an additional argument.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 13:49:19 +09:00
Paul Mundt
d57d64080d sh: Prevent 64-bit pgprot clobbering across ioremap implementations.
Presently 'flags' gets passed around a lot between the various ioremap
helpers and implementations, which is only 32-bits. In the X2TLB case
we use 64-bit pgprots which presently results in the upper 32bits being
chopped off (which handily include our read/write/exec permissions).

As such, we convert everything internally to using pgprot_t directly and
simply convert over with pgprot_val() where needed. With this in place,
transparent fixmap utilization for early ioremap works as expected.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 13:34:38 +09:00
Paul Mundt
af1415314a sh: Flag __ioremap_caller() __init_refok.
The mem_init_done test makes sure that this path is only entered in
__init cases, so leaving ioremap_fixed() as __init and flagging the
caller __init_refok is sufficient.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:45:00 +09:00
Paul Mundt
12b6b01cb4 sh: Handle unmapping of fixed slots transparently in iounmap().
iounmap() should balance whatever is done by ioremap(). Presently
ioremap() can do any of fixed mappings, PMB mappings, or page table
mappings. Presently only the latter two are handled through the standard
unmap path, so tie in the fixed unmapping, too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:33:08 +09:00
Paul Mundt
4f744affc3 sh: Make iounmap_fixed() return success/failure for iounmap() path.
This converts iounmap_fixed() to return success/error if it handled the
unmap request or not. At the same time, drop the __init label, as this
can be called in to later.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:30:29 +09:00
Paul Mundt
0b59e38ffa sh: Merge _32/_64 ioremap implementations.
There is nothing of interest in the _64 version anymore, so the _32 one
can be renamed and used unconditionally.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:21:32 +09:00
Paul Mundt
d9b9487af7 sh: Handle early ioremaps through fixed mappings.
This adds in a mem_init_done to work out when a standard ioremap() is
possible, falling back to the fixmap based ioremap otherwise.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:08:32 +09:00
Paul Mundt
8faba61215 Merge branch 'sh/ioremap-fixed' 2010-01-18 20:42:39 +09:00
Matt Fleming
3d467676ab sh: Setup early PMB mappings.
More and more boards are going to start shipping that boot with the MMU
in 32BIT mode by default. Previously we relied on the bootloader to
setup PMB mappings for use by the kernel but we also need to cater for
boards whose bootloaders don't set them up.

If CONFIG_PMB_LEGACY is not enabled we have full control over our PMB
mappings and can compress our address space. Usually, the distance
between the the cached and uncached mappings of RAM is always 512MB,
however we can compress the distance to be the amount of RAM on the
board.

pmb_init() now becomes much simpler. It no longer has to calculate any
mappings, it just has to synchronise the software PMB table with the
hardware.

Tested on SDK7786 and SH7785LCR.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 19:33:10 +09:00
Paul Mundt
78bf04fc96 sh: Tidy up non-translatable checks in iounmap path.
This tidies up the iounmap path with consolidated checks for
nontranslatable mappings. This is in preparation of unifying
the implementations.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-17 01:45:26 +09:00
Matt Fleming
597fe76ec3 sh: Use ioremap_fixed() to implement SH-5 ioremap()
Use the fixmap-based memory mapping implementation for SH-5's ioremap()
functions and delete the old static allocator that was borrowed from
sparc.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:31:51 +00:00
Matt Fleming
4d35b93a66 sh: Add fixed ioremap support
Some devices need to be ioremap'd and accessed very early in the boot
process. It is not possible to use the standard ioremap() function in
this case because that requires kmalloc()'ing some virtual address space
and kmalloc() may not be available so early in boot.

This patch provides fixmap mappings that allow physical address ranges
to be remapped into the kernel address space during the early boot
stages.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:31:36 +00:00
Matt Fleming
07cad4dc1b sh: Generalise the pte handling code for the fixmap path
Generalise the code for setting and clearing pte's and allow TLB entries
to be pinned and unpinned if the _PAGE_WIRED flag is present.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:29:23 +00:00
Matt Fleming
24ef7fc4dc sh: Acquire some more page flags for SH-5.
We need some more page flags to hook up _PAGE_WIRED (and eventually
other things). So use the unused PTE bits above the PPN field as no
implementations use these for anything currently.

Now that we have _PAGE_WIRED let's provide the SH-5 functions for wiring
up TLB entries.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:29:06 +00:00
Matt Fleming
8eda551420 sh: New extended page flag to wire/unwire TLB entries
Provide a new extended page flag, _PAGE_WIRED and an SH4 implementation
for wiring TLB entries and use it in the fixmap code path so that we can
wire the fixmap TLB entry.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:28:57 +00:00
Paul Mundt
a6198a238b sh: Guard against early IPIs in flush_cache_all().
flush_cache_all() gets called in to when we do some early ioremapping.
Unfortunately on SDK7786 the interrupt controller itself requires
ioremapping, leading to a bit of a chicken and egg scenario. For now,
don't bother with IPI crosscalls if there aren't any other CPUs online.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-15 14:21:37 +09:00
Paul Mundt
782bb5a532 sh: default to extended TLB support.
All SH-X2 and SH-X3 parts support an extended TLB mode, which has been
left as experimental since support was originally merged. Now that it's
had some time to stabilize and get some exposure to various platforms,
we can drop it as an option and default enable it across the board.

This is also good future proofing for newer parts that will drop support
for the legacy TLB mode completely.

This will also force 3-level page tables for all newer parts, which is
necessary both for the varying page sizes and larger memories.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 19:11:14 +09:00
Paul Mundt
a0ab36689a sh: fixed PMB mode refactoring.
This introduces some much overdue chainsawing of the fixed PMB support.
fixed PMB was introduced initially to work around the fact that dynamic
PMB mode was relatively broken, though they were never intended to
converge. The main areas where there are differences are whether the
system is booted in 29-bit mode or 32-bit mode, and whether legacy
mappings are to be preserved. Any system booting in true 32-bit mode will
not care about legacy mappings, so these are roughly decoupled.

Regardless of the entry point, PMB and 32BIT are directly related as far
as the kernel is concerned, so we also switch back to having one select
the other.

With legacy mappings iterated through and applied in the initialization
path it's now possible to finally merge the two implementations and
permit dynamic remapping overtop of remaining entries regardless of
whether boot mappings are crafted by hand or inherited from the boot
loader.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 18:31:48 +09:00
Paul Mundt
cbf6b1ba7a sh: Always provide thread_info allocators.
Presently the thread_info allocators are special cased, depending on
THREAD_SHIFT < PAGE_SHIFT. This provides a sensible definition for them
regardless of configuration, in preparation for extended CPU state.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 19:01:11 +09:00
Paul Mundt
a99eae5417 sh: Split out the unaligned counters and user bits.
This splits out the unaligned access counters and userspace bits in to
their own generic interface, which will allow them to be wired up on sh64
too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 16:12:25 +09:00
Paul Mundt
56d45b62ce sh: Fix up nommu build for out-of-line pgtable changes.
pgtable_cache_init() has been moved out-of-line, so we also need a dummy
definition for it on nommu to fix up the build.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-06 14:45:14 +09:00
Paul Mundt
a7595fe7e8 Merge branch 'sh/pgtable' of git://github.com/mfleming/linux-2.6 2010-01-05 12:27:46 +09:00
Paul Mundt
921a220857 Merge branch 'sh/stable-updates' 2010-01-04 16:45:56 +09:00
Paul Mundt
5e9daa0f26 sh: Don't default enable PMB support.
This has the adverse effect of converting many 29bit configs to 32bit
mode, while this is a change that needs to be done manually for each
platform. Turn it off by default in order to cut down on spurious bug
reports.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-04 11:16:33 +09:00
Paul Mundt
b4e2a2a2f3 sh: Disable PMB for SH4AL-DSP CPUs.
While the PMB is available on SH-4A parts, SH4AL-DSP parts exclude it
altogether. As such, explicitly disable PMB support for these parts. If
this changes in the future for newer subtypes, this will have to be made
more fine-grained.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-04 11:13:54 +09:00
Matt Fleming
2a5eacca85 sh: Move page table allocation out of line
We also switched away from quicklists and instead moved to slab
caches. After benchmarking both implementations the difference is
negligible. The slab caches suit us better though because the size of a
pgd table is just 4 entries when we're using a 3-level page table layout
and quicklists always deal with pages.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-02 01:02:25 +00:00
Matt Fleming
b4c8927623 sh: Optimise flush_dcache_page() on SH4
If the page is not mapped into any process's address space then aliases
cannot exist in the cache. So reduce the amount of flushing we perform.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-02 00:51:52 +00:00
Matt Fleming
3f5ab76816 sh: Correct the PTRS_PER_PMD and PMD_SHIFT values
The previous expressions were wrong which made free_pmd_range() explode
when using anything other than 4KB pages (which is why 8KB and 64KB
pages were disabled with the 3-level page table layout).

The problem was that pmd_offset() was returning an index of non-zero
when it should have been returning 0. This non-zero offset was used to
calculate the address of the pmd table to free in free_pmd_range(),
which ended up trying to free an object that was not aligned on a page
boundary.

Now 3-level page tables should work with 4KB, 8KB and 64KB pages.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-02 00:51:45 +00:00
Paul Mundt
17eb9d6282 Merge branches 'sh/g3-prep' and 'sh/stable-updates' 2009-12-24 15:16:41 +09:00
Markus Pietrek
76382b5bdb sh: Ensure all PG_dcache_dirty pages are written back.
With some of the cache rework an address aliasing optimization was added,
but this managed to fail on certain mappings resulting in pages with
PG_dcache_dirty set never writing back their dcache lines. This patch
reverts to the earlier behaviour of simply always writing back when the
dirty bit is set.

Signed-off-by: Markus Pietrek <Markus.Pietrek@emtrion.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-24 15:12:02 +09:00
Matt Fleming
5d9b4b19f1 sh: Definitions for 3-level page table layout
If using 64-bit PTEs and 4K pages then each page table has 512 entries
(as opposed to 1024 entries with 32-bit PTEs). Unlike MIPS, SH follows
the convention that all structures in the page table (pgd_t, pmd_t,
pgprot_t, etc) must be the same size. Therefore, 64-bit PTEs require
64-bit PGD entries, etc. Using 2-levels of page tables and 64-bit PTEs
it is only possible to map 1GB of virtual address space.

In order to map all 4GB of virtual address space we need to adopt a
3-level page table layout. This actually works out better for
CONFIG_SUPERH32 because we only waste 2 PGD entries on the P1 and P2
areas (which are untranslated) instead of 256.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-17 14:31:20 +09:00
Paul Mundt
e0aa51f54f Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 2009-12-15 12:10:10 +09:00
Paul Mundt
bf3cdeda90 sh: wire up vmallocinfo support in ioremap() implementations.
This wires up the caller information for the ioremap VMA, which allows
for more helpful caller tracking via /proc/vmallocinfo. Follows the x86
and powerpc changes of the same nature.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-14 14:23:41 +09:00
Al Viro
e77414e0aa fix broken aliasing checks for MAP_FIXED on sparc32, mips, arm and sh
We want addr - (pgoff << PAGE_SHIFT) consistently coloured...

Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Hugh Dickins <hugh.dickins@tiscali.co.uk>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2009-12-11 06:44:59 -05:00
Magnus Damm
b25b975846 sh: NUMA lmb fixes
This patch updates the NUMA version of setup_memory()
with UMA code changes and also modifies the last argument
to lmb_alloc_base() to use an address instead of pfn.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09 12:40:44 +09:00
Magnus Damm
f3a4c00ad3 sh: fix size calculation for NUMA node 0
Fix the NUMA size calculation for node 0. Do the same
as the UMA version of setup_memory() and use address
instead of pfn when calculating the size.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09 12:40:42 +09:00
Matt Fleming
e717cc6c07 sh: Can't compare physical and virtual addresses for aliases
It does not make sense to compare virtual and physical addresses for
aliasing, only virtual addresses can be compared for aliases.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09 12:34:46 +09:00
Matt Fleming
a781d1e5ff sh: Drop associative writes for SH-4 cache flushes.
When flushing/invalidating the icache/dcache via the memory-mapped IC/OC
address arrays, the associative bit should only be used in conjunction with
virtual addresses. However, we currently flush cache lines based on physical
address, so stop using the associative bit.

It is a better strategy to use non-associative writes (and physical tags) for
flushing the caches anyway, because flushing by virtual address (as with the
A-bit set) requires a valid TLB entry for that virtual address. If one does not
exist in the TLB no exception is generated and the flush is silently ignored.

This is also future-proofing for SH-4A parts which are gradually phasing out
associative writes to the cache array due to the aforementioned case of certain
flushes silently turning in to nops.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-04 16:18:11 +09:00
Paul Mundt
7e01c94998 sh: Partial revert of copy/clear_user_highpage() optimizations.
These still require more testing, so revert them for now. We keep the
off-by-1 in the fixmap colouring and drop the rest.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-04 15:14:52 +09:00
Stuart Menefy
39ac11c160 sh: Improve performance of SH4 versions of copy/clear_user_highpage
The previous implementation of clear_user_highpage and copy_user_highpage
checked to see if there was a D-cache aliasing issue between the user
and kernel mappings of a page, but if there was they always did a
flush with writeback on the dirtied kernel alias.

However as we now have the ability to map a page into kernel space
with the same cache colour as the user mapping, there is no need to
write back this data.

Currently we also invalidate the kernel alias as a precaution, however
I'm not sure if this is actually required.

Also correct the definition of FIX_CMAP_END so that the mappings created
by kmap_coherent() are actually at the correct colour.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24 17:13:35 +09:00