The two first HC capability registers (CAPLENGTH and HCIVERSION)
are defined as one 8-bit and one 16-bit register. Most HC
implementations have selected to treat these registers as part
of a 32-bit register, giving the same layout for both big and
small endian systems.
This patch adds a new quirk, big_endian_capbase, to support
controllers with big endian register interfaces that treat
HCIVERSION and CAPLENGTH as individual registers.
Signed-off-by: Jan Andersson <jan@gaisler.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch fixes the following compile warnings
drivers/usb/host/ehci-dbg.c:45: warning: 'dbg_hcs_params' defined but not used
drivers/usb/host/ehci-dbg.c:89: warning: 'dbg_hcc_params' defined but not used
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Now that ehci_run don't call ehci_reset, we can use ehci_run.
Signed-off-by: Matthieu CASTET <castet.matthieu@parrot.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Enable runtime PM and mark no_callbacks flag. OTG device, parent of
HCD takes care of putting hardware into low power mode. Adjust port
power wakeup flags during system suspend and resume.
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch adds support for EHCI compliant HSUSB Host controller found
on MSM chips. The root hub has a single port and TT is built into it.
This driver depends on OTG driver for PHY initialization, clock
management and powering up VBUS.
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Matthieu CASTET