Fix minimum width/height so planes could be used to implement
hw mouse cursor.
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Because framebuffer layer and overlay scanout video pipes are basically
thing in OMAP display subsystem (the only difference being that the first
video pipe does not support scaling or YUV formats), much of the CRTC
code is pulled into the plane implementation, and a private plane object
is used by the CRTC object. This avoids code duplication between the
plane and CRTC.
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Update to reflect changes in:
"Make the per-driver file_operations struct const"
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Right now just a tiler_map file to dump a 2d map of which areas in
tiler/dmm have pinned buffers (or reservations). In the future more
could be added.
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
TILER/DMM provides two features for omapdrm GEM objects:
1) providing a physically contiguous view to discontiguous memory
for hw initiators that cannot otherwise support discontiguous
buffers (DSS scanout, IVAHD video decode/encode, etc)
2) providing untiling for 2d tiled buffers, which are used in some
cases to provide rotation and reduce memory bandwidth for hw
initiators that tend to access data in 2d block patterns.
For 2d tiled buffers, there are some additional complications when
it comes to userspace mmap'ings. For non-tiled buffers, the original
(potentially physically discontiguous) pages are used to back the
mmap. For tiled buffers, we need to mmap via the tiler/dmm region to
provide an unswizzled view of the buffer. But (a) the buffer is not
necessarily pinned in TILER all the time (it can be unmapped when
there is no DMA access to the buffer), and (b) when they are they
are pinned, they not necessarily page aligned from the perspective of
the CPU. And non-page aligned userspace buffer mapping is evil.
To solve this, we reserve one or more small regions in each of the 2d
containers when the driver is loaded to use as a "user-GART" where we
can create a second page-aligned mapping of parts of the buffer being
accessed from userspace. Page faulting is used to evict and remap
different regions of whichever buffers are being accessed from user-
space.
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Dynamic Memory Manager (DMM) is a hardware block in the OMAP4+
processor that contains at least one TILER instance. TILER, or
Tiling and Isometric Lightweight Engine for Rotation, provides
IOMMU capabilities through the use of a physical address translation
table. The TILER also provides zero cost rotation and mirroring.
The TILER provides both 1D and 2D access by providing different views
or address ranges that can be used to access the physical memory that
has been mapped in through the PAT. Access to the 1D view results in
linear access to the underlying memory. Access to the 2D views result
in tiled access to the underlying memory resulted in increased
efficiency.
The TILER address space is managed by a tiler container manager (TCM)
and allocates the address space through the use of the Simple Tiler
Allocation algorithm (SiTA). The purpose of the algorithm is to keep
fragmentation of the address space as low as possible.
Signed-off-by: Andy Gross <andy.gross@ti.com>
Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
A DRM display driver for TI OMAP platform. Similar to omapfb (fbdev)
and omap_vout (v4l2 display) drivers in the past, this driver uses the
DSS2 driver to access the display hardware, including support for
HDMI, DVI, and various types of LCD panels. And it implements GEM
support for buffer allocation (for KMS as well as offscreen buffers
used by the xf86-video-omap userspace xorg driver).
The driver maps CRTCs to overlays, encoders to overlay-managers, and
connectors to dssdev's. Note that this arrangement might change slightly
when support for drm_plane overlays is added.
For GEM support, non-scanout buffers are using the shmem backed pages
provided by GEM core (In drm_gem_object_init()). In the case of scanout
buffers, which need to be physically contiguous, those are allocated
with CMA and use drm_gem_private_object_init().
See userspace xorg driver:
git://github.com/robclark/xf86-video-omap.git
Refer to this link for CMA (Continuous Memory Allocator):
http://lkml.org/lkml/2011/8/19/302
Links to previous versions of the patch:
v1: http://lwn.net/Articles/458137/
v2: http://patches.linaro.org/4156/
v3: http://patches.linaro.org/4688/
v4: http://patches.linaro.org/4791/
History:
v5: move headers from include/drm at Greg KH's request, minor rebasing
on 3.2-rc1, pull in private copies of drm_gem_{get,put}_pages()
because "drm/gem: add functions to get/put pages" patch is not
merged yet
v4: bit of rework of encoder/connector _dpms() code, modeset_init()
rework to not use nested functions, update TODO.txt
v3: minor cleanups, improved error handling for dev_load(), some minor
API changes that will be needed later for tiled buffer support
v2: replace omap_vram with CMA for scanout buffer allocation, remove
unneeded functions, use dma_addr_t for physical addresses, error
handling cleanup, refactor attach/detach pages into common drm
functions, split non-userspace-facing API into omap_priv.h, remove
plugin API
v1: original
Signed-off-by: Rob Clark <rob@ti.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>