Commit graph

7 commits

Author SHA1 Message Date
Michael Neuling
c3b75bd7bb [POWERPC] Make setjmp/longjmp code usable outside of xmon
This makes the setjmp/longjmp code used by xmon, generically available
to other code.  It also removes the requirement for debugger hooks to
be only called on 0x300 (data storage) exception.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-25 22:52:50 +11:00
Stephen Rothwell
94b146ceee [POWERPC] kernel_execve is identical in 32 and 64 bit
so consolidate it into misc.S.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-11 13:34:39 +11:00
Stephen Rothwell
5adcaf50cf [POWERPC] convert string i/o operations to C
This produces essentially the same code and will make the iSeries i/o
consolidation easier.

The count parameter is changed to long since that will produce the same
(better) code on 32 and 64 bit builds.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-20 14:06:18 +10:00
Stephen Rothwell
73ea9e1bcb [POWERPC] clean up ide io accessors
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-20 14:06:18 +10:00
Stephen Rothwell
661f1cdb8b [POWERPC] remove unused asm routines
_insw, _outsw, _insl amd _outsl are all unused, so remove them.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2006-09-20 14:06:18 +10:00
Paul Mackerras
f007cacffc [POWERPC] Fix MMIO ops to provide expected barrier behaviour
This changes the writeX family of functions to have a sync instruction
before the MMIO store rather than after, because the generally expected
behaviour is that the device receiving the MMIO store can be guaranteed
to see the effects of any preceding writes to normal memory.

To preserve ordering between writeX and readX, and to preserve ordering
between preceding stores and the readX, the readX family of functions
have had an sync added before the load.

Although writeX followed by spin_unlock is not officially guaranteed
to keep the writeX inside the spin-locked region unless an mmiowb()
is used, there are currently drivers that depend on the previous
behaviour on powerpc, which was that the mmiowb wasn't actually required.
Therefore we have a per-cpu flag that is set by writeX, cleared by
__raw_spin_lock and mmiowb, and tested by __raw_spin_unlock.  If it is
set, __raw_spin_unlock does a sync and clears it.

This changes both 32-bit and 64-bit readX/writeX.  32-bit already has a
sync in __raw_spin_unlock (since lwsync doesn't exist on 32-bit), and thus
doesn't need the per-cpu flag.

Tested on G5 (PPC970) and POWER5.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-09-13 22:08:26 +10:00
Stephen Rothwell
127efeb286 [POWERPC] Consolidate some of kernel/misc*.S
There were some common functions (mainly i/o).

Also some small white space cleanups and remove a couple of small unused
functions.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-28 15:19:00 +10:00