Off-by-one error, gave erroneous divisor value 16 if speed_hz is over zero but
less than OMAP2_MCSPI_MAX_FREQ / (1 << 15), that is, [1..1463].
Also few overly complex bit shifts in divisor fixed.
Also one dev_dgb line fixed, which indicated max speed exceeding transfer speed.
Introducing a new function omap2_mcspi_calc_divisor() for getting the right
divisor in omap2_mcspi_setup_transfer().
Signed-off-by: Phil Carmody <ext-phil.2.carmody@nokia.com>
Signed-off-by: Hannu Heikkinen <ext-hannu.m.heikkinen@nokia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Make Primecell driver probe functions take a const pointer to their
ID tables. Drivers should never modify their ID tables in their
probe handler.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove a compilation error regarding unused labels that came about
when simplifying the DMA code.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The SH7757 has SPI0 module. This patch supports it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[grant.likely@secretlab.ca: fixed Makefile ordering, added
__dev{init,exit} annotations, removed DRIVER_VERSION (this is
mainline, the version == the kernel version) and tidied some
indentation & style stuff]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch adds a new SPI driver to support the Altera SOPC Builder
SPI component. It uses the bitbanging library.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch adds support of OpenCores tiny SPI driver.
http://opencores.org/project,tiny_spi
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
McSPI runtime conversion.
Changes involves:
1) remove clock framework apis to use runtime framework apis.
2) context restore from runtime resume which is a callback for get_sync.
3) Remove SYSCONFIG(sysc) register handling
(a) Remove context save and restore of sysc reg and remove soft reset
done from sysc reg as this will be done with hwmod framework.
(b) Also cleanup sysc reg bit macros.
4) Rename the omap2_mcspi_reset function to omap2_mcspi_master_setup
function as with hwmod changes soft reset will be done in
hwmod framework itself and use the return value from clock
enable function to return for failure scenarios.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Reviewed-by: Partha Basak <p-basak2@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cleans up all base address definitions for omap_mcspi
and adapts the device registration and driver to hwmod framework.
Changes involves:
1) Removing all base address macro defines.
2) Using omap-device layer to register device and utilizing data from
hwmod data file for base address, dma channel number, Irq_number,
device attribute(number of chipselect).
3) Appending base address with pdata reg_offset for omap4 boards.
For omap4 all regs used in driver deviate with reg_offset_macros
defined with an value of 0x100. So pass this offset through pdata
and append the same to base address retrieved from hwmod data file
and we are not mapping *_HL_* regs which are not used in driver.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Reviewed-by: Partha Basak <p-basak2@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The hardware seems to have a race condition when the inactive
channels are in slave mode. We support master mode only, so
we can just switch all channels to master mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[ukleinek: add more verbose comment about the race]
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This utilizes the new core voltage switch to power off the PL022
core voltage when it's not in use transmitting packets, if and
only if a core voltage switch is available.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This simplifies the DMA code a bit by using the dmaengine helpers.
The cookie from descriptor submission can be ignored in this case
as has been established in review of the MMCI/PL180 driver.
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
setup_transfer is mandatory if spi_bitbang_transfer is used, so
check for it during initialization and not each time during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
If there is an error with setting up a transfer, we need to return
immediately rather than trying to continue to process things. We
already set up the error states for the caller at this point.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We can do multiples of 8bit transfers when using the hardware CS and a
little bit of magic, so make it work.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Right now the platform device and its platform data is included in one big
struct which requires its custom ->release function. The problem with the
release function within the driver is that it might be called after the
driver was removed because someone was holding a reference to it and it
was not called right after platform_device_unregister(). So we also free
the platform device memory to which one might hold a reference.
This patch uses the normal pdev functions so this kind of race does not
occur.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Add the compat_ioctl for operations on /dev/spi* so that 32 bit
userspace applications can access SPI. As far as I can see all data
structure are already prepared for that, so no additional conversion has
to be done.
My use case is MIPS with N32 userspace ABI and toolchain, and that was
also the platform where I tested it successfully (Cavium Octeon).
Signed-off-by: Bernhard Walle <walle@corscience.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We want to have just CONFIG_ARCH_OMAP2, 3 and 4. The rest
are nowadays just subcategories of these.
Search and replace the following:
ARCH_OMAP2420 SOC_OMAP2420
ARCH_OMAP2430 SOC_OMAP2430
ARCH_OMAP3430 SOC_OMAP3430
No functional changes.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Sourav Poddar <sourav.poddar@ti.com>
Instead of sending data 8 bits at a time in 8-bit SPI mode, swap bytes
and send and receive them 32 bits at a time. Tested with an SD-card,
with which this patch reduced the number of interrupts by 50%, when
reading 5MiB of data (there are also small service packets, the number
of interrupts, produced by 512-byte sectors should, of course, drop by
75%), and improved throughput by more than 40%.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
NULL + <small offset> != NULL, but reading from that <small offset> address
is usually not a very good idea and often leads to problems, like kernel
Oopses in this case, easily reproducible by writing to an SD-card, used in
SPI mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Having conditional around the of_match_table and the of_node pointers
turns out to make driver code use ugly #ifdef blocks. Drop the
conditionals and remove the #ifdef blocks from the affected drivers.
Also tidy up minor whitespace issues within the same hunks.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits)
MIPS: Malta: enable Cirrus FB console
MIPS: add CONFIG_VIRTUALIZATION for virtio support
MIPS: Implement __read_mostly
MIPS: ath79: add common WMAC device for AR913X based boards
MIPS: ath79: Add initial support for the Atheros AP81 reference board
MIPS: ath79: add common SPI controller device
SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
MIPS: ath79: add common GPIO buttons device
MIPS: ath79: add common watchdog device
MIPS: ath79: add common GPIO LEDs device
MIPS: ath79: add initial support for the Atheros PB44 reference board
MIPS: ath79: utilize the MIPS multi-machine support
MIPS: ath79: add GPIOLIB support
MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs
MIPS: jump label: Add MIPS support.
MIPS: Use WARN() in uasm for better diagnostics.
MIPS: Optimize TLB handlers for Octeon CPUs
MIPS: Add LDX and LWX instructions to uasm.
MIPS: Use BBIT instructions in TLB handlers
MIPS: Declare uasm bbit0 and bbit1 functions.
...
The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This
patch implements a driver for that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: spi-devel-general@lists.sourceforge.net
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1960/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Without this fix reloading of the driver is impossible.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
clk_freq is used uninitialized in pl022_setup routine. This patch
fix compilation warning for using uninitialized variable
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch enables the existing S3C64XX series SPI driver for S5P64X0
and removed dependency on EXPERIMENTAL because we don't need it now.
v3: Changed dependency of S3C64XX_DMA
v2: Removed dependency on EXPERIMENTAL
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
clk_get() returns a struct clk cookie to the driver and some platforms
may return NULL if they only support a single clock. clk_get() has only
failed if it returns a ERR_PTR() encoded pointer.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Some platforms have been known to return NULL from clk_get() if they
support only a single struct clk. Whilst tegra doesn't do this, make
the drivers consistent with others.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6:
spi / PM: Support dev_pm_ops
PM: Prototype the pm_generic_ operations
PM / Runtime: Generic resume shouldn't set RPM_ACTIVE unconditionally
PM: Use dev_name() in core device suspend and resume routines
PM: Permit registration of parentless devices during system suspend
PM: Replace the device power.status field with a bit field
PM: Remove redundant checks from core device resume routines
PM: Use a different list of devices for each stage of device suspend
PM: Avoid compiler warning in pm_noirq_op()
PM: Use pm_wakeup_pending() in __device_suspend()
PM / Wakeup: Replace pm_check_wakeup_events() with pm_wakeup_pending()
PM: Prevent dpm_prepare() from returning errors unnecessarily
PM: Fix references to basic-pm-debugging.txt in drivers-testing.txt
PM / Runtime: Add synchronous runtime interface for interrupt handlers (v3)
PM / Hibernate: When failed, in_suspend should be reset
PM / Hibernate: hibernation_ops->leave should be checked too
Freezer: Fix a race during freezing of TASK_STOPPED tasks
PM: Use proper ccflag flag in kernel/power/Makefile
PM / Runtime: Fix comments to match runtime callback code
* 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (77 commits)
spi/omap: Fix DMA API usage in OMAP MCSPI driver
spi/imx: correct the test on platform_get_irq() return value
spi/topcliff: Typo fix threhold to threshold
spi/dw_spi Typo change diable to disable.
spi/fsl_espi: change the read behaviour of the SPIRF
spi/mpc52xx-psc-spi: move probe/remove to proper sections
spi/dw_spi: add DMA support
spi/dw_spi: change to EXPORT_SYMBOL_GPL for exported APIs
spi/dw_spi: Fix too short timeout in spi polling loop
spi/pl022: convert running variable
spi/pl022: convert busy flag to a bool
spi/pl022: pass the returned sglen to the DMA engine
spi/pl022: map the buffers on the DMA engine
spi/topcliff_pch: Fix data transfer issue
spi/imx: remove autodetection
spi/pxa2xx: pass of_node to spi device and set a parent device
spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes.
spi/pxa2xx: Add chipselect support for Sodaville
spi/pxa2xx: Consider CE4100's FIFO depth
spi/pxa2xx: Add CE4100 support
...
Running the latest kernel on the 4430SDP board with DMA API debugging
enabled results in this:
WARNING: at lib/dma-debug.c:803 check_unmap+0x19c/0x6f0()
NULL NULL: DMA-API: device driver tries to free DMA memory it has not allocated
[device address=0x000000008129901a] [size=260 bytes]
Modules linked in:
Backtrace:
[<c003cbe0>] (dump_backtrace+0x0/0x10c) from [<c0278da8>] (dump_stack+0x18/0x1c)
r7:c1839dc0 r6:c0198578 r5:c0304b17 r4:00000323
[<c0278d90>] (dump_stack+0x0/0x1c) from [<c005b158>] (warn_slowpath_common+0x58/0x70)
[<c005b100>] (warn_slowpath_common+0x0/0x70) from [<c005b214>] (warn_slowpath_fmt+0x38/0x40)
r8:c1839e40 r7:00000000 r6:00000104 r5:00000000 r4:8129901a
[<c005b1dc>] (warn_slowpath_fmt+0x0/0x40) from [<c0198578>] (check_unmap+0x19c/0x6f0)
r3:c03110de r2:c0304e6b
[<c01983dc>] (check_unmap+0x0/0x6f0) from [<c0198cd8>] (debug_dma_unmap_page+0x74/0x80)
[<c0198c64>] (debug_dma_unmap_page+0x0/0x80) from [<c01d5ad8>] (omap2_mcspi_work+0x514/0xbf0)
[<c01d55c4>] (omap2_mcspi_work+0x0/0xbf0) from [<c006dfb0>] (process_one_work+0x294/0x400)
[<c006dd1c>] (process_one_work+0x0/0x400) from [<c006e50c>] (worker_thread+0x220/0x3f8)
[<c006e2ec>] (worker_thread+0x0/0x3f8) from [<c00738d0>] (kthread+0x88/0x90)
[<c0073848>] (kthread+0x0/0x90) from [<c005e924>] (do_exit+0x0/0x5fc)
r7:00000013 r6:c005e924 r5:c0073848 r4:c1829ee0
---[ end trace 1b75b31a2719ed20 ]---
I've no idea why this driver uses NULL for dma_unmap_single instead of
the &spi->dev that is laying around just waiting to be used in that
function - but it's an easy fix.
Also replace this comment with a FIXME comment:
/* Do DMA mapping "early" for better error reporting and
* dcache use. Note that if dma_unmap_single() ever starts
* to do real work on ARM, we'd need to clean up mappings
* for previous transfers on *ALL* exits of this loop...
*/
as the comment is not true - we do work in dma_unmap() functions,
particularly on ARMv6 and above. I've corrected the existing unmap
functions but if any others are required they must be added ASAP.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The test "if (spi_imx->irq <= 0)" is not testing the IRQ value, but
the return value of platform_get_irq(). As platform_get_irq() can
return an error (-ENXIO) or the IRQ value it found, the test should be
"if (spi_imx->irq < 0)"
[grant.likely: Note: In general, Linux irq number 0 should also mean
no irq, but arm still allows devices to be assigned 0, and the imx
platform uses 0 for one of the spi devices, so this patch is needed
for the device to work]
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
After grabbing a msg from the msgq, the mcfqspi_work function calls
list_del_init on the mcfqspi->msgq which unintentionally deletes the rest
of the list before it can be processed. If qspi call was made using
spi_sync, this can result in a process hang.
Signed-off-by: Jate Sujjavanich <jsujjavanich@syntech-fuelmaster.com>
Acked-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The user must read N bytes of SPIRF (1 <= N <= 4) that do not exceed the
amount of data in the receive FIFO, so read the SPIRF byte by byte when
the data in receive FIFO is less than 4 bytes.
On Simics, when read N bytes that exceed the amout of data in receive
FIFO, we can't read the data out, that is we can't clear the rx FIFO,
then the CPU will loop on the espi rx interrupt.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
When SPI wake up from OFF mode, CS is in the wrong state: force it to the
inactive state.
During the system life, I monitored the CS behavior using a oscilloscope.
I also activated debug in omap2_mcspi, so I saw when driver disable the clocks
and restore context when device is not used.Each time the CS was in the correct
state. It was only when system was put suspend to ram with off-mode activated
that on resume the CS was in wrong state( ie activated).
Changelog:
* Change from v1 to v2:
- Rebase on linus/master (after 2.6.37-rc1)
- Do some clean-up and fix indentation on both patches
- Add more explanations for patch 2
* Change from v2 to v3:
- Use directly resume function of spi_master instead of using function
- from spi_device as Grant Likely pointed it out.
- Force this transition explicitly for each CS used by a device.
* Change from v3 to v4:
- Patch clean-up according to Kevin Hilman and checkpatch.
- Now force CS to be in inactive state only if it was inactive when it was
suspended.
* Change from v4 to v5:
- Rebase on linus/master (after 2.6.37-rc3)
- Collapse some lines as pointed by Grant Likely
- Fix a spelling
* Change from v5 to v6:
- Rebase on linus/master (after 2.6.37-rc7)
- Use CONFIG_SUSPEND instead of CONFIG_PM
- Didn't use legacy PM methods anymore. Instead, add a struct dev_pm_ops and
add the resume method there.
- Fix multi-line comment style
* Change from v6 to v7:
- Rebase on linus/master (after 2.6.37-rc8)
- Drop an extra line
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next
spi/pxa2xx: register driver properly
spi/pxa2xx: add support for shared IRQ handler
spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers
arm/pxa2xx: reorgazine SSP and SPI header files
spi/pxa2xx: Add CE4100 support
spi/pxa2xx: Consider CE4100's FIFO depth
spi/pxa2xx: Add chipselect support for Sodaville
spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes.
spi/pxa2xx: pass of_node to spi device and set a parent device
* 'for-grant' of git://arago-project.org/git/projects/linux-davinci into spi/next
spi: davinci: fix checkpatch errors
spi: davinci: whitespace cleanup
spi: davinci: remove unused variable 'pdata'
spi: davinci: set chip-select mode in SPIDEF only once
spi: davinci: enable both activation and deactivation of chip-selects
spi: davinci: remove unnecessary data transmit on CS disable
spi: davinci: enable GPIO lines to be used as chip selects
spi: davinci: simplify prescalar calculation
spi: davinci: remove 'wait_enable' platform data member
spi: davinci: make chip-slect specific parameters really chip-select specific
spi: davinci: consolidate setup of SPIFMTn in one function
spi: davinci: setup chip-select timers values only if timer enabled
spi: davinci: add support for wait enable timeouts
spi: davinci: remove unused members of davinci_spi_slave
spi: davinci: eliminate the single member structure davinci_spi_slave
spi: davinci: eliminate unnecessary update of davinci_spi->count
spi: davinci: simplify calculation of edma acount value
spi: davinci: check for NULL buffer pointer before using it
spi: davinci: remove unnecessary disable of SPI
spi: davinci: remove unnecessary 'count' variable in driver private data
spi: davinci: remove unnecessary completion variable initialization
spi: davinci: remove non-useful interrupt mode support
spi: davinci: simplify poll mode transfers
spi: davinci: add support for interrupt mode
spi: davinci: configure the invariable bits in spipc0 only once
spi: davinci: remove unnecessary function davinci_spi_bufs_prep()
spi: davinci: remove unnecessary call to davinci_spi_setup_transfer()
spi: davinci: do not store DMA channel information per chip select
spi: davinci: always start transmit DMA
spi: davinci: do not use temporary buffer if no transmit data provided
spi: davinci: always start receive DMA
spi: davinci: use edma_write_slot() to setup EDMA PaRAM slot
spi: davinci: fix DMA event generation stoppage
spi: davinci: fix EDMA CC errors at end of transfers
spi: davinci: handle DMA completion errors correctly
spi: davinci: remove usage of additional completion variables for DMA
spi: davinci: let DMA operation be specified on per-device basis
spi: davinci: remove non-useful "clk_internal" platform data
spi: davinci: enable and power-up SPI only when required
spi: davinci: setup the driver owner
spi: davinci: add additional comments
spi: davinci: add EF Johnson Technologies copyright
spi: davinci: removed unused #defines
spi: davinci: remove unnecessary typecast
spi: davinci: do not treat Tx interrupt being set as error
spi: davinci: do not allocate DMA channels during SPI device setup
spi: davinci: remove unnecessary private data member 'region_size'
spi: davinci: shorten variable names
spi: davinci: kconfig: add manufacturer name to prompt string
Allow SPI drivers to use runtime PM and other dev_pm_ops features by
implementing dev_pm_ops for the bus. The existing bus specific suspend
and resume functions will be called if a driver does not provide dev_pm_ops
allowing for transition to the new model.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* 'merge' of git://git.secretlab.ca/git/linux-2.6:
spi/mpc52xx-spi: fix annotation for remove()-pointer
spi/fsl_espi: fix wrong setting of the address in the command buffer
spi/fsl_espi: change the read behaviour of the SPIRF
of/i2c: Fix request module by alias
powerpc/mpc5200: include fs.h in mpc52xx_gpt.c
Probe/remove should be in __devinit/__devexit. Found by a section-mismatch
warning. Also, copy do_remove() over to remove().
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Or else we can't operate on the right address when the trans length
is greater than 65535.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The user must read N bytes of SPIRF (1 <= N <= 4) that do not exceed the
amount of data in the receive FIFO, so read the SPIRF byte by byte when
the data in receive FIFO is less than 4 bytes.
On Simics, when read N bytes that exceed the amount of data in receive
FIFO, we can't read the data out, that is we can't clear the rx FIFO,
then the CPU will loop on the espi rx interrupt.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
dw_spi driver in upstream only supports PIO mode, and this patch
will support it to cowork with the Designware dma controller used
on Intel Moorestown platform, at the same time it provides a general
framework to support dw_spi core to cowork with dma controllers on
other platforms
It has been tested with a Option GTM501L 3G modem and Infenion 60x60
modem. To use DMA mode, DMA controller 2 of Moorestown has to be enabled
Also change the dma interface suggested by Linus Walleij.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Feng Tang <feng.tang@intel.com>
[Typo fix and renames to match intel_mid_dma renaming]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The SPI polling loop timeout only works with HZ=100 as the loop was
actually too short.
Also add appropriate cpu_relax() in the busy wait loops...
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This variable is a bool but defined an int and defined completely
backwards. This makes the code more readable.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The sglen return by the dma_map_sg() should be passed to the DMA
engine, not the one passed in. If we one day have a DMA mapper
that can coalesce entries, this will bug due to a too large
number of entries being passed in.
Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The struct device for the DMA engine is the apropriate one to use
when mapping/unmapping buffers. This is because the memory which
is addressable by DMA is determined by the DMA engine rather than
the device.
Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
It seems spi_topcliff_pch of linux-2.6.37-rc6 degraded by previous patch.
In fact, data transfer fails on evaluation board testing.
I found like the following register miss-setting line.
Using this patch, I have confirmed data transfer can work well.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
There are no machines in-tree that still use the driver
name as device name. So save a few bytes and remove it.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This was fixed by David Lamparter in v2.6.36-rc5 3486008 ("spi: free
children in spi_unregister_master, not siblings") and broken again in
v2.6.37-rc1~2^2~4 during the merge of 2b9603a0 ("spi: enable
spi_board_info to be registered after spi_master").
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: David Lamparter <equinox@diac24.net>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Conflicts:
MAINTAINERS
arch/arm/mach-omap2/pm24xx.c
drivers/scsi/bfa/bfa_fcpim.c
Needed to update to apply fixes for which the old branch was too
outdated.
There is a possibility that the last word of a transaction will be lost
if data is not ready. Re-read in poll_transfer() to solve this issue
when poll_mode is enabled.
Verified on SPI touch screen device.
Signed-off-by: Major Lee <major_lee@wistron.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
After all TX bytes are sent, the driver spins while the SPI core is busy
and then it spins for a "short" period of time until RX bytes are
available.
On Sodavile the busy flag disappears pretty quick and after that it
takes approx ~130ms (sometimes less but not much) until there are bytes
available in the RX FIFO.
This patch removes the busy loop and modifies the RX threshould so we
get woken up once the remainings bytes arrived.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
The SPI core on Sodaville supports chip selects. Its configuration
moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked
up with up to 4 devices.
This patch ensures that the bits which are otherwiese reserved are only
touched on Sodaville and not on any other PXAs. Also it makes sure that
the status register does not lose the CS information while clearing the
ROR bit.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
For PXA the default threshold is FIFO_DEPTH / 2. Adjust this value for
CE4100.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Sodaville's SPI controller is very much the same as in PXA25x. The
difference:
- The RX/TX FIFO is only 4 words deep instead of 16
- No DMA support
- The SPI controller offers a CS functionality
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
The PXA-SPI driver relies on some files / defines which are arm specific
and are within the ARM tree. The CE4100 SoC which is x86 has also the
SPI core.
This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to
include/linux where the CE4100 can access them.
This move got verified by building the following defconfigs:
cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig
imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig
raumfeld_defconfig magician_defconfig
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
This is required in case the interrupt line is shared with other
devices.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
passing argument 2 of 'dma_map_single' discards qualifiers from pointer target type
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
use platform_driver_register instead of platform_driver_probe. The
latter only checks available devices at the time of calling. So if a
device gets inserter at a later point in time then the driver will never
play with it.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Add manufacturer name to the Kconfig prompt string and move
the controller name to the begining of the prompt.
This helps locate the driver easily among the list of existing
drivers.
While at it, also add information about being able to build
the driver as module.
Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Shorten names of local variables and structure members where
possible.
Local variables:
* 'davinci_spi' is being renamed 'dspi'
* 'davinci_spi_dma' is being renamed 'dma'
Structure members:
* 'dma_{tx|rx}_channel' is being renamed '{tx|rx}_channel'
since the structure containing them is already called
'davinci_spi_dma'
* 'davinci_spi_dma' in 'davinci_spi' structure is being
renamed 'dma'
Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Remove unnecesary private data member 'region_size'
being used to store the size of SPI memory region.
Instead, get the memory resource size directly from
the platform data.
Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add copyright for EF Johnson Technologies since the driver
has been majorly overhauled by Brian.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add comments describing the platform data members
and per-chip-select SPI configuration structure.
Also, add some comments describing the what happens
during the driver probe.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Setup the owner member of the platform driver to THIS_MODULE
instead of leaving it NULL.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Enable SPI only when active transfers are in progress. Keep
it in local low power when not in use.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The "clk_internal" platform data member which contols the
CLKMOD bit in Global Control Register 1 is not useful
since CLKMOD needs be set to 1 *always* to ensure master
mode operation.
Remove this platform data.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Let DMA operation be specified on a per-device basis instead
of selecting it once during probe.
A side effect of this is the need to combine the PIO and DMA buffer
txrx_bufs routine. This is good since they anyway share some common
functionality.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The DMA code does not use the existing completion variable 'done'
which is being used for interrupt mode transfers. Instead it uses
two different completion variables specific to DMA mode transfers.
Eliminate the usage of new completion variables for DMA mode and
use the existing completion variable.
[nsekhar@ti.com: To make this process easy, eliminate the two
different DMA completion callback functions for tx and rx and
use a single callback function instead]
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Do not simply clean the DMA channel on a DMA completion
error. Instead, use wcount and rcount members of davinci_spi
to detecion non-completion of DMA and signal EIO to the
application.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Use a dummy param slot linked to itself to take care of the
extra "sync event" that gets sent to EDMA controller after
the last byte has been transferred.
The dummy PaRAM slot that is linked to the actual DMA PaRAM
slot "absorbs" this event and prevents a EDMA CC error to
be asserted.
Without this provision, the EDMA CC error would be asserted
because the channel PaRAM would be empty after the transfer
and EDMA would not know what to make out of the extra sync
event.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Do not allocate (and de-allocate) SPI DMA channels during setup
(and cleanup) for each SPI device. Instead, allocate the DMA
channels once duing probe and use them for the life time of
the driver.
This makes sense since there are dedicated DMA channels meant
for SPI use.
This also helps remove the unnecessary DMA "sync_dev" variables
being used to store DMA channel information.
Also, the "use_dma" platform variable is now eliminated since
it is possible to check if the platform supports DMA or not
based upon whether DMA resources can be found or not.
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Do not stop SPI DMA event generation in either transmit or
receive DMA event call back because the single setting affects
both transmit and receive event generation.
Depending on the order in which the callbacks happen, transmit
or receive events can get unintentionally stalled.
Instead, disable event generation once after both the transmit
and receive DMA completes.
While at it, remove the largely under-used function to set or
clear DMA event generation.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Currently a series of EDMA API calls are being made to setup
various aspects of EDMA PaRAM slots for receive and transmit.
Instead setup the PaRAM using a local structure and write once
to the hardware using edma_write_slot()
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
In keeping with the full duplex nature of the SPI bus. Always
start receive DMA along with transmit DMA.
If there is no receive buffer provided with the transfer, use
a temporary buffer to receive the data to be thrown away.
[michael.williamson@criticallink.com: receive DMA size should
be same as transfer length to avoid hang-up when transfer length
is smaller than temporary rx buffer size (rx buffer not provided)]
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Remove usage of temporary buffer when no transmit data is provided.
Instead, use the transmit register itself as the source of data.
By choosing the transmit register itself as the source of data, this
patch helps remove unnecessary accesses to memory when no real data
is being transmitted.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Due to the full duplex nature of the SPI bus, the SPI master
on DaVinci needs transmit to be active even if the tranfer is
only meant to collect receive data.
The current code achieves this by using a temporary zeroed buffer
to provide DMA data in case the transfer does not have a transmit
buffer provided.
However, the transmit DMA is started only if transmit buffer is
provided rendering the temporary buffer unused. Instead the code
relies on a write to SPIDAT1 register to trigger transmit operation.
This however only sends two bytes of data.
Fix this by starting transmit DMA always.
This changes exposes a bug on DM355 where the CSHOLD bit in
SPIDAT1 needs to be written to in between transfers. Handle
that by introducing a "cshold_bug" platform data which is
set to true for DM355.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Do not store DMA channel related information per chip-select since
that information does not depend on the chip select.
The same DMA channels can be used for transfers on all chip-selects
since the transfer happens one-at-a-time.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Remove unnecessary call to davinci_spi_setup_transfer() at the end
of davinci_spi_setup().
davinci_spi_setup_transfer() is registered as the setup_transfer
callback for the bitbang layer and is called independently by
the bitbang layer to setup the transfer before it begins.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The function davinci_spi_bufs_prep() is doing stuff that
davinci_spi_setup() is doing. Eliminate it and move the work
to davinci_spi_setup()
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Configure the data-in, data-out and clock functionality pins
in SPIPC0 register only once during probe. No need to set these
bits for each transfer.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add support for SPI interrupt mode operation.
Define a per chip-select "io type" variable which
specifies if the transfers on this chip-select should
happen in interrupt mode or polled mode.
Introduce a new function davinci_spi_process_events()
to help consolidate the code between interrupt mode
processing and polled mode processing.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Use the fact that the get_tx and get_rx can now cope with
NULL buffer pointers to simplify the poll mode transfer
code.
While at it, check for SPI errors every transfer rather than
at the end of the whole transfer.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The interrupt mode support as it stands is another version
of poll mode. Even when interrupt mode is selected, the code
tight loops on interrupt status register, rendering it totally
useless. A completion variable is initialized, but never used.
Remove this fake interrupt mode since users can anyway use
poll mode with no functional difference. A usefully implemented
interrupt mode support can be added later.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
