Core can set the msbits constraint in behalf of the dai.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Throughout the sgtl5000 driver source code and also in the sgtl5000 datasheet
the revision code is shown in hexadecimal.
Print it hex format, for consistency.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If an interrupt is supplied then use it for thermal warning and FLL lock
notifications. When using the interrupt raise the timeout for the FLL lock
substantially to reduce the chances of spurious warnings.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This must be a leftover from a previous driver.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Much more compact, both in terms of source and especially in terms of
RAM used at runtime.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
remove unnecessary inclusion of machine specific header
file mach/dm365.h from cq93vc.c voice codec driver
which comes in the way of platform code consolidation.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Provide a method for mach drivers to query the HS DC offset step size in mV.
Signed-off-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The register map for this device is actually fairly sparse so the rbtree
should be beneficial.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Ensures that we get control of the CODEC earlier and don't try to probe
the card at all if register I/O isn't working.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Helps push the register cache code down out of ASoC and improves resume
times by using the more efficient regmap cache sync code.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
With a low frequency SYSCLK and a fast I2C clock register synchronisation
may occasionally take too long to take effect, causing I/O issues. Disable
synchronisation in order to avoid any issues.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
These are all to either uncached registers or fixes to register defaults,
in the former case the cache won't do anything and in the latter case
we're fixing things so the cache sync will do the right thing.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
Writing to the registers won't work if we do actually manage to hit a fully
powered off state.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org