Commit Graph

4 Commits (7d6524f035e25fc3abd806f62e5345f911b9d10a)

Author SHA1 Message Date
Grant Likely e077b50c29 [POWERPC] Uartlite: Revert register io access changes
Reverts commit a15da8eff3

This driver is used by devices other than the xilinx opb-uartlite which
depend on bytewise access to the registers.  The change to 32 bit access
does not work on these devices.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:37:41 -05:00
Grant Likely a15da8eff3 [POWERPC] Uartlite: Fix reg io to access documented register size
The Uartlite data sheet defines the registers as 32 bit wide.  This
patch changes the register access to use 32 bit transfers and eliminates
the magic +3 offset which is currently required to make the device
work.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Williams <jwilliams@itee.uq.edu.au>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:23:14 -05:00
Grant Likely a527ad88a2 [POWERPC] xilinxfb: Parameterize xilinxfb platform device registration
This allows multiple xilinxfb devices to be registered and used.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
cc: Andrei Konovalov <akonovalov@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-11 13:24:40 +10:00
Grant Likely d26cd57071 [POWERPC] New registration for common Xilinx Virtex ppc405 platform devices
Currently virtex support in mainline make use of the infrastructure in
arch/ppc/syslib/ppc_sys.c for registering common devices on virtex ppc405
platforms.  The ppc_sys.c code is not well suited to the dynamic nature of
FPGA designs and makes adding new board ports more complex.  This patch
adds a new listing of common devices which does not depend on the ppc_sys.c
infrastructure.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-04-30 11:02:04 +10:00