Commit Graph

1307 Commits (79f9df7c0027742ae7c913367b6d88dec242fa63)

Author SHA1 Message Date
Roland Stigge 79f9df7c00 mtd: lpc32xx_mlc: Adjust to pl08x DMA interface changes
This patch adjusts the LPC32xx MLC NAND driver to the new pl08x DMA interface,
fixing the compile error resulting from changed pl08x structures.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-13 16:27:34 +01:00
Roland Stigge 314a15664e mtd: lpc32xx_slc: Adjust to pl08x DMA interface changes
This patch adjusts the LPC32xx SLC NAND driver to the new pl08x DMA interface,
fixing the compile error resulting from changed pl08x structures.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-13 16:27:24 +01:00
Roland Stigge 70f7cb78ec mtd: add LPC32xx MLC NAND driver
This patch adds a driver for the MLC NAND controller of the LPC32xx SoC.

[dwmw2: 21st century pedantry]

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:27:04 +01:00
Roland Stigge d5842ab730 mtd: lpc32xx_slc: Make probe() return -EPROBE_DEFER if necessary
Via of_get_named_gpio(), wp_gpio can become -EPROBE_DEFER which now makes
probe() return -EPROBE_DEFER as well to wait until the gpio controller is
probed before trying to probe lpc32xx_slc again.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:25:25 +01:00
Roland Stigge 21535ab39a mtd: lpc32xx_slc: Use of_get_named_gpio()
This patch makes the lpc32xx_slc driver use of_get_named_gpio() instead of
of_get_named_gpio_flags() whose flags are discarded anyway.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:25:16 +01:00
Alexandre Pereira da Silva df63fe7657 mtd: lpc32xx_slc: Make wp gpio optional
This patch supports missing wp gpio.

Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-07-06 18:24:56 +01:00
Josh Wu 1c7b874d33 mtd: at91: atmel_nand: add Programmable Multibit ECC controller support
The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.

To use PMECC in this driver, the user needs to set the address and size of
PMECC, PMECC error location controllers and ROM. And also needs to pass the
correction capability, the sector size and ROM lookup table offsets via dt.

This driver has been tested on AT91SAM9X5-EK and AT91SAM9N12-EK with JFFS2,
YAFFS2, UBIFS and mtd-utils.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:23:25 +01:00
Josh Wu a41b51a1f7 mtd: at91: add dt parameters for Atmel PMECC
Add DT support for PMECC parameters.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:21:09 +01:00
Brian Norris 718894ad94 mtd: nand_bbt: refactor check_pattern_no_oob()
This function only returns 0 or -1, so make that clear.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:08 +01:00
Brian Norris 9fd6b37a08 mtd: nand: rename "no_bbt" descriptors to "no_oob"
These descriptors are for BBT's that don't use OOB; the "no_bbt" name doesn't
really make sense.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:08 +01:00
Richard Genoud 947c9adb42 mtd: nand: remove stale config options
The commit bf4289cba0 removed the use of
CONFIG_MTD_NAND_ATMEL_ECC_NONE and CONFIG_MTD_NAND_ATMEL_ECC_HW but the
Kconfig file was forgotten.

This patch remove those inoperative options.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:08 +01:00
Brian Norris 9d9a881162 mtd: nand: change "AMD" manuf. ID to "AMD/Spansion"
This manufacturer ID is used under the name Spansion.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:08 +01:00
Roland Stigge 2944a44da0 mtd: add LPC32xx SLC NAND driver
This patch adds support for the SLC NAND controller inside the LPC32xx SoC.

[dwmw2: 21st century pedantry]

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:07 +01:00
Josh Wu fdbad98dff mtd: nand: teach write_page and write_page_raw return an error code
There is an implemention of hardware ECC write page function which may return an
error indication.
For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware
engine will compute the BCH ecc code for this page. so we need read a the
status register to theck whether the ecc code is generated.
But we cannot assume the status register always can be ready, for example,
incorrect hardware configuration or hardware issue, in such case we need
write_page() to return a error code.

Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'.
So this patch will:
  1. add return 'int' value for 'write_page' function.
  2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too.
  3. add code to test the return value, and if negative, indicate an
  error happend when write page with ECC.
  4. fix the compile warning in all impacted nand flash driver.

Note: I couldn't compile-test all of these easily, as some had ARCH dependencies.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:07 +01:00
Josh Wu 3dfe41a4c7 mtd: at91: extract hw ecc initialization to one function
This patch moves hw ecc initialization code to one function.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:07 +01:00
Shmulik Ladkani 7bb9c75436 mtd: nand: Use the mirror BBT descriptor when reading its version
The code responsible for reading the version of the mirror bbt was
incorrectly using the descriptor of the main bbt.

Pass the mirror bbt descriptor to 'scan_read_raw' when reading the
version of the mirror bbt.

Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: stable@vger.kernel.org [v2.6.37+]
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:06 +01:00
Sascha Hauer 71718a8edf mtd: mxc_nand: add i.MX53 support
The only relevant change between i.MX51 and i.MX53 is that
a bitfield is shifted one bit to the left.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:06 +01:00
Sascha Hauer 71885b650a mtd: mxc_nand: swap iomem resource order
The i.MX v3 nand controller (i.MX5) needs two memory resources.
Traditionally we have the AXI resource first. For sorting in this
driver into the devicetree it feels much more natural to have the
IP resource first. This patch swaps the ordering of these two
resources.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:06 +01:00
Sascha Hauer e4a09cbf2d mtd: mxc_nand: Use managed resources
To make the error path simpler and to make subsequent patches
easier.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:05 +01:00
Scott Wood 874d72c4fe mtd: elbc nand: use drvdata to only remove the relevant chip
Previously the remove method was looping and removing all chips,
which is obviously not the right thing to do — left over from when
the driver was organized differently and that was the remove method for
the entire controller.  This would result in bad things happening if
you have more than one NAND chip, and remove the module.

This also fixes priv->dev to properly point to the chip's device rather than
the controller's.  Until now priv->dev was only used for error/debug prints
(and it's an improvement there), so this shouldn't break anything.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:05 +01:00
Fabio Estevam 3d059693f6 nand: mxc_nand: Use clk_prepare_enable/clk_disable_unprepare
Prepare the clock before enabling it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:05 +01:00
Brian Norris 1696e6bc2a mtd: nand: kill NAND_NO_READRDY
According to its documentation, the NAND_NO_READRDY option is always used
when autoincrement is not supported. Autoincrement support was recently
dropped, so we can drop this options as well (defaulting to "no read ready
check").

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:05 +01:00
Brian Norris b1ccfab31a mtd: nand: add Eon Silicon Solutions manufacturer ID
Eon's new NAND flash: EN27LN1G08.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:04 +01:00
Bastian Hecht 3166df0d04 mtd: sh_flctl: Use user oob data in hardware ECC mode
In hardware ecc mode, the flctl now writes and reads the oob data
provided by the user. Additionally the ECC is now returned in normal
page reads, not only when using the explicit NAND_CMD_READOOB command.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:04 +01:00
Bastian Hecht 6667a6d58e mtd: sh_flctl: Restructure the hardware ECC handling
There are multiple reasons for a rewrite:
 - a race exists: when _4ECCEND is set, _4ECCFA may become true too
   meanwhile, which is lost and a non-correctable error is treated as
   correctable.
 - the ECC statistics don't get properly propagated to the base code.
 - empty pages would get marked as corrupted

The rewrite resolves the issues and I hope it gives a more explicit
code flow structure.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:04 +01:00
Bastian Hecht 623c55caa3 mtd: sh_flctl: Group sector accesses into a single transfer
When we use hardware ecc, the flctl is run in so-called "sector access
mode". We can bundle 4 sector accesses when using 2KiB page sizes to read
a whole page at once and speed up things.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:04 +01:00
Bastian Hecht 50ed399cc3 mtd: sh_flctl: Simplify the hardware ecc page read/write
As the equation mtd->writesize == eccsteps * eccsize holds, we can
simplify the code. The second loop of the 1st hunk is never entered,
so we delete it.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:03 +01:00
Bastian Hecht ef4ce0bcb3 mtd: sh_flctl: Fix hardware ECC behaviour
The flctl uses 10 bytes ECC data for every 512 bytes sector. This patch
makes the controller write all 40 bytes instead of 10 bytes only.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:03 +01:00
Bastian Hecht aa32d1f060 mtd: sh_flctl: Use different OOB layout
The flctl hardware has changed and a new OOB layout must be adapted for
2KiB page size NAND chips when using hardware ECC.
The related bit fields ECCPOS[0-2] are gone — the bits are marked as
reserved now in the datasheet. As there are no official users of the
hardware ECC so far, they are completely removed.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:03 +01:00
Bastian Hecht 3c7ea4eccf mtd: sh_flctl: Add support for error IRQ
When the data transfer between the controller and the NAND chip fails,
we now get notified.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:03 +01:00
Bastian Hecht cb54751d7a mtd: sh_flctl: Add missing iounmap()
Add the unmapping for the error case and for the driver removal.

Signed-off-by: Bastian Hecht <hechtb@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:03 +01:00
Brian Norris 271b874ba1 mtd: nand: gpmi: need to use {read,write}_oob_raw
This patch is simply an added warning in the comments. Ideally, this patch
need not be merged, but rather, a developer will write a proper solution
that can use the ecc.read_oob_raw and ecc.write_oob_raw interfaces.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:02 +01:00
Brian Norris b9bc815c2c mtd: cafe_nand: spelling mistake
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 18:17:02 +01:00
Herton Ronaldo Krzesinski 596fd46268 mtd: nandsim: don't open code a do_div helper
We don't need to open code the divide function, just use div_u64 that
already exists and do the same job. While this is a straightforward
clean up, there is more to that, the real motivation for this.

While building on a cross compiling environment in armel, using gcc
4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5), I was getting the following build
error:

ERROR: "__aeabi_uldivmod" [drivers/mtd/nand/nandsim.ko] undefined!

After investigating with objdump and hand built assembly version
generated with the compiler, I narrowed __aeabi_uldivmod as being
generated from the divide function. When nandsim.c is built with
-fno-inline-functions-called-once, that happens when
CONFIG_DEBUG_SECTION_MISMATCH is enabled, the do_div optimization in
arch/arm/include/asm/div64.h doesn't work as expected with the open
coded divide function: even if the do_div we are using doesn't have a
constant divisor, the compiler still includes the else parts of the
optimized do_div macro, and translates the divisions there to use
__aeabi_uldivmod, instead of only calling __do_div_asm -> __do_div64 and
optimizing/removing everything else out.

So to reproduce, gcc 4.6 plus CONFIG_DEBUG_SECTION_MISMATCH=y and
CONFIG_MTD_NAND_NANDSIM=m should do it, building on armel.

After this change, the compiler does the intended thing even with
-fno-inline-functions-called-once, and optimizes out as expected the
constant handling in the optimized do_div on arm. As this also avoids a
build issue, I'm marking for Stable, as I think is applicable for this
case.

Signed-off-by: Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com>
Cc: stable@vger.kernel.org
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 16:59:33 +01:00
Sascha Hauer 6023813a2d mtd: gpmi-nand: fix read page when reading to vmalloced area
The gpmi-nand driver uses virt_addr_valid() to check whether a buffer
is suitable for dma. If it's not, a driver allocated buffer is used
instead. Then after a page read the driver allocated buffer must be
copied to the user supplied buffer. This does not happen since commit
7725cc8593.

This patch fixes the issue. The bug is encountered with UBI which uses a
vmalloced buffer for the volume table.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: snijsure@grid-net.com
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 15:06:23 +01:00
Sascha Hauer 096bcc231f mtd: mxc_nand: use 32bit copy functions
The following commit changes the function used to copy from/to
the hardware buffer to memcpy_[from|to]io. This does not work
since the hardware cannot handle the byte accesses used by these
functions. Instead of reverting this patch introduce 32bit
correspondents of these functions.

| commit 5775ba36ea9c760c2d7e697dac04f2f7fc95aa62
| Author: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| Date:   Tue Apr 24 10:05:22 2012 +0200
|
|    mtd: mxc_nand: fix several sparse warnings about incorrect address space
|
|     Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
|     Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 15:06:18 +01:00
Dan Carpenter 48f8b64129 mtd: cafe_nand: fix an & vs | mistake
The intent here was clearly to set result to true if the 0x40000000 flag
was set.  But instead there was a | vs & typo and we always set result
to true.

Artem: check the spec at
wiki.laptop.org/images/5/5c/88ALP01_Datasheet_July_2007.pdf
and this fix looks correct.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: stable@vger.kernel.org
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06 14:27:13 +01:00
Shmulik Ladkani ea3b2ea24e mtd: nand: initialize bitflip_threshold prior to BBT scanning
As of edbc454 [mtd: driver _read() returns max_bitflips; mtd_read()
returns -EUCLEAN], 'mtd->bitflip_threshold' must be set for mtd devices
having ECC, prior any 'mtd_read()' call.
Otherwise, 'mtd_read()' will falsely return -EUCLEAN.

Normally, 'mtd->bitflip_threshold' is initialized when the MTD is added.

However, this is too late for NAND MTDs, as 'scan_bbt()' is invoked
prior the existing initialization of 'mtd->bitflip_threshold'.

This is a problem since 'scan_bbt()' calls 'mtd_read()', in the case
of a flash-based bad block table.
It resulted in a falsely reported bitflips indication during BBT read,
which lead to constant scrubbing of the flash BBT blocks.

Initialize 'mtd->bitflip_threshold' to its default value (if not already
set by the driver), prior to invocation of 'scan_bbt()'.

Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-06-09 12:02:04 +01:00
Linus Torvalds f5e7e844a5 - More robust parsing especially of xattr data in JFFS2
- Updates to mxc_nand and gpmi drivers to support new boards and device tree
  - Improve consistency of information about ECC strength in NAND devices
  - Clean up partition handling of plat_nand
  - Support NAND drivers without dedicated access to OOB area
  - BCH hardware ECC support for OMAP
  - Other fixes and cleanups, and a few new device IDs
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Merge tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd

Pull mtd update from David Woodhouse:
 - More robust parsing especially of xattr data in JFFS2
 - Updates to mxc_nand and gpmi drivers to support new boards and device tree
 - Improve consistency of information about ECC strength in NAND devices
 - Clean up partition handling of plat_nand
 - Support NAND drivers without dedicated access to OOB area
 - BCH hardware ECC support for OMAP
 - Other fixes and cleanups, and a few new device IDs

Fixed trivial conflict in drivers/mtd/nand/gpmi-nand/gpmi-nand.c due to
added include files next to each other.

* tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd: (75 commits)
  mtd: mxc_nand: move ecc strengh setup before nand_scan_tail
  mtd: block2mtd: fix recursive call of mtd_writev
  mtd: gpmi-nand: define ecc.strength
  mtd: of_parts: fix breakage in Kconfig
  mtd: nand: fix scan_read_raw_oob
  mtd: docg3 fix in-middle of blocks reads
  mtd: cfi_cmdset_0002: Slight cleanup of fixup messages
  mtd: add fixup for S29NS512P NOR flash.
  jffs2: allow to complete xattr integrity check on first GC scan
  jffs2: allow to discriminate between recoverable and non-recoverable errors
  mtd: nand: omap: add support for hardware BCH ecc
  ARM: OMAP3: gpmc: add BCH ecc api and modes
  mtd: nand: check the return code of 'read_oob/read_oob_raw'
  mtd: nand: remove 'sndcmd' parameter of 'read_oob/read_oob_raw'
  mtd: m25p80: Add support for Winbond W25Q80BW
  jffs2: get rid of jffs2_sync_super
  jffs2: remove unnecessary GC pass on sync
  jffs2: remove unnecessary GC pass on umount
  jffs2: remove lock_super
  mtd: gpmi: add gpmi support for mx6q
  ...
2012-06-01 16:55:42 -07:00
Sascha Hauer 4a43faf54e mtd: mxc_nand: move ecc strengh setup before nand_scan_tail
Since commit 6a918bade9, the mxc_nand driver
fails with:

Driver must set ecc.strength when using hardware ECC

This is because nand_scan_tail checks for correct ecc strength
settings, so we must set them up before nand_scan_tail.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org [3.4+]
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-06-01 20:23:29 +01:00
Marek Vasut 5636ce0f07 mtd: gpmi-nand: define ecc.strength
Fix an issue which was introduced by the recent addition of ecc.strength.

The ecc.strength wasn't set in gpmi-nand, resulting in the following crash:
[    2.550000] kernel BUG at drivers/mtd/nand/nand_base.c:3347!
...
[    2.550000] [<c020841c>] (nand_scan_tail+0x328/0x650) from [<c02f68e0>] (gpmi_nand_probe+0x43c/0x5a4)
[    2.550000] [<c02f68e0>] (gpmi_nand_probe+0x43c/0x5a4) from [<c01f6618>] (platform_drv_probe+0x14/0x18)
[    2.550000] [<c01f6618>] (platform_drv_probe+0x14/0x18) from [<c01f55b0>] (driver_probe_device+0x74/0x1fc)
[    2.550000] [<c01f55b0>] (driver_probe_device+0x74/0x1fc) from [<c01f57cc>] (__driver_attach+0x94/0x98)
[    2.550000] [<c01f57cc>] (__driver_attach+0x94/0x98) from [<c01f3d40>] (bus_for_each_dev+0x50/0x80)
[    2.550000] [<c01f3d40>] (bus_for_each_dev+0x50/0x80) from [<c01f4e18>] (bus_add_driver+0x188/0x25c)
[    2.550000] [<c01f4e18>] (bus_add_driver+0x188/0x25c) from [<c01f5a70>] (driver_register+0x78/0x138)
[    2.550000] [<c01f5a70>] (driver_register+0x78/0x138) from [<c043dc7c>] (gpmi_nand_init+0xc/0x30)
[    2.550000] [<c043dc7c>] (gpmi_nand_init+0xc/0x30) from [<c0008824>] (do_one_initcall+0x108/0x17c)
[    2.550000] [<c0008824>] (do_one_initcall+0x108/0x17c) from [<c042a8b8>] (kernel_init+0xfc/0x1bc)
[    2.550000] [<c042a8b8>] (kernel_init+0xfc/0x1bc) from [<c000fab4>] (kernel_thread_exit+0x0/0x8)

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-06-01 20:22:21 +01:00
Dmitry Maluka 34a5704d91 mtd: nand: fix scan_read_raw_oob
It seems there is a bug in scan_read_raw_oob() in nand_bbt.c which
should cause wrong functioning of NAND_BBT_SCANALLPAGES option.

Artem: the patch did not apply and I had to amend it a bit.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Cc: stable@kernel.org
2012-05-29 11:14:58 +03:00
Linus Torvalds 2795343705 arm-soc: clock driver changes
The new clock subsystem was merged in linux-3.4 without any users, this
 now moves the first three platforms over to it: imx, mxs and spear.
 
 The series also contains the changes for the clock subsystem itself,
 since Mike preferred to have it together with the platforms that require
 these changes, in order to avoid interdependencies and conflicts.
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Merge tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc clock driver changes from Olof Johansson:
 "The new clock subsystem was merged in linux-3.4 without any users,
  this now moves the first three platforms over to it: imx, mxs and
  spear.

  The series also contains the changes for the clock subsystem itself,
  since Mike preferred to have it together with the platforms that
  require these changes, in order to avoid interdependencies and
  conflicts."

Fix up trivial conflicts in arch/arm/mach-kirkwood/common.c (code
removed in one branch, added OF support in another) and
drivers/dma/imx-sdma.c (independent changes next to each other).

* tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
  clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
  clk: Provide dummy clk_unregister()
  SPEAr: Update defconfigs
  SPEAr: Add SMI NOR partition info in dts files
  SPEAr: Switch to common clock framework
  SPEAr: Call clk_prepare() before calling clk_enable
  SPEAr: clk: Add General Purpose Timer Synthesizer clock
  SPEAr: clk: Add Fractional Synthesizer clock
  SPEAr: clk: Add Auxiliary Synthesizer clock
  SPEAr: clk: Add VCO-PLL Synthesizer clock
  SPEAr: Add DT bindings for SPEAr's timer
  ARM i.MX: remove now unused clock files
  ARM: i.MX6: implement clocks using common clock framework
  ARM i.MX35: implement clocks using common clock framework
  ARM i.MX5: implement clocks using common clock framework
  ARM: Kirkwood: Replace clock gating
  ARM: Orion: Audio: Add clk/clkdev support
  ARM: Orion: PCIE: Add support for clk
  ARM: Orion: XOR: Add support for clk
  ARM: Orion: CESA: Add support for clk
  ...
2012-05-26 12:42:29 -07:00
Linus Torvalds f6a26ae769 arm-soc: board specific changes
While we generally attempt to get rid of board specific files and replace
 them with device tree based descriptions, a lot of platforms have not
 come that far:
 
 In shmobile, we add two new board files because their recently started
 effort to add DT support has not proceeded enough to use it for all of
 the important hardware.
 
 In Kirkwood, we are adding support for new boards with a combination of
 DT and board file contents in multiple cases.
 
 pxa/mmp and imx are extending support for existing board files but not
 adding new ones.
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Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc board specific changes from Olof Johansson:
 "While we generally attempt to get rid of board specific files and
  replace them with device tree based descriptions, a lot of platforms
  have not come that far:

  In shmobile, we add two new board files because their recently started
  effort to add DT support has not proceeded enough to use it for all of
  the important hardware.

  In Kirkwood, we are adding support for new boards with a combination
  of DT and board file contents in multiple cases.

  pxa/mmp and imx are extending support for existing board files but not
  adding new ones."

Fix up trivial conflicts in arch/arm/mach-{mmp/ttc_dkb.c,shmobile/{Kconfig,Makefile}}

* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits)
  ARM: shmobile: fix smp build
  ARM: kirkwood: Add support for RaidSonic IB-NAS6210/6220 using devicetree
  kirkwood: Add iconnect support
  orion/kirkwood: create a generic function for gpio led blinking
  kirkwood/orion: fix orion_gpio_set_blink
  ARM: kirkwood: Define DNS-320/DNS-325 NAND in fdt
  kirkwood: Allow nand to be configured via. devicetree
  mtd: Add orion_nand devicetree bindings
  ARM: kirkwood: Basic support for DNS-320 and DNS-325
  ARM: mach-shmobile: Use DT_MACHINE for armadillo 800 eva
  ARM: mach-shmobile: Use DT_MACHINE for KZM9G
  ARM: pxa: hx4700: Add Synaptics NavPoint touchpad
  ARM: pxa: Use REGULATOR_SUPPLY macro
  ARM: mach-shmobile: kzm9g: enable SMP boot
  ARM: mach-shmobile: kzm9g: defconfig update
  ARM: mach-shmobile: kzm9g: add PCF8757 gpio-key
  ARM: mach-shmobile: kzm9g: add SDHI support
  ARM: mach-shmobile: kzm9g: add MMCIF support
  ARM: mach-shmobile: kzm9g: correct screen direction
  ARM: mach-shmobile: sh73a0.h: add GPIO_NR
  ...
2012-05-22 13:32:53 -07:00
Linus Torvalds 813a95e5b4 arm-soc: soc-specific pinctrl changes
With this, five platforms are moving to the relatively new pinctrl
 subsystem for their pin management, replacing the older soc specific
 in-kernel interfaces with common code.
 
 There is quite a bit of net addition of code for each platform being
 added to the pinctrl subsystem. but the payback comes later when adding
 new boards can be done by only providing new device trees instead.
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Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm soc-specific pinctrl changes from Olof Johansson:
 "With this, five platforms are moving to the relatively new pinctrl
  subsystem for their pin management, replacing the older soc specific
  in-kernel interfaces with common code.

  There is quite a bit of net addition of code for each platform being
  added to the pinctrl subsystem.  But the payback comes later when
  adding new boards can be done by only providing new device trees
  instead."

Fix up trivial conflicts in arch/arm/mach-ux500/{Makefile,board-mop500.c}

* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
  mtd: nand: gpmi: fix compile error caused by pinctrl call
  ARM: PRIMA2: select PINCTRL and PINCTRL_SIRF in Kconfig
  ARM: nomadik: enable PINCTRL_NOMADIK where needed
  ARM: mxs: enable pinctrl support
  video: mxsfb: adopt pinctrl support
  ASoC: mxs-saif: adopt pinctrl support
  i2c: mxs: adopt pinctrl support
  mtd: nand: gpmi: adopt pinctrl support
  mmc: mxs-mmc: adopt pinctrl support
  serial: mxs-auart: adopt pinctrl support
  serial: amba-pl011: adopt pinctrl support
  spi/imx: adopt pinctrl support
  i2c: imx: adopt pinctrl support
  can: flexcan: adopt pinctrl support
  net: fec: adopt pinctrl support
  ARM: ux500: switch MSP to using pinctrl for pins
  ARM: ux500: alter MSP registration to return a device pointer
  ARM: ux500: switch to using pinctrl for uart0
  ARM: ux500: delete custom pin control system
  ARM: ux500: switch over to Nomadik pinctrl driver
  ...
2012-05-22 09:39:42 -07:00
Linus Torvalds 9bc747bea5 arm-soc: First batch of cleanups
These cleanups are basically all over the place. The idea is to collect
 changes with minimal impact but large number of changes so we can avoid
 them from distracting in the diffstat in the other series.
 
 A significant number of lines get removed here, in particular because
 the ixp2000 and ixp23xx platforms get removed. These have never been
 extremely popular and have fallen into disuse over time with no active
 maintainer taking care of them. The u5500 soc never made it into a
 product, so we are removing it from the ux500 platform.
 
 Many good cleanups also went into the at91 and omap platforms, as has
 been the case for a number of releases.
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Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull first batch of arm-soc cleanups from Olof Johansson:
 "These cleanups are basically all over the place.  The idea is to
  collect changes with minimal impact but large number of changes so we
  can avoid them from distracting in the diffstat in the other series.

  A significant number of lines get removed here, in particular because
  the ixp2000 and ixp23xx platforms get removed.  These have never been
  extremely popular and have fallen into disuse over time with no active
  maintainer taking care of them.  The u5500 soc never made it into a
  product, so we are removing it from the ux500 platform.

  Many good cleanups also went into the at91 and omap platforms, as has
  been the case for a number of releases."

Trivial modify-delete conflicts in arch/arm/mach-{ixp2000,ixp23xx}

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (152 commits)
  ARM: clps711x: Cleanup IRQ handling
  ARM clps711x: Removed unused header mach/time.h
  ARM: clps711x: Added note about support EP731x CPU to Kconfig
  ARM: clps711x: Added missing register definitions
  ARM: clps711x: Used own subarch directory for store header file
  Dove: Fix Section mismatch warnings
  ARM: orion5x: ts78xx debugging changes
  ARM: orion5x: remove PM dependency from ts78xx
  ARM: orion5x: ts78xx fix NAND resource off by one
  ARM: orion5x: ts78xx whitespace cleanups
  Orion5x: Fix Section mismatch warnings
  Orion5x: Fix warning: struct pci_dev declared inside paramter list
  ARM: clps711x: Combine header files into one for clps711x-targets
  ARM: S3C24XX: Use common macro to define resources on mach-qt2410.c
  ARM: S3C24XX: Use common macro to define resources on mach-osiris.c
  ARM: EXYNOS: Adapt to cpuidle core time keeping and irq enable
  ARM: S5PV210: Use common macro to define resources on mach-smdkv210.c
  ARM: S5PV210: Use common macro to define resources on dev-audio.c
  ARM: S5PC100: Use common macro to define resources on dev-audio.c
  ARM: S5P64X0: Use common macro to define resources on dev-audio.c
  ...
2012-05-22 09:23:24 -07:00
Shawn Guo 3e48b1baa0 mtd: nand: gpmi: fix compile error caused by pinctrl call
Fix following compile error caused by commit 39febc0 (mtd: nand: gpmi:
adopt pinctrl support).

  CC      drivers/mtd/nand/gpmi-nand/gpmi-nand.o
drivers/mtd/nand/gpmi-nand/gpmi-nand.c: In function ‘acquire_resources’:
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:499:45: error: ‘pdev’ undeclared (first use in this function)

Reported-by: Subodh Nijsure <snijsure@grid-net.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-05-19 07:59:11 -07:00
Arnd Bergmann 3c0dec5f58 Merge branch 'clk-next' of git://git.linaro.org/people/mturquette/linux into next/clock
* 'clk-next' of git://git.linaro.org/people/mturquette/linux:
  clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
  clk: Provide dummy clk_unregister()
  ARM: Kirkwood: Replace clock gating
  ARM: Orion: Audio: Add clk/clkdev support
  ARM: Orion: PCIE: Add support for clk
  ARM: Orion: XOR: Add support for clk
  ARM: Orion: CESA: Add support for clk
  ARM: Orion: SDIO: Add support for clk.
  ARM: Orion: NAND: Add support for clk, if there is one.
  ARM: Orion: EHCI: Add support for enabling clocks
  ARM: Orion: SATA: Add per channel clk/clkdev support.
  ARM: Orion: UART: Get the clock rate via clk_get_rate().
  ARM: Orion: WDT: Add clk/clkdev support
  ARM: Orion: Eth: Add clk/clkdev support.
  ARM: Orion: SPI: Add clk/clkdev support.
  ARM: Orion: Add clocks using the generic clk infrastructure.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-16 16:35:25 +02:00
Jamie Lentin a0fabf722c mtd: Add orion_nand devicetree bindings
Allow a NAND chip using the orion_nand driver to be described using devicetree.

Changes since last submission (V4) [Addressing comments by]:-
* WARN when bank-width is out of range [Andrew Lunn]

Changes since last submission (V3):-
* Document all parameters [Grant Likely]
* Convert bank-width to be in bytes
* Add explicit defaults for cle, ale and bank-width

Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-05-15 02:29:11 +00:00
Arnd Bergmann 4f5a9fd341 Merge branch 'imx/pinctrl' into imx/clock
Conflicts:
	drivers/mmc/host/sdhci-esdhc-imx.c
	drivers/net/ethernet/freescale/fec.c
	drivers/spi/spi-imx.c
	drivers/tty/serial/imx.c

This resolves dependencies between the pinctrl and clock changes
in imx.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-14 15:30:52 +02:00