Commit graph

19 commits

Author SHA1 Message Date
Paul Mundt
06c7a489a9 sh: Fix up the SH-3 build.
SH-3 lacks an MMUCR_TI definition for global TLB flushes. As SH-3 parts
lack a split TLB, the same global flush behaviour is accomplished
through the flush bit, which just happens to be the same as on SH-4.

This fixes up the build for all SH-3 MMU parts.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-07 02:57:39 +09:00
Guennadi Liakhovetski
8b1935e6a3 dmaengine: shdma: separate DMA headers.
Separate SH DMA headers into ones, commonly used by both drivers, and ones,
specific to each of them. This will make the future development of the
dmaengine driver easier.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-02 11:09:04 +09:00
Paul Mundt
2e18e04798 Merge branch 'sh/dmaengine'
Conflicts:
	arch/sh/drivers/dma/dma-sh.c
2010-02-08 11:34:03 +09:00
Guennadi Liakhovetski
623b4ac4bf sh: fix Transfer Size calculation in both DMA drivers
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers
do not take into account bits 3:2 of the Transfer Size field in the CHCR
register, besides, bit-field defines set bit 2, but the mask only passes bits
1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all
these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to
be fixed too.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08 09:40:24 +09:00
Paul Mundt
9d56dd3b08 sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-26 12:58:40 +09:00
Paul Mundt
7025bec912 sh: Kill off dead UBC headers.
Nothing is using these now, so kill them all off.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05 19:16:35 +09:00
Paul Mundt
0d051d90bb sh: Convert SH7705 extended mode to new cacheflush interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-15 12:53:39 +09:00
Paul Mundt
916e97834e sh: Kill off unused flush_icache_user_range().
We use flush_cache_page() outright in copy_to_user_page(), and nothing
else needs it, so just kill it off. SH-5 still defines its own version,
but that too will go away in the same fashion once it converts over.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-15 11:38:05 +09:00
Paul Mundt
7fbb2d3bdd sh: consolidate flush_dcache_mmap_lock/unlock() definitions.
All of the flush_dcache_mmap_lock()/flush_dcache_mmap_unlock()
definitions are identical across all CPUs, so just provide them
generically in asm/cacheflush.h.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-15 11:25:32 +09:00
Paul Mundt
ecba106058 sh: Centralize the CPU cache initialization routines.
This provides a central point for CPU cache initialization routines.
This replaces the antiquated p3_cache_init() method, which the vast
majority of CPUs never cared about.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-15 11:05:42 +09:00
Paul Mundt
dde5e3ffb7 sh: rework nommu for generic cache.c use.
This does a bit of reorganizing for allowing nommu to use the new
and generic cache.c, no functional changes.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-15 09:49:32 +09:00
Paul Mundt
2277ab4a1d sh: Migrate from PG_mapped to PG_dcache_dirty.
This inverts the delayed dcache flush a bit to be more in line with other
platforms. At the same time this also gives us the ability to do some
more optimizations and cleanup. Now that the update_mmu_cache() callsite
only tests for the bit, the implementation can gradually be split out and
made generic, rather than relying on special implementations for each of
the peculiar CPU types.

SH7705 in 32kB mode and SH-4 still need slightly different handling, but
this is something that can remain isolated in the varying page copy/clear
routines. On top of that, SH-X3 is dcache coherent, so there is no need
to bother with any of these tests in the PTEAEX version of
update_mmu_cache(), so we kill that off too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-07-22 19:20:49 +09:00
Magnus Damm
f19900b2e6 sh: remove old TMU driver
This patch removes the old TMU driver (CONFIG_SH_TMU/timer-tmu.c)

As replacement, select the sh_tmu driver with CONFIG_SH_TIMER_TMU
and configure timer channel using platform data.

If multiple TMU channels are enabled using platform data, use the
earlytimer parameter on the kernel command line to select channel.
For instance, use "earlytimer=sh_tmu.0" to select the first channel.

To verify which timer is being used, look at printouts or the timer
irq count in /proc/interrupts.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-12 19:53:14 +09:00
Nobuhiro Iwamatsu
71b973a42c sh: dma-sh updates for multi IRQ and new SH-4A CPUs.
This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85.

This also enables multi IRQ support for platforms that have multiple
vectors bound to the same IRQ source.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-10 17:26:49 +09:00
Steve Glendinning
8085ac7531 sh: Add platform-specific constants for SH7709
I'm using these constants in support of an in-house development board,
and thought they may be useful to other users of SH7709.

Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-12-22 18:42:54 +09:00
Paul Mundt
f727565013 sh: Move the CPU definition headers from asm/ to cpu/.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-10-20 12:04:53 +09:00
Adrian Bunk
7265706c8f fix SH7705_CACHE_32KB compilation
This patches compile errors like the following caused by
commit 51f3547d61
(sh: Allow SH-3 and SH-5 to use common headers):

<--  snip  -->

...
  CC      arch/sh/mm/init.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/sh/mm/init.c: In function 'mem_init':
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/sh/mm/init.c:232: error: implicit declaration of function 'p3_cache_init'
make[2]: *** [arch/sh/mm/init.o] Error 1
make[1]: *** [arch/sh/mm] Error 2
...
  CC      kernel/fork.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c: In function 'dup_mmap':
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c:323: error: implicit declaration of function 'flush_dcache_mmap_lock'
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c:325: error: implicit declaration of function 'flush_dcache_mmap_unlock'
make[2]: *** [kernel/fork.o] Error 1

<--  snip  -->

Reported-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-08-11 20:17:49 +09:00
Paul Mundt
51f3547d61 sh: Allow SH-3 and SH-5 to use common headers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-29 22:52:49 +09:00
Paul Mundt
f15cbe6f1a sh: migrate to arch/sh/include/
This follows the sparc changes a439fe51a1.

Most of the moving about was done with Sam's directions at:

http://marc.info/?l=linux-sh&m=121724823706062&w=2

with subsequent hacking and fixups entirely my fault.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-29 08:09:44 +09:00