Note that this depends on omap-devel-hwmod-for-v3.5.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqsOuAAoJEBvUPslcq6VzT0UP/Ash5WqQ6AOz6vfvJVwYs7FA
/ITUt05h0bpd8WbO5jDRNkUWL/NKfJ9zIfyEt24OVrPI0dhMOLVkPFdCTsQujIcG
5IztIDg4VnebUKyelsW6NMUsfUXURRVmcl4kYlYcRH3zaNOHz+ae2RUVwzTX0/RR
2T8+tFnjjyilXQ3T6swUnhMzB/BARpKK4ghO1vambIkRoe7ZaCdyzenBC3010ngx
zHikigd27S6FKOhX6jJJNFtp6WK6bKWSOEBfXaR5SOgFM45VDQZltQMNa/EBbktl
TXFQL0vRTIAOTGRrbhtcD/ny6kiS+NxC9ZeFbEFpQVdiZwJyPKpqOW10hV/KKeTR
9fuxPnCoc9DgaEx3YyFY2jjvRfgwGL0Dox/mu508RdOxTOgWcIJ+dYK1lihtMCrI
I5A0Mh35h9ykUmU2m9Hw0odwB+JdPL6HgYKwKfYAgjoGMMeQHPzt7m77dsEu8PZr
XpQAmT+MH0D2ATbGvISChRJSi1Zac2dd8WmKKLoE7Saq8U63G0IvocIdO7Xbr3/l
BxnCAOH5VQ9f5CBdLWNFKwKsc+y0EFGZRuv4CF6Y3qYwLxfmubXN6P0u9HjwVuNl
beWhujTpaeQJ0x0ZHVxA0UYjoJuNx0xJAJTeuN5XwfH2r9lX82TYxgs4CyC6fdH7
Ueb5QfhecxMx1RzaoA/G
=ECOj
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm
Updates for PRCM (Power, Reset, Clock Management).
Note that this depends on omap-devel-hwmod-for-v3.5.
By Kevin Hilman (3) and others
via Paul Walmsley (2) and Tony Lindgren (1)
* tag 'omap-devel-prcm-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]
ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API
ARM: OMAP3: clock data: add clockdomain for HDQ functional clock
ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported
ARM: OMAP2+: dmtimer: cleanup iclk usage
ARM: OMAP4+: Add prm and cm base init function.
ARM: OMAP2/3: Add idle_st bits for ST_32KSYNC timer to prcm-common header
ARM: OMAP3: Fix CM register bit masks
ARM: OMAP: clock: convert AM3517/3505 detection/flags to AM35xx
ARM: OMAP3: clock data: treat all AM35x devices the same
ARM: OMAP3: clock data: replace 3503/3517 flag with AM35x flag for UART4
powerdomain, PRM, and CM changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPqVA5AAoJEMePsQ0LvSpL4QYQALJgM0Qm6i7cmgpECPe+pOOr
WQTxCYZAn8xqZiKBHhveFLpw7qyXmJy1D5QohcBB1Ax5oEY69SLgHC2usUreeJ5L
jP+Za4N5aBWFnU14sacESIK9ahyF8hMS6SxO1iwrjgrMygFcjsqL7lk2B665Wiqn
6OS6kAdAemMoKTCsDFY8R18WiTuGGF5Oo8hEhxs0RzgX9LjG8iDaq19wtvmefo11
U6246BSDh7xrCl5hiiFMQT942oQ5VA3zUQT1ClwPStYGJmwkLwdl3f4yE3vHC0Q/
zNdS2bQM9xSB/GCikWsfbjf8dVO0t3uaqHva0LF/DTQHiMKptm2f+NWAjdZCDlYz
FbE3SRkX86Rr6P+sw69ztpRroKMbn8WNfP48fXbMEtiegpqjRc5wkGr4cIcl8yMg
TyBdF/o5QJgxoF4hFw5BQBrBvpL5+ralqrHA7A4zeCNhkPtnaXSzd1OHgqMawFmk
otEg66W13h+bOnNLmSbWhWyVmYwsD30BjmNLyOTXa16aTjo+X4johuVGlZMKWyD6
nQMdwnxdSmNMQ8z1Qczc4JzT/ixjfeEXmQUNZLmhkMK5cHRw6TYj9eEbvMk7Xh73
XCK38RCb86ECqn1A3qEWo6TV8CDdhhh/XwoHAzCfdkRdqe3d5cT5cC2vy/VmRrf1
8Il2JKJYveKPH+vc9rEE
=Q4kv
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-prcm
Some OMAP PRCM updates for 3.5. Includes some clock, clockdomain,
powerdomain, PRM, and CM changes.
Clean up clockdomains3xxx_data.c a bit by removing the superfluous
commas in gfx_sgx_3xxx_wkdeps[].
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
With patch 'ARM: OMAP2+: powerdomain: Wait for powerdomain transition
in pwrdm_state_switch()', the pwrdm_clkdm_state_switch() API becomes
duplicate of pwrdm_state_switch().
Get rid off duplicate pwrdm_clkdm_state_switch() and update the
users of it with pwrdm_state_switch()
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the correct clockdomain for the HDQ functional clock. This is needed
for the clock and hwmod PM code to work correctly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
The current DPLL code enables and disables autoidle features
without checking whether the autoidle register is available.
Fix this by putting a check for the existence of the autoidle
register in the DPLL data.
With such a check in place, for DPLLs which do not support this
feature, simply skipping the autoidle_reg entry in the DPLL data
is sufficient.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
We do not use iclk anywhere in the dmtimer driver and so removing it.
Hence removing the timer iclk entries from OMAP4 clkdev table as well.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Instead of statically defining seperate arrays for every OMAP4+ archs,
have a generic init function to populate the arrays. This avoids the
need for creating new array for every arch added in the future that
reuses the prm and cm registers read/write code.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add missing idle_st bit for 32k-sync timer into the prcm-common
header file, required for hwmod data.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The register bits for MPU_CLK_SRC and IVA2_CLK_SRC in CM_CLKSEL1_PLL
register are 3 bits wide. Fix the MASK definition accordingly.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
To improve the clarity of the code, replace the CK_3517 flag used in
the clock data with CK_AM35XX. The CK_3505 flag can also be
removed, since it is now unused.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The init for 3505/3517 specific clocks depends on the ordering of
cpu_is checks, is error prone and confusing (there are 2 separate
checks for cpu_is_omap3505()).
Remove the 3505-specific checking since CK_3505 flag is not used, and
treat all AM35x clocks the same.
This means that the SGX clock (the only AM35x clkdev not currently
flagged for 3505) will now be registered on 3505, but that is
harmless. That can be cleaned up when the clkdev nodes are removed in
favor of them being registered by hwmod.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The AM35x UART4 is common to all AM35x devices, so use CK_AM35XX instead
of (CK_3505 | CK_3517), which is equivalent.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Nothing controversial, just another batch of fixes:
- Samsung/exynos fixes for more merge window fallout: build errors and
warnings mostly, but also some clock/device setup issues on exynos4/5
- PXA bug and warning fixes related to gpio and pinmux
- IRQ domain conversion bugfixes for U300 and MSM
- A regulator setup fix for U300
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPmzKwAAoJEIwa5zzehBx36jMP/3D/oE3AkqI/fhulDU2g8KmO
9/dVGOsdeKWqH14xcjc79l1V0aX5dtgqRIBQ/c13LetKhpyxY7J+ZVQml2c1jN7G
+h3DhmA+EzRUxXNuC8Iut6UgoITx+Rk8aGu6s1gD/osn9Ynm3B4+xxjhcEf0cZkD
aWq7GLipBa8uOd2ryrGftW1BS+tgf+Tcmc6yCxebbv5ARA5lJQRPuP+YgnYNyhzU
f7SCgkt6IpgcCcxAAzzgWLeFoPK0FfsOUXTkzLYOhJpOrkn82g5MWXDhe1tGddUr
JqJpYoIEwNzDcsEcImWDuoSFoaqgO6GiOU+8Y/tx6KNVnya9520JAoxBjU1EqgnV
+jHNHW9JaZs/oc7LbJ774NuV5YZ2XDhpZm1Cc0dBT2oDh2oFmeaXIt6cSA4jGYpm
4OP7BMDuxBdLlrKk8coDXCUT21HNsgRSkyx6Ic6dVNxvz86sKKE8FMj5m5c82GBk
n+1C+jCEs6rJi7e/ddCNMa6P0R9my5lq40S7WwOXDPw6YeetYPs5QYz7GJhM+n7z
f4uT20ggm1qmUWHVtAA2MiuTWlinSEFThRDS7+yRNioTNEfvcT5LmOTYt1UAtFQj
f9StJUgkBuoB+kuUNDKPtNqy5dT3y6d9L+9gbCIpalxwBOLs/s+0k8nHTYeu/lZ5
Ir56+pqGpr+7TCuBg28N
=V4y6
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Nothing controversial, just another batch of fixes:
- Samsung/exynos fixes for more merge window fallout: build errors
and warnings mostly, but also some clock/device setup issues on
exynos4/5
- PXA bug and warning fixes related to gpio and pinmux
- IRQ domain conversion bugfixes for U300 and MSM
- A regulator setup fix for U300"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: PXA2xx: MFP: fix potential direction bug
ARM: PXA2xx: MFP: fix bug with MFP_LPM_KEEP_OUTPUT
arm/sa1100: fix sa1100-rtc memory resource
ARM: pxa: fix gpio wakeup setting
ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability
ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined
ARM: EXYNOS: Fix resource on dev-dwmci.c
ARM: S3C24XX: Fix build warning for S3C2410_PM
ARM: mini2440_defconfig: Fix build error
ARM: msm: Fix gic irqdomain support
ARM: EXYNOS: Fix incorrect initialization of GIC
ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers
ARM: u300: bump all IRQ numbers by one
ARM: ux300: Fix unimplementable regulation constraints
* 'v3.4-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability
ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined
ARM: EXYNOS: Fix resource on dev-dwmci.c
ARM: S3C24XX: Fix build warning for S3C2410_PM
ARM: mini2440_defconfig: Fix build error
ARM: EXYNOS: Fix incorrect initialization of GIC
ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers
Pins configured as input and have MFP_LPM_DRIVE_* flag set, can have a
wrong output value for some period of time (spike) during the suspend
sequence.
This can happen because the direction of the pins (GPDR) is set by
software and the output level is set by hardware (PGSR) at a later
stage.
Fix the above potential bug by setting the output levels first.
Also save the actual levels of the pins before the suspend and restore
them after the resume, but before the direction settings take place, so
the same bug as described above will not happen in the resume sequence.
Reported-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Pins that have MFP_LPM_KEEP_OUTPUT set and are configured for output
must retain the output state in low power mode.
Currently, the pin direction configuration is overrided with values
in gpdr_lpm[] array and do not obey the MFP_LPM_KEEP_OUTPUT setting.
Fix the above bug and add some documentation to clarify the
MFP_LPM_KEEP_OUTPUT setting purpose.
Reported-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
DEFINE_RES_MEM() takes the size of resource as a second argument,
not the end address. Passing end address leads to following error
in runtime during device registration:
sa1100-rtc: failed to claim resource 0
Fix it.
Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
In 3.3, gpio wakeup setting was broken. The call
enable_irq_wake() didn't set up the PXA gpio registers
(PWER, ...) anymore.
Fix it at least for pxa27x. The driver doesn't seem to be
used in pxa25x (weird ...), and the fix doesn't extend to
pxa3xx and pxa95x (which don't have a gpio_set_wake()
available).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Merge fixes from Andrew Morton:
"13 fixes. The acerhdf patches aren't (really) fixes. But they've
been stuck in my tree for up to two years, sent to Matthew multiple
times and the developers are unhappy."
* emailed from Andrew Morton <akpm@linux-foundation.org>: (13 patches)
mm: fix NULL ptr dereference in move_pages
mm: fix NULL ptr dereference in migrate_pages
revert "proc: clear_refs: do not clear reserved pages"
drivers/rtc/rtc-ds1307.c: fix BUG shown with lock debugging enabled
arch/arm/mach-ux500/mbox-db5500.c: world-writable sysfs fifo file
hugetlbfs: lockdep annotate root inode properly
acerhdf: lowered default temp fanon/fanoff values
acerhdf: add support for new hardware
acerhdf: add support for Aspire 1410 BIOS v1.3314
fs/buffer.c: remove BUG() in possible but rare condition
mm: fix up the vmscan stat in vmstat
epoll: clear the tfile_check_list on -ELOOP
mm/hugetlb: fix warning in alloc_huge_page/dequeue_huge_page_vma
* 'u300-fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: u300: bump all IRQ numbers by one
ARM: ux300: Fix unimplementable regulation constraints
Commit 6e8201f57c "mmc: core: add the capability for broken voltage"
introduced a new quirk to indicate that MMC core should ignore voltage
change errors reported by the regulators core. This is required to get
SDHCI working on UniversalC210, NURI and GONI boards again after commit
ceb6143b2d ("mmc: sdhci: fix vmmc handling").
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fixed following compile time error.
arch/arm/mach-exynos/common.c: In function 'exynos5_init_irq':
arch/arm/mach-exynos/common.c:539:2: error: implicit declaration of function 'of_irq_init'
arch/arm/mach-exynos/common.c:539:14: error: 'exynos4_dt_irq_match' undeclared (first use in this function)
arch/arm/mach-exynos/common.c:539:14: note: each undeclared identifier is reported only once for each function it appears in
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Should be EXYNOS4_IRQ_DWMCI instead of IRQ_DWMCI,
and use DEFINE_RES_{MEM,IRQ}.
Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410)
warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410)
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This is needed to fix mini2440_defconfig after the platform
files have been moved around.
arm-none-linux-gnueabi-ld: no machine record defined
arm-none-linux-gnueabi-ld: no machine record defined
arm-none-linux-gnueabi-ld: no machine record defined
make: *** [.tmp_vmlinux1] Error 1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
As of
commit 75294957be
Author: Grant Likely <grant.likely@secretlab.ca>
Date: Tue Feb 14 14:06:57 2012 -0700
irq_domain: Remove 'new' irq_domain in favour of the ppc one
the ARM gic controller uses proper irq domains. Fix the MSM gic
initialization and DT so that it works again.
Signed-off-by: David Brown <davidb@codeaurora.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Pull ARM fixes from Russell King:
"Here's my usual Sunday push, just for one revert which PeterZ hollered
about after last weeks push. Other than that, all seems strangely
quiet as far as fixes go in non-platform ARM land at the moment."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
Revert "ARM: 7359/2: smp_twd: Only wait for reprogramming on active cpus"
Use the of_irq_init() call to setup the gic which also properly
registers the gic device node pointer with gic irq domain,
without which all interrupt specifier translations for gic fail.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
With the addition of platform specific driver data in the sdhci driver
for EXYNOS4 and EXYNOS5, the device name of sdhci controllers on EXYNOS4
and EXYNOS5 are changed accordingly.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc2]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since the VIC was converted to use generic IRQ domains IRQ 0
is silently ignored. This IRQ is used on the U300 so we're
missing it now. Bump all IRQ numbers by one since they are
now decoupled from the hardware IRQ numbers.
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It doesn't make sense to grant permission to change the status of a
regulator that is also set as always on and similarly it doesn't make
sense to allow a driver to change the voltage of a regulator which can
only be set to a single voltage.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
OMAP44xx family of SoCs. There still seem to be a few missing, such
as those for the MMU IP blocks, but this seems to cover the bulk of
the remainder.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPkHNvAAoJEMePsQ0LvSpLH5cQALFSa2wEDWpJP9UZzeOPYAfV
BsyNSZCWkYenokaOFZ4UcGZZf8nk+RixVtHb4cEfiVLygbXoiH2uNCzogK56Avil
TMAcnvXPv9/uL//GW/2Mwxzl5qUKK+v9d6yZLP0bzK+nPiw8ALJqcEIPKNunedB6
Q7d2gIwrWAeHvHec+PINV4eR0ix9GTqEU2YxVwvPDhH3yQMMNWPhZLStGcgPSk5k
UGf5zsVLrIgnzZYy7DFbKOoXhODi2QWJ8+11LWH7QZFPjjCutjaCk9kDdAFDxQqd
t4HBs1MzloW0F/Mmc+DN/F2ETuEjXoK0Mugq0SYB3SPXZIQ8zdWqFR5o9vljoy8e
wLhpaxwImZLIy5bLAz4dl4aBMUrKhTMHGXu6XItekiOW3DvnTYLowpaioct5CGst
Eaw4AwPtaT2jMB3lcqWVFKjWuZhb2J6hbXBCrYmGI/qgz5Az+p5cXK014nKCuALo
g4DG/WyZZJFUIWU378wgHurRiwnonWOTNFrtSOtQ84JqmbXYMyc/8J57wiZg0Ea4
tRvUq4DHMFev9aCdpSZlBo47Y1Da8ZbWzGXv8r5ePnLaISWrVHmDv+WpTCQ+eO71
m5xJQTLYhTa3/PLLH5K2Z7AfQWeJhXwEuudk5DCmkt0PpbatD3TnqaP6NzBtK3kQ
uA4d6dh51PJuy1iBwZ1j
=ToTm
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-a-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-hwmod
Add in most of the remaining hwmods (IP block descriptions) for the
OMAP44xx family of SoCs. There still seem to be a few missing, such
as those for the MMU IP blocks, but this seems to cover the bulk of
the remainder.
control code for OMAP SoCs. In particular, this series results in
a considerable diffstat savings by changing the way that IP block
interconnections are defined.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPkE3+AAoJEMePsQ0LvSpLzrMQAJV6ie5CZTu8FC+dIVplnn5q
Tv12c1CUb1SRCxSYRFhxVDm+jL5d7sQ99C/HZ7kStz23OVn+r8OlyFmLTLk59Bkl
tf8iBEcMyaB+oMvDddYyzcetjT3gpG0yOZC7FMYkfpwCd8DM2hk+8k4JawXe8cqu
3HzDoeXynbF5QCgZpaORAZT8FH4tmTJl1XMkENIflmuwDV8QvwrKZmcJILnr2r+p
pZhCt972xWV6PZYJ0HvdjgabbQ92jyIFggqNeA/BBNoMhfTXbhUFpZE2Oy/Y5vmu
5qXR8yKFesV7jeXyiOMBzHLhMv9Rf4ivAE6u3aVmSIGrKvYTIPNEX9ric8Ryv1Um
33y6NTLv4SsTeKqmL4gCFmbkTz9aixbonThr1yr9ZCHD7jXwjLUjkxyXyjTZRAOV
BWWgMiTKxXmJ1o2AJ/Y3xEWkWsmeafSdKpEF9aPpLyX6bW5oYObAJ1KorvnUut6W
YLWVP3JOfPFpcLHLFA/wtLbk+FwyKdbkLTyP29qJDvg3mUjJG0JGRaHA20hiZIOC
zvxmq/Or7gMvDFXOY3EY97xnDLFbiM+efT/5KuTXI2sel2ojcL8uVJU6qvxGN86h
5rz+E7RXpdtYafvtF0AKdX65Ntyqpe5EUUSnQJAB1xTC9CkFlVVn21R2PO+1P0+e
xWjiHLK/+amqrZa+zkks
=NqUz
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-hwmod
Clean up various aspects of the OMAP hwmod code, which is the IP block
control code for OMAP SoCs. In particular, this series results in
a considerable diffstat savings by changing the way that IP block
interconnections are defined.
Add a skeleton hwmod for the DEBUGSS and associated interconnect data.
This is a basic set of data that will need further additions as
further DEBUGSS information becomes available.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the PRCM, CM, PRM, and related hwmod and associated interconnect
data. These IP blocks handle most of the on-chip power, reset, and clock
control.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the System Control Module hwmod and associated interconnect data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the OCP-WP hwmod and associated interconnect data. The OCP-WP,
or OCP watchpoint, can be used to collect interconnect data and
transmit it via the STM port.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the OCM RAM IP block and interconnect data. This is an oh-chip
block of SRAM connected directly to the L3 bus.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the OCP2SCP IP block and interconnect data. The OCP2SCP can be
used in conjunction with the on-chip embedded USB PHY, associated with
the OTG controller.
Add the on-chip full-speed USB host controller IP block and
interconnect data.
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the SL2 interface IP block and interconnect data. The SL2 is related
to the IVA-HD subsystem.
Add IP block and interconnect data for the C2C ("Chip-to-chip")
interconnect. This can provide a direct system interconnect link to
other devices stacked on the OMAP package.
Add the ELM IP block and interconnect data. The ELM can be used
to locate errors in NAND flash connected to the GPMC.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the McASP hwmod and associated interconnect data. The McASP is a
general-purpose audio serial port.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the Slimbus hwmods and associated interconnect data. The Slimbus
IP blocks implement a two-wire serial interface.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
