Commit Graph

7 Commits (5d5cb173d85ebf6dfb16f456a8148ecb4b1cecbc)

Author SHA1 Message Date
olof@lixom.net a54c545134 pasemi_mac: Fix register defines
Some shift values were obviously wrong. Fix them to correspond with
the masks.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-15 17:44:39 -04:00
Olof Johansson bb6e959079 pasemi_mac: PHY support
PHY support for pasemi_mac.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-08 01:48:19 -04:00
Olof Johansson ceb5136137 pasemi_mac: Add msglevel support and "debug" module param
Add msglevel support for pasemi_mac. Move the MODULE_* defines to the
top to go together with the variable (similar to tg3).

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-08 01:47:54 -04:00
Olof Johansson cfa8007d5c pasemi_mac: Minor cleanup / define fixes
* Remove some unused defines
* Fix a couple of wrong chip register defines, and add a few more fields
  that might be used in the near future.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-08 01:47:54 -04:00
Olof Johansson 6dfa7522d8 pasemi_mac: Timer and interrupt fixes
Timer and interrupt fixes:

* Be pickier with what kind of interrupts are acked to avoid the device to
  get out of sync with the driver state
* Set RX count threshhold to 1 (for NAPI interrupted mode), TX count
  threshold to 32.
* Set timer thresholds to current max (~16ms).

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-08 01:47:53 -04:00
Olof Johansson 771f7404a9 pasemi_mac: Move the IRQ mapping from the PCI layer to the driver
Fixes for ethernet IRQ mapping, to be done in the driver instead of in
the platform setup code.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-08 01:47:53 -04:00
Olof Johansson f5cd787276 PA Semi PWRficient Ethernet driver
Driver for the PA Semi PWRficient on-chip Ethernet (1/10G)

Basic enablement, will be complemented with performance enhancements
over time. PHY support will be added as well.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-05 16:58:52 -05:00