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Author	SHA1	Message	Date
Kumar Gala	5ab9c4524d	[POWERPC] Remove set_cfg_type for PCI indirect users that don't need it The Freescale and Marvell PCI controllers dont require explicit setting for type 1 config cycles. They handle producing them by implicitly looking at the bus, devfn. The TSI108 and 52xx don't use the generic PCI indirect code and thus don't bother with set_cfg_type. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2007-06-29 01:57:07 -05:00
Dale Farnsworth	e1a3107b06	[POWERPC] Add Marvell mv64x60 PCI bridge support This patch adds PCI bridge support for the Marvell mv64x60 chip. We also provide the ability to read/write the mv64x60 hotswap register via sysfs if the hs_reg_valid property is set in the device tree. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>	2007-05-12 11:32:50 +10:00

Author

SHA1

Message

Date

Kumar Gala

5ab9c4524d

[POWERPC] Remove set_cfg_type for PCI indirect users that don't need it

The Freescale and Marvell PCI controllers dont require explicit setting for
type 1 config cycles.  They handle producing them by implicitly looking at the
bus, devfn.

The TSI108 and 52xx don't use the generic PCI indirect code and thus don't
bother with set_cfg_type.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

2007-06-29 01:57:07 -05:00

Dale Farnsworth

e1a3107b06

[POWERPC] Add Marvell mv64x60 PCI bridge support

This patch adds PCI bridge support for the Marvell mv64x60 chip.
We also provide the ability to read/write the mv64x60 hotswap
register via sysfs if the hs_reg_valid property is set in the
device tree.

Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>

2007-05-12 11:32:50 +10:00

2 commits