Commit Graph

10 Commits (57e148b6a975980944f4466ccb669b1d02dfc6a1)

Author SHA1 Message Date
Feng Tang 8bcb4a88c5 spi/dw_spi: fix missing export of dw_spi_remove_host
So that interface drivers could be built as modules

Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-21 07:25:38 -07:00
George Shore 052dc7c45d spi/dw_spi: conditional transfer mode changes
This allows the switching between transfer modes between 'transmit only',
'receive only' and 'transmit and receive' modes. Due to the design of the SPI
block, changing transfer modes requires that the block be disabled; in doing
so the chipselect line is inherently deasserted and (usually) the attached
device discards its state. Consequentially, switching modes requires that a
platform-specific chipselect function has been defined so that the chipselect
is not dropped during the change.

Signed-off-by: George Shore <george@georgeshore.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-21 07:25:32 -07:00
George Shore f4aec798ae spi/dw_spi: remove conditional from 'poll_transfer'.
The 'poll_transfer' function employs a conditional to test whether the
transmit buffer is valid; in doing so, on a receive operation no data is
clocked out, thus no data is clocked in and ultimately errors appear.

This removes the conditional as the transmit function will be set to a null
writer when the transmit buffer is invalid, allowing the driver to clock
0x00 out to the device to receive data from the device.

Signed-off-by: George Shore <george@georgeshore.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-21 07:25:10 -07:00
George Shore 426c0093d8 spi/dw_spi: fixed a spelling typo in a warning message.
Signed-off-by: George Shore <george@georgeshore.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-21 07:24:43 -07:00
George Shore 20a588fcc8 spi/dw_spi: add return value to empty mrst_spi_debugfs_init()
As per the function signature.

Signed-off-by: George Shore <george@georgeshore.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-21 07:24:37 -07:00
Feng Tang c587b6fa05 spi/dw_spi: add a FIFO depth detection
FIFO depth is configurable for each implementation of DW core,
so add a depth detection for those interface drivers who don't set
the fifo_len explicitly

Signed-off-by: Feng Tang <feng.tang@intel.com>
Acked-by: Jean-Hugues Deschenes <jean-hugues.deschenes@octasic.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-21 07:15:27 -07:00
Grant Likely 99147b5c41 spi/dw_spi: fix __init/__devinit section mismatch
Section mismatch in reference from the function dw_spi_add_host()
to the function init_queue()

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 14:03:39 -07:00
Feng Tang 552e450929 spi/dw_spi: refine the IRQ mode working flow
Now dw_spi core fully supports 3 transfer modes: pure polling,
DMA and IRQ mode. IRQ mode will use the FIFO half empty as
the IRQ trigger, so each interface driver need set the fifo_len,
so that core driver can handle it properly

Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:45 -07:00
Feng Tang b490e3704c spi/dw_spi: bug fix in wait_till_not_busy()
Make the driver wait at least  for 1 jiffie before issuing the
warning, no matter what HZ is set to

Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-01-20 13:49:45 -07:00
Feng Tang e24c745272 spi: controller driver for Designware SPI core
Driver for the Designware SPI core, it supports multipul interfaces like
PCI/APB etc.  User can use "dw_apb_ssi_db.pdf" from Synopsys as HW
datasheet.

[randy.dunlap@oracle.com: fix build]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2009-12-17 08:39:13 -07:00