Commit Graph

49 Commits (5698bd28c67775c722dc1f4ab82e0041c1c740ea)

Author SHA1 Message Date
Anton Blanchard 2fae4985a1 [POWERPC] Add missing pmc_type fields in cpu_table
A number of cpu_table entries were missing the pmc_type field,
which means that the sysfs entries for the performance monitor
counters don't get created.  This adds them.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-22 20:20:56 +10:00
James.Yang 3d372548b4 [POWERPC] Remove CPU_FTR_NEED_COHERENT for 7448.
Remove CPU_FTR_NEED_COHERENT for MPC7448 (and single-core MPC86xx).
This prevents needlessly setting M=1 when not SMP.

Signed-off-by: James.Yang <James.Yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-05-17 21:10:15 +10:00
Olof Johansson 25fc530eed [POWERPC] pasemi: PA6T oprofile support
Oprofile support for PA6T, kernel side.

Also rename the PA6T_SPRN.* defines to SPRN_PA6T.*.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-04-24 21:31:51 +10:00
Josh Boyer a14c4508f4 [POWERPC] Fix PowerPC 750CL and 750GX CPU features
PowerPC 750CL has high BATs.  The patch below adds a CPU_FTRS_750CL that
includes that.  Without it, the original firmware mappings in the high BATs
aren't cleared which continue to override the linux translations.

It also adds CPU_FTR_COMMON to CPU_FTRS_750GX for completeness.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-04-24 21:31:47 +10:00
Jake Moilanen cfbff8a380 [POWERPC] 750CL cputable entry
750CL cputable entry from Steve Winiecki.

Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-03-09 15:03:26 +11:00
Olof Johansson 3546e811f1 [POWERPC] No DEEPNAP on 970MP 1.0
970MP rev 1.0 is reported to have nonworking DEEPNAP support, we've had
bug reports of lockups on those machines. Appearantly Apple used them
on some dual-core dual-cpu systems. Rev 1.1 is OK, and that's the one
that all 4-way systems seem to use.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-03-08 04:09:32 +11:00
Stephen Rothwell 40d244d69a [POWERPC] correct a prototype
This rids us of a warning.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:52 +11:00
Olof Johansson 1199919b69 [POWERPC] pasemi: Idle loops
Powersave support on PA6T. Right now it only uses 'doze' mode, and
will default to no savings (spin).

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07 14:03:22 +11:00
Olof Johansson 1bd2e5ae18 [POWERPC] Add PMC type to cputable
Add cputable entries for which type of PMC implementation the processor
has.

I've only filled in the current 64-bit processors, the unfilled default
value will have same behaviour as before so it can be done over time
as needed.

Also tidy up the dummy_perf implementation a bit, aggregating it into
one function with ifdefs instead of several.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07 14:03:19 +11:00
Kumar Gala a147c5857c [POWERPC] Fix 440SPe CPU table entry
The 440SPe CPU table entry was missing the CPU_FTR_NODSISRALIGN and
really should have been CPU_FTRS_44X.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-12-08 02:45:38 -06:00
Kim Phillips aa42c69c67 [POWERPC] Add support for FP emulation for the e300c2 core
The e300c2 has no FPU.  Its MSR[FP] is grounded to zero.  If an attempt
is made to execute a floating point instruction (including floating-point
load, store, or move instructions), the e300c2 takes a floating-point
unavailable interrupt.

This patch adds support for FP emulation on the e300c2 by declaring a
new CPU_FTR_FP_TAKES_FPUNAVAIL, where FP unavail interrupts are
intercepted and redirected to the ProgramCheck exception path for
correct emulation handling.

(If we run out of CPU_FTR bits we could look to reclaim this bit by adding
support to test the cpu_user_features for PPC_FEATURE_HAS_FPU instead)

It adds a nop to the exception path for 32-bit processors with a FPU.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-12-08 02:43:30 -06:00
Scott Wood 57933f8fbe [POWERPC] Add the e300c3 core to the CPU table.
This core is used in Freescale's 831x chips.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04 20:42:06 +11:00
Mike Wolf fecb352f6b [POWERPC] powerpc: Make 970MP detectable by oprofile
Change the oprofile_cpu_type in cputables.c to be ppc64/970MP.  Oprofile
needs to distinquish the MP from other 970 processors so it can add some
new counters specific to the 970MP.

Signed-off-by: Mike Wolf <mjw@us.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04 20:41:02 +11:00
Paul Mackerras 974a76f513 [POWERPC] Distinguish POWER6 partition modes and tell userspace
This adds code to look at the properties firmware puts in the device
tree to determine what compatibility mode the partition is in on
POWER6 machines, and set the ELF aux vector AT_HWCAP and AT_PLATFORM
entries appropriately.

Specifically, we look at the cpu-version property in the cpu node(s).
If that contains a "logical" PVR value (of the form 0x0f00000x), we
call identify_cpu again with this PVR value.  A value of 0x0f000001
indicates the partition is in POWER5+ compatibility mode, and a value
of 0x0f000002 indicates "POWER6 architected" mode, with various
extensions disabled.  We also look for various other properties:
ibm,dfp, ibm,purr and ibm,spurr.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04 20:40:16 +11:00
Maynard Johnson 18f2190d79 [POWERPC] cell: Add oprofile support
Add PPU event-based and cycle-based profiling support to Oprofile for Cell.

Oprofile is expected to collect data on all CPUs simultaneously.
However, there is one set of performance counters per node.  There are
two hardware threads or virtual CPUs on each node.  Hence, OProfile must
multiplex in time the performance counter collection on the two virtual
CPUs.

The multiplexing of the performance counters is done by a virtual
counter routine.  Initially, the counters are configured to collect data
on the even CPUs in the system, one CPU per node.  In order to capture
the PC for the virtual CPU when the performance counter interrupt occurs
(the specified number of events between samples has occurred), the even
processors are configured to handle the performance counter interrupts
for their node.  The virtual counter routine is called via a kernel
timer after the virtual sample time.  The routine stops the counters,
saves the current counts, loads the last counts for the other virtual
CPU on the node, sets interrupts to be handled by the other virtual CPU
and restarts the counters, the virtual timer routine is scheduled to run
again.  The virtual sample time is kept relatively small to make sure
sampling occurs on both CPUs on the node with a relatively small
granularity.  Whenever the counters overflow, the performance counter
interrupt is called to collect the PC for the CPU where data is being
collected.

The oprofile driver relies on a firmware RTAS call to setup the debug bus
to route the desired signals to the performance counter hardware to be
counted.  The RTAS call must set the routing registers appropriately in
each of the islands to pass the signals down the debug bus as well as
routing the signals from a particular island onto the bus.  There is a
second firmware RTAS call to reset the debug bus to the non pass thru
state when the counters are not in use.

Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04 20:40:14 +11:00
Paul Mackerras 79acbb3ff2 Merge branch 'linux-2.6' into for-linus 2006-12-04 15:59:07 +11:00
Benjamin Herrenschmidt 0909c8c2d5 [POWERPC] Support feature fixups in vdso's
This patch reworks the feature fixup mecanism so vdso's can be fixed up.
The main issue was that the construct:

        .long   label  (or .llong on 64 bits)

will not work in the case of a shared library like the vdso. It will
generate an empty placeholder in the fixup table along with a reloc,
which is not something we can deal with in the vdso.

The idea here (thanks Alan Modra !) is to instead use something like:

1:
        .long   label - 1b

That is, the feature fixup tables no longer contain addresses of bits of
code to patch, but offsets of such code from the fixup table entry
itself. That is properly resolved by ld when building the .so's. I've
modified the fixup mecanism generically to use that method for the rest
of the kernel as well.

Another trick is that the 32 bits vDSO included in the 64 bits kernel
need to have a table in the 64 bits format. However, gas does not
support 32 bits code with a statement of the form:

        .llong  label - 1b  (Or even just .llong label)

That is, it cannot emit the right fixup/relocation for the linker to use
to assign a 32 bits address to an .llong field. Thus, in the specific
case of the 32 bits vdso built as part of the 64 bits kernel, we are
using a modified macro that generates:

        .long   0xffffffff
        .llong  label - 1b

Note that is assumes that the value is negative which is enforced by
the .lds (those offsets are always negative as the .text is always
before the fixup table and gas doesn't support emiting the reloc the
other way around).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-25 11:54:07 +10:00
Benjamin Herrenschmidt 42c4aaadb7 [POWERPC] Consolidate feature fixup code
There are currently two versions of the functions for applying the
feature fixups, one for CPU features and one for firmware features. In
addition, they are both in assembly and with separate implementations
for 32 and 64 bits. identify_cpu() is also implemented in assembly and
separately for 32 and 64 bits.

This patch replaces them with a pair of C functions. The call sites are
slightly moved on ppc64 as well to be called from C instead of from
assembly, though it's a very small change, and thus shouldn't cause any
problem.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-25 11:42:10 +10:00
Jake Moilanen 362ff7b2ac [POWERPC] Add 970GX cputable entry
970GX cputable entry from Steve Winiecki.

Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com>

 arch/powerpc/kernel/cputable.c          |   15 +++++++++++++++
 arch/powerpc/oprofile/op_model_power4.c |    2 +-
 include/asm-powerpc/reg.h               |    1 +
 3 files changed, 17 insertions(+), 1 deletion(-)
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-23 18:23:17 +10:00
Olof Johansson 5b43d20a4d [POWERPC] powerpc: Enable DEEPNAP power savings mode on 970MP
Without this patch, on an idle system I get:

cpu-power-0:21.638
cpu-power-1:27.102
cpu-power-2:29.343
cpu-power-3:25.784
Total: 103.8W

With this patch:

cpu-power-0:11.730
cpu-power-1:17.185
cpu-power-2:18.547
cpu-power-3:17.528
Total: 65.0W

If I lower HZ to 100, I can get it as low as:

cpu-power-0:10.938
cpu-power-1:16.021
cpu-power-2:17.245
cpu-power-3:16.145
Total: 60.2W

Another (older) Quad G5 went from 54W to 39W at HZ=250.

Coming back out of Deep Nap takes 40-70 cycles longer than coming back
from just Nap (which already takes quite a while). I don't think it'll
be a performance issue (interrupt latency on an idle system), but in
case someone does measurements feel free to report them.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 16:32:25 +10:00
Anton Blanchard 99f4861025 [POWERPC] POWER6 has 6 PMCs
Change ->num_pmcs to match the number of PMCs in POWER6.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-16 15:53:30 +10:00
Kim Phillips 6c4a2501d0 [POWERPC] Add initial support for the e300c2 core
Add support for the Freescale e300c2 core found in the MPC832x processor line.

As far as initial kernel support is concerned, the e300c2 core is
identical to the e300c1 found in the mpc834x, except that it's had its
floating point unit chopped off.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 15:24:27 +10:00
Peter Bergner 838fdb4d2d [POWERPC] Add AT_PLATFORM value for Xilinx Virtex-4 FX
Jakub noticed the cputable.c entry for Xilinx Virtex-4 FX was missing
a .platform value, so the AT_PLATFORM value wouldn't be set correctly.
This adds it.

Signed-off-by: Peter Bergner <bergner@vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-09-21 22:54:54 +10:00
Olof Johansson b3ebd1d862 [POWERPC] powerpc: PA6T cputable entry, PVR value
Introduce PWRficient PA6T cputable entries and feature bits.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-09-13 18:39:52 +10:00
Olof Johansson f39b7a55a8 [POWERPC] Cleanup CPU inits
Cleanup CPU inits a bit more, Geoff Levand already did some earlier.

* Move CPU state save to cpu_setup, since cpu_setup is only ever done
  on cpu 0 on 64-bit and save is never done more than once.
* Rename __restore_cpu_setup to __restore_cpu_ppc970 and add
  function pointers to the cputable to use instead. Powermac always
  has 970 so no need to check there.
* Rename __970_cpu_preinit to __cpu_preinit_ppc970 and check PVR before
  calling it instead of in it, it's too early to use cputable.
* Rename pSeries_secondary_smp_init to generic_secondary_smp_init since
  everyone but powermac and iSeries use it.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-08-25 13:27:35 +10:00
Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Kumar Gala 9ad494f624 powerpc: minor cleanups for mpc86xx
* Remove duplicated cputable entry for 8641 (matches w/7448)
* Removed __init from function prototypes in mpc86xx.h
* Moved pci fixups into board specific code
* Moved mpc86xx_exclude_device to generic mpc86xx pci code
* Fixed sparse warnings in mpc86xx_smp.c
* Removed board specific header include from asm-powerpc/mpc86xx.h

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-06-28 00:37:45 -05:00
Jon Loeliger 9674ed38d8 [POWERPC] Add 8641 CPU table entry.
Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-21 15:01:28 +10:00
Anton Blanchard 227318bbde [POWERPC] Remove stale 64bit on 32bit kernel code
Remove some stale POWER3/POWER4/970 on 32bit kernel support.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-15 19:31:26 +10:00
Paul Mackerras fab5db97e4 [PATCH] powerpc: Implement support for setting little-endian mode via prctl
This adds the PowerPC part of the code to allow processes to change
their endian mode via prctl.

This also extends the alignment exception handler to be able to fix up
alignment exceptions that occur in little-endian mode, both for
"PowerPC" little-endian and true little-endian.

We always enter signal handlers in big-endian mode -- the support for
little-endian mode does not amount to the creation of a little-endian
user/kernel ABI.  If the signal handler returns, the endian mode is
restored to what it was when the signal was delivered.

We have two new kernel CPU feature bits, one for PPC little-endian and
one for true little-endian.  Most of the classic 32-bit processors
support PPC little-endian, and this is reflected in the CPU feature
table.  There are two corresponding feature bits reported to userland
in the AT_HWCAP aux vector entry.

This is based on an earlier patch by Anton Blanchard.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-09 21:24:15 +10:00
Michael Neuling e78dbc800c [PATCH] powerpc: oprofile support for POWER6
POWER6 moves some of the MMCRA bits and also requires some bits to be
cleared each PMU interrupt.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Acked-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-09 21:24:05 +10:00
Anton Blanchard 87af41beb9 [PATCH] powerpc: add num_pmcs to 970MP cputable entry
The 970MP cputable entry needs a num_pmcs entry for oprofile to work.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-06-09 21:21:03 +10:00
Geoff Levand b26f100d89 [PATCH] powerpc: remove do-nothing cpu setup routines
Removed the do-nothing routines __setup_cpu_power3 and
__setup_cpu_power4 and replaced them with a null pointer check
in the caller.  Also removed the Cell processor specific
routine __setup_cpu_be which improperly accessed the
hypervisor page size configuration at SPR HID6.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-05-19 14:24:18 +10:00
Anton Blanchard 03054d51a7 [PATCH] powerpc: Add cputable entry for POWER6
Add a cputable entry for the POWER6 processor.

The SIHV and SIPR bits in the mmcra have moved in POWER6, so disable
support for that until oprofile is fixed.

Also tell firmware that we know about POWER6.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-04-29 10:56:58 +10:00
Paul Mackerras 5164501794 Merge ../linux-2.6 2006-03-09 14:32:05 +11:00
Benjamin Herrenschmidt aa5cb02143 [PATCH] powerpc: Expose SMT and L1 icache snoop userland features
This patch makes userland aware of the icache snoop capability of the
POWER5 (and possibly others in the future) and of SMT capabilities.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-03-03 22:00:23 +11:00
Grant C. Likely 72646c7f69 [PATCH] powerpc: Add Virtex-4 FX to cpu table
Signed-off-by: Grant C. Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-07 22:36:00 +11:00
Andy Whitcroft 7a45fb19ce [PATCH] powerpc: oprofile cpu type names clash with other code
In 2.6.15-git6 a change was commited in the oprofile support in
the powerpc architecture.  It introduced the powerpc_oprofile_type
which contains the define G4.  This causes a name clash with the
existing wacom usb tablet driver.

      CC [M]  drivers/usb/input/wacom.o
    drivers/usb/input/wacom.c:98: error: conflicting types for `G4'
    include/asm/cputable.h:37: error: previous declaration of `G4'
      CC [M]  drivers/usb/mon/mon_text.o
    make[3]: *** [drivers/usb/input/wacom.o] Error 1
    make[2]: *** [drivers/usb/input] Error 2

The elements of an enum declared in global scope are effectivly
global identifiers themselves.  As such we need to ensure the names
are unique.  This patch updates the later oprofile support to use
unique names.

Signed-off-by: Andy Whitcroft <apw@shadowen.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-14 11:12:16 +11:00
Paul Mackerras 80f15dc703 powerpc: Provide a suitable AT_PLATFORM value
The glibc folks want to use AT_PLATFORM to select between possible
alternative versions of shared libraries.  This commit makes the kernel
supply an AT_PLATFORM string that indicates what class of processor
we are running on.  Processors with the same set of user-level
instructions and roughly the same instruction scheduling characteristics
are given the same AT_PLATFORM value; for example, 821, 823 and 860
are all reported as "ppc823", and 7447, 7447A, 7448, 7450, 7451, 7455
are all called "ppc7450".

The intention is that the AT_PLATFORM values match the values that
gcc accepts for the -mcpu= option.  For values which are numeric
(e.g. -mcpu=750), "ppc" has been prepended.

This also adds a PPC_FEATURE_BOOKE bit to the AT_HWCAP value and sets
it for the 440 family and the Freescale 85xx family.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-14 10:11:39 +11:00
Anton Blanchard 834608f71a [PATCH] ppc64: POWER5+ oprofile support
POWER5+ adds new PMU groups and as such needs to be treated differently
by oprofile userspace. Change it to report itself as power5+.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 16:03:30 +11:00
Anton Blanchard 32a33994d5 [PATCH] ppc64: Fix oprofile when compiled as a module
My recent changes to oprofile broke it when built as a module. Fix it by
using an enum instead of a function pointer. This way we still retain
the oprofile configuration in the cputable.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 16:02:52 +11:00
Arnd Bergmann c902be71dc [PATCH] cell: enable pause(0) in cpu_idle
This patch enables support for pause(0) power management state
for the Cell Broadband Processor, which is import for power efficient
operation. The pervasive infrastructure will in the future enable
us to introduce more functionality specific to the Cell's
pervasive unit.

From: Maximino Aguilar <maguilar@us.ibm.com>
Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 15:44:32 +11:00
Andy Fleming 555d97ac87 [PATCH] powerpc: G4+ oprofile support
This patch adds oprofile support for the 7450 and all its multitudinous
derivatives.

* Added 7450 (and derivatives) support for oprofile
* Changed e500 cputable to have oprofile model and cpu_type fields
* Added support for classic 32-bit performance monitor interrupt
* Cleaned up common powerpc oprofile code to be as common as possible
* Cleaned up oprofile_impl.h to reflect 32 bit classic code
* Added 32-bit MMCRx bitfield definitions and SPR numbers

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-09 15:06:03 +11:00
Paul Mackerras a7ddc5e853 powerpc: Add user CPU features for POWER4, POWER5, POWER5+ and Cell.
This is at the request of the glibc folks, who want to use these bits
to select libraries optimized for the microarchitecture and new
instructions in these processors.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-10 14:29:18 +11:00
Roland Dreier b0f7b8bc57 [PATCH] ppc32: Add 440SPe support
Add support for the AMCC PowerPC 440SPe SoC, including PCI Express in root
port mode.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:26 -08:00
Benjamin Herrenschmidt 3c726f8dee [PATCH] ppc64: support 64k pages
Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel
base page size to 64K.  The resulting kernel still boots on any
hardware.  On current machines with 4K pages support only, the kernel
will maintain 16 "subpages" for each 64K page transparently.

Note that while real 64K capable HW has been tested, the current patch
will not enable it yet as such hardware is not released yet, and I'm
still verifying with the firmware architects the proper to get the
information from the newer hypervisors.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-06 16:56:47 -08:00
Paul Mackerras c1c3a554a3 powerpc: 32-bit needs cur_cpu_spec exported too
Somehow we ended up with an #ifdef CONFIG_PPC64 around the export
of cur_cpu_spec, but raid6 as a module needs it on ppc32 as well
as ppc64.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-29 22:08:55 +10:00
Paul Mackerras 985990137e Merge changes from linux-2.6 by hand 2005-10-22 16:51:34 +10:00
Stephen Rothwell 4920960f57 powerpc: consolidate cputable.c
Also simplify arch/ppc64/kernel/Makefile

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2005-10-13 09:49:45 +10:00