Commit graph

19 commits

Author SHA1 Message Date
Mike Frysinger
c250bfb93c Blackfin arch: cleanup and unify the ins functions
this also fixes some errors in the ipipe merge

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:38 +08:00
Yi Li
6a01f23033 Blackfin arch: merge adeos blackfin part to arch/blackfin/
[Mike Frysinger <vapier.adi@gmail.com>:
 - handle bf531/bf532/bf534/bf536 variants in ipipe.h
 - cleanup IPIPE logic for bfin_set_irq_handler()
 - cleanup ipipe asm code a bit and add missing ENDPROC()
 - simplify IPIPE code in trap_c
 - unify some of the IPIPE code and fix style
 - simplify DO_IRQ_L1 handling with ipipe code
 - revert IRQ_SW_INT# addition from ipipe merge
 - remove duplicate get_{c,s}clk() prototypes
]

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:39 +08:00
Bernd Schmidt
71ae92f51a Blackfin arch: Replace C version of 64 bit multiply with hand optimized assembly
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:39 +08:00
Mike Frysinger
fe8015ce25 Blackfin arch: move EXPORT_SYMBOL to the place where it is actually defined
- kernel_thread
 - irq_flags
 - checksum

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-10-28 11:07:15 +08:00
Robin Getz
251383c7c5 Blackfin arch: Allow ins functions to have a low latency version
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-08-14 15:12:55 +08:00
Bryan Wu
ca56d9aaf2 Blackfin arch: Fix typo. it should be _outsw_8
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-05-20 16:45:29 +08:00
Michael Hennerich
5906967638 Blackfin arch: IO Port functions to read/write unalligned memory
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-05-17 16:38:52 +08:00
Al Viro
45b3947c2d [Blackfin] arch: Blackfin checksum annotations
FSVOtest in this case, since I don't have the hardware...
However, all changes seen by gcc are actually
 - explicit cast to unsigned short in return expression of functions
    returning unsigned short
 - csum_fold() return type changed from unsigned int to __sum16
   (unsigned short), same as for all other architecture and as net/* expects;
   expression actually returned is ((~(sum << 16)) >> 16) with sum being
   unsigned 32bit, so it's (a) going to fit into the range of unsigned short
   and (b) had been unsigned all along, so no sign expansion mess happened.

Tested-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: David Miller <davem@davemloft.net>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-05-12 11:55:10 +08:00
Yi Li
c50e19f498 [Blackfin] arch: fix bug - make memcpy return the dest addr.
The memcpy() function returns the src pointer instead of the dst pointer.
This patch fix this bug.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-12-21 21:12:21 +08:00
Mike Frysinger
d0025e5edf Blackfin arch: move EXPORT_SYMBOL() to C files where the symbol is actually defined
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-21 15:34:51 +08:00
Michael Hennerich
5c91fb902d Blackfin arch: Add assembly function insl_16
/*
 * CPUs often take a performance hit when accessing unaligned memory
 * locations. The actual performance hit varies, it can be small if the
 * hardware handles it or large if we have to take an exception and fix
 * it
 * in software.
 *
 * Since an ethernet header is 14 bytes network drivers often end up
 * with
 * the IP header at an unaligned offset. The IP header can be aligned by
 * shifting the start of the packet by 2 bytes. Drivers should do this
 * with:
 *
 * skb_reserve(NET_IP_ALIGN);
 *
 * The downside to this alignment of the IP header is that the DMA is
 * now
 * unaligned. On some architectures the cost of an unaligned DMA is high
 * and this cost outweighs the gains made by aligning the IP header.
 *
 * Since this trade off varies between architectures, we allow
 * NET_IP_ALIGN
 * to be overridden.
 */

This new function insl_16 allows to read form 32-bit IO and writes to
16-bit aligned memory. This is useful in above described scenario -
In particular with the AXIS AX88180 Gigabit Ethernet MAC.
Once the device is in 32-bit mode, reads from the RX FIFO always
decrements 4bytes.
While on the other side the destination address in SDRAM is always
16-bit aligned.
If we use skb_reserve(0) the receive buffer is 32-bit aligned but later
we hit a unaligned exception in the IP code.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-17 23:46:58 +08:00
Mike Frysinger
1754a5d9f9 Blackfin arch: use do_div() for the 64bit division as pointed out by Bernd
If you need a 64 bit divide in the kernel, use asm/div64.h.
Revert the addition of udivdi3.

Cc: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-23 11:28:11 +08:00
Mike Frysinger
b0a68dc07e Blackfin arch: add assembly function for doing 64bit unsigned division
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-21 22:57:36 +08:00
Mike Frysinger
1aafd90912 Blackfin arch: revise anomaly handling by basing things on the compiler not the kconfig defines
revise anomaly handling by basing things on the compiler not the kconfig defines,
so the header is stable and usable outside of the kernel. This also allows us to
move some code from preprocessing to compiling (gcc culls dead code)
which should help with code quality (readability, catch minor bugs, etc...).

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25 11:19:14 +08:00
Mike Frysinger
1f83b8f148 Blackfin arch: cleanup warnings from checkpatch -- no functional changes
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 22:58:21 +08:00
Robin Getz
4bf3f3cbb6 Blackfin arch: update ANOMALY handling
update lists for 533, 537, and add SSYNC workaround into assembly files.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-21 11:34:16 +08:00
Mike Frysinger
51be24c351 Blackfin arch: add proper ENDPROC()
add proper ENDPROC() to close out assembly functions
so size/type is set properly in the final ELF image

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-11 15:31:30 +08:00
Michael Hennerich
8af10b7987 Blackfin arch: Add Workaround for ANOMALY 05000257
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-21 09:50:21 -07:00
Bryan Wu
1394f03221 blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix!  Tinyboards.

The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc.  (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000.  Since then ADI has put this core into its Blackfin
processor family of devices.  The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set.  It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.

The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc

This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/

We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 12:12:58 -07:00