Commit graph

77 commits

Author SHA1 Message Date
Lennert Buytenhek
2bf3010843 [ARM] Kirkwood: disable propagation of mbus error to the CPU local bus
Disable propagation of mbus errors to the CPU local bus, as this causes
mbus errors (which can occur for example for PCI aborts) to throw CPU
aborts, which we're not set up to deal with.

Reported-by: Dieter Kiermaier <dk-arm-linux@gmx.de>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-13 12:14:23 -05:00
Lennert Buytenhek
a1897fa67c [ARM] Kirkwood: clarify PCIe MEM bus/physical address distinction
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-07 20:18:24 -05:00
Lennert Buytenhek
35f029e251 [ARM] kirkwood: fix PCI I/O port assignment
Instead of allocating PCI devices I/O port bus addresses from the
000xxxxx I/O port range as intended, due to a bus versus physical
address mixup, the Kirkwood PCIe handling code inadvertently
allocated I/O port bus addresses from the f20xxxxx address range
(which is the physical address range of the PCIe I/O mapping window),
but then direct all I/O port accesses to bus addresses 000xxxxx,
which would then not be decoded at all.

Fix this by setting the base address of the PCIe I/O space struct
resource to KIRKWOOD_PCIE_IO_BUS_BASE instead of the incorrect
KIRKWOOD_PCIE_IO_PHYS_BASE, and fix up __io() to expect addresses
offsetted by the former instead of the latter.

(The suggested fix of directing I/O port accesses from the host to
bus addresses f20xxxxx instead has the problem that assigning full
32bit I/O port bus addresses (f20xxxxx) doesn't work on all PCI
devices, as not all PCI devices implement full 32 bit BAR registers
for I/O ports.  We should really try to allocate I/O port bus
addresses that fit in 16 bits.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-07 20:14:21 -05:00
Li Jie
6de95c1987 [ARM] kirkwood: fix section mismatch
kirkwood_timer_init() and kirkwood_pcie_setup() lack of __init which
causes following warnings:

WARNING: vmlinux.o(.text+0x9568): Section mismatch in reference from
the function kirkwood_timer_init() to the function
.init.text:kirkwood_find_tclk()
The function kirkwood_timer_init() references
the function __init kirkwood_find_tclk().
This is often because kirkwood_timer_init lacks a __init
annotation or the annotation of kirkwood_find_tclk is wrong.

WARNING: vmlinux.o(.text+0x979c): Section mismatch in reference from
the function kirkwood_pcie_setup() to the function
.init.text:orion_pcie_setup()
The function kirkwood_pcie_setup() references
the function __init orion_pcie_setup().
This is often because kirkwood_pcie_setup lacks a __init
annotation or the annotation of orion_pcie_setup is wrong.

Signed-off-by: lijie <eltshanli@gmail.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
2009-11-05 23:03:21 -05:00
Simon Kagstrom
5d89655573 [ARM] OpenRD base: Initialize PCI express and i2c
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Dieter Kiermaier <dk-arm-linux@gmx.de>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-05 23:03:20 -05:00
Russell King
87d721ad7a Merge branch 'master' into devel 2009-09-12 12:04:37 +01:00
John Holland
c55bf102b6 [ARM] Kirkwood: enable eSATA on QNAP TS-219P
Initialize PCI/PCIe on the QNAP TS-119, TS-219 and TS-219P hardware
allowing the use of the discrete eSATA controller connected to the PCIe
bus in the TS-219P.

Signed-off-by: John Holland <john.holland@cellent-fs.de>
Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-08-24 11:56:00 -04:00
Ron Lee
decf770795 [ARM] Kirkwood: Initialise SATA for OpenRD-Base
Signed-off-by: Ron Lee <ron@debian.org>
Signed-off-by: Dhaval Vasa <dhaval.vasa@einfochips.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-08-10 18:04:00 -04:00
Dhaval Vasa
7eeae54c68 [ARM] Kirkwood: Marvell OpenRD-Base board support
reference:
http://open-rd.org
http://code.google.com/p/openrd

This patch is tested for:
1. Boot from DRAM/NAND flash
2. NAND read/write/erase
3. GbE0
4. USB read/write

FIXME:
1. SD/UART1 selection
2. MPP configuration (currently, default)
3. PEX

Signed-off-by: Dhaval Vasa <dhaval.vasa@einfochips.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-08-10 18:03:59 -04:00
Siddarth Gore
aec1bad326 [ARM] Kirkwood: Add support for 6281-A1
Signed-off-by: Siddarth Gore <gores@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-08-10 18:03:59 -04:00
Simon Kagstrom
e2ce0e718e [ARM] Kirkwood: Correct header define
Correct define typo (. -> ,)

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-07-06 23:54:56 -04:00
Nicolas Pitre
ae5c8c8373 [ARM] Kirkwood: platform device registration for the crypto engine
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:05:03 -04:00
Nicolas Pitre
c1191b0e3b [ARM] Kirkwood: create a mapping for the Security Accelerator SRAM
Always creating the physical mapping should do no harm, so let's remove
the interface that was provided for its optional creation and make the
mapping static.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:05:02 -04:00
Nicolas Pitre
fc63b7239a [ARM] Kirkwood: let's use real size for resources
We don't have to define resources to the minimal physical window size
as setup_cpu_win() will cope with smaller sizes already.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:05:01 -04:00
Nicolas Pitre
3b937a7dbd [ARM] Orion/Kirkwood: rename orion5x_wdt to orion_wdt
The Orion watchdog driver is also used on Kirkwood.

Convention is to use orion5x for stuff specific to 88F5xxx Orion chips
and simply "orion" for shared stuff across SoCs including Kirkwood.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:05:00 -04:00
Thomas Reitmayr
054bd3f053 [ARM] Kirkwood: Add the watchdog timer as a platform device.
The Kirkwood architecture uses the same watchdog device as the Orion
architecture. This patch adds orion5x_wdt as a platform device for
Kirkwood.

Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at>
Tested-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:04:59 -04:00
Rabeeh Khoury
e8b2b7ba12 [ARM] Kirkwood: clock gating for unused peripherals
To save power:

1. Enabling clock gating of unused peripherals

2. PLL and PHY of the units are also disabled (when possible.

Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:04:58 -04:00
Nicolas Pitre
fb7b2d3f0d [ARM] Kirkwood: rationalize NAND setup a bit
Common resource and platform device structures are moved to common.c
and only the partition table and chip delay remains a per board
parameter.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:04:58 -04:00
Erik Benada
a88656553d [ARM] orion: convert gpio to use gpiolib
Signed-off-by: Erik Benada <erikbenada@yahoo.ca>

[ nico: fix locking, additional cleanups ]

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:04:57 -04:00
Nicolas Pitre
f14081e109 [ARM] Kirkwood: comment type fix
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:04:56 -04:00
Nicolas Pitre
797b2c80e8 [ARM] Kirkwood: only map peripheral register space once
Just like commit 1419468ab5, let's save some TLB entries by making
ioremap() return pointers into the boot-time Kirkwood peripheral
iotable mapping whenever someone tries to ioremap any part of the Kirkwood
peripheral register space.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:04:56 -04:00
Siddarth Gore
96e7d211b4 [ARM] Kirkwood: enable gpio leds/buttons for the mv88f6281gtw_ge board
Signed-off-by: Siddarth Gore <gores@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2009-06-08 13:04:55 -04:00
Lennert Buytenhek
91af7bb2f4 [ARM] Kirkwood: add Marvell 88F6281 GTW GE board support
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2009-06-08 13:04:55 -04:00
Rabeeh Khoury
e50b6befae [ARM] Kirkwood: CPU idle driver
The patch adds support for Kirkwood cpu idle.
Two idle states are defined:
1. Wait-for-interrupt (replacing default kirkwood wfi)
2. Wait-for-interrupt and DDR self refresh

Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08 13:04:41 -04:00
Nicolas Pitre
a49a018a6e [ARM] add coherent DMA mask for mv643xx_eth
Since commit eb0519b5a1, mv643xx_eth is non functional on ARM because
the platform device declaration does not include any coherent DMA mask
and coherent memory allocations fail.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-22 17:05:53 -04:00
Martin Michlmayr
85bc26211c [ARM] Orion: Remove explicit name for platform device resources
Remove explicit names from platform device resources since they will
automatically be named after the platform device they're associated
with.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-21 16:45:20 -04:00
Thomas Reitmayr
385aa9e701 [ARM] Kirkwood: Correct MPP for SATA activity/presence LEDs of QNAP TS-119/TS-219.
For the QNAP TS-119 and TS-219 the wrong MPPs were used for the SATA
activity/presence LEDs. The new settings make these LEDs work as
expected.

Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at>
Tested-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-20 22:17:32 -04:00
Nicolas Pitre
fdd8b079e3 [ARM] 5460/1: Orion: reduce namespace pollution
Symbols like SOFT_RESET are way too generic to be exported at large.
To avoid this, let's move the mbus bridge register defines into a
separate file and include it where needed.  This affects mach-kirkwood,
mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all
share code in plat-orion which relies on those defines.

Some other defines have been moved to narrower scopes, or simply deleted
when they had no user.

This fixes compilation problem with mpt2sas on the above listed
platforms.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-23 23:25:41 +01:00
Yang Hongyang
284901a90a dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)

Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:11 -07:00
Yang Hongyang
6a35528a83 dma-mapping: replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)
Replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)

Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:10 -07:00
Russell King
ed40d0c472 Merge branch 'origin' into devel
Conflicts:
	sound/soc/pxa/pxa2xx-i2s.c
2009-03-28 20:29:51 +00:00
Russell King
cf281a99b6 Merge git://git.marvell.com/orion into devel 2009-03-25 10:00:08 +00:00
Martin Michlmayr
586dcf279b [ARM] Kirkwood: Add support for QNAP TS-119/TS-219 Turbo NAS
Add support for the QNAP TS-119 and TS-219 Turbo NAS devices.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-23 16:12:38 -04:00
Martin Michlmayr
a441891f9d [ARM] Kirkwood: More consistency regarding MPP naming
With the exception of UART0, all MPP names are uppercase.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-23 14:45:24 -04:00
Martin Michlmayr
6574e001b4 [ARM] Kirkwood: Hook up I2C
Hook up I2C on Marvell Kirkwood.  Tested on a QNAP TS-219 which has
RTC connected through I2C.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-23 14:42:00 -04:00
Lennert Buytenhek
e84665c9cb dsa: add switch chip cascading support
The initial version of the DSA driver only supported a single switch
chip per network interface, while DSA-capable switch chips can be
interconnected to form a tree of switch chips.  This patch adds support
for multiple switch chips on a network interface.

An example topology for a 16-port device with an embedded CPU is as
follows:

	+-----+          +--------+       +--------+
	|     |eth0    10| switch |9    10| switch |
	| CPU +----------+        +-------+        |
	|     |          | chip 0 |       | chip 1 |
	+-----+          +---++---+       +---++---+
	                     ||               ||
	                     ||               ||
	                     ||1000baseT      ||1000baseT
	                     ||ports 1-8      ||ports 9-16

This requires a couple of interdependent changes in the DSA layer:

- The dsa platform driver data needs to be extended: there is still
  only one netdevice per DSA driver instance (eth0 in the example
  above), but each of the switch chips in the tree needs its own
  mii_bus device pointer, MII management bus address, and port name
  array. (include/net/dsa.h)  The existing in-tree dsa users need
  some small changes to deal with this. (arch/arm)

- The DSA and Ethertype DSA tagging modules need to be extended to
  use the DSA device ID field on receive and demultiplex the packet
  accordingly, and fill in the DSA device ID field on transmit
  according to which switch chip the packet is heading to.
  (net/dsa/tag_{dsa,edsa}.c)

- The concept of "CPU port", which is the switch chip port that the
  CPU is connected to (port 10 on switch chip 0 in the example), needs
  to be extended with the concept of "upstream port", which is the
  port on the switch chip that will bring us one hop closer to the CPU
  (port 10 for both switch chips in the example above).

- The dsa platform data needs to specify which ports on which switch
  chips are links to other switch chips, so that we can enable DSA
  tagging mode on them.  (For inter-switch links, we always use
  non-EtherType DSA tagging, since it has lower overhead.  The CPU
  link uses dsa or edsa tagging depending on what the 'root' switch
  chip supports.)  This is done by specifying "dsa" for the given
  port in the port array.

- The dsa platform data needs to be extended with information on via
  which port to reach any given switch chip from any given switch chip.
  This info is specified via the per-switch chip data struct ->rtable[]
  array, which gives the nexthop ports for each of the other switches
  in the tree.

For the example topology above, the dsa platform data would look
something like this:

	static struct dsa_chip_data sw[2] = {
		{
			.mii_bus	= &foo,
			.sw_addr	= 1,
			.port_names[0]	= "p1",
			.port_names[1]	= "p2",
			.port_names[2]	= "p3",
			.port_names[3]	= "p4",
			.port_names[4]	= "p5",
			.port_names[5]	= "p6",
			.port_names[6]	= "p7",
			.port_names[7]	= "p8",
			.port_names[9]	= "dsa",
			.port_names[10]	= "cpu",
			.rtable		= (s8 []){ -1, 9, },
		}, {
			.mii_bus	= &foo,
			.sw_addr	= 2,
			.port_names[0]	= "p9",
			.port_names[1]	= "p10",
			.port_names[2]	= "p11",
			.port_names[3]	= "p12",
			.port_names[4]	= "p13",
			.port_names[5]	= "p14",
			.port_names[6]	= "p15",
			.port_names[7]	= "p16",
			.port_names[10]	= "dsa",
			.rtable		= (s8 []){ 10, -1, },
		},
	},

	static struct dsa_platform_data pd = {
		.netdev		= &foo,
		.nr_switches	= 2,
		.sw		= sw,
	};

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Gary Thomas <gary@mlbassoc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-03-21 19:06:54 -07:00
Russell King
7d83f8fca5 Merge branch 'master' of git://git.marvell.com/orion into devel
Conflicts:

	arch/arm/mach-mx1/devices.c
2009-03-19 23:10:40 +00:00
Russell King
be093beb60 [ARM] pass reboot command line to arch_reset()
OMAP wishes to pass state to the boot loader upon reboot in order to
instruct it whether to wait for USB-based reflashing or not.  There is
already a facility to do this via the reboot() syscall, except we ignore
the string passed to machine_restart().

This patch fixes things to pass this string to arch_reset().  This means
that we keep the reboot mode limited to telling the kernel _how_ to
perform the reboot which should be independent of what we request the
boot loader to do.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-03-19 16:20:24 +00:00
Nicolas Pitre
e96c33d9ed [ARM] Kirkwood: SheevaPlug LED support
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:09:09 -04:00
Nicolas Pitre
3ec0d47427 [ARM] Kirkwood: SheevaPlug USB Power Enable setup
Ideally, the default should be set to 0 and let the EHCI driver turn
it on as needed.  This makes USB usable in the mean time.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:08:33 -04:00
Shadi Ammouri
4640fa606b [ARM] Kirkwood: Marvell SheevaPlug support
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-15 22:04:54 -04:00
Nicolas Pitre
5b99d53483 [ARM] Kirkwood: register internal devices in a common place
The RTC and the two XOR engines are internal to the chip, and therefore
always available since they don't depend on a particular board layout.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-26 22:55:59 -05:00
Nicolas Pitre
249cbfa3f5 [ARM] Kirkwood: remove unneeded includes from board setup files
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-26 21:35:59 -05:00
Nicolas Pitre
3c2613dbbc [ARM] Kirkwood: add NAND support to the DB88F6281 board
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-26 21:19:51 -05:00
Nicolas Pitre
8235ee009c [ARM] Kirkwood: SDIO driver registration for DB6281 and RD6281
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-26 20:22:26 -05:00
Lennert Buytenhek
12f4815b42 [ARM] Kirkwood: enable both XOR engines on the 6281 RD board
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2009-02-19 22:28:47 -05:00
Nicolas Pitre
0100defd28 [ARM] Kirkwood: MPP initialization code
This allows for board support code to set up their MPP config if the
bootloader didn't do it all or did it wrong.  This also allows to
register usable GPIOs.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-19 22:27:52 -05:00
Nicolas Pitre
fd4b9b3650 [ARM] 5401/1: Orion: fix edge triggered GPIO interrupt support
The GPIO interrupts can be configured as either level triggered or edge
triggered, with a default of level triggered.  When an edge triggered
interrupt is requested, the gpio_irq_set_type method is called which
currently switches the given IRQ descriptor between two struct irq_chip
instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This
happens via __setup_irq() which also calls irq_chip_set_defaults() to
assign default methods to uninitialized ones.  The problem is that
irq_chip_set_defaults() is called before the irq_chip reference is
switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this
case) with uninitialized methods such as chip->startup() causing a kernel
oops.

Many solutions are possible, such as making irq_chip_set_defaults() global
and calling it from gpio_irq_set_type(), or calling __irq_set_trigger()
before irq_chip_set_defaults() in __setup_irq().  But those require
modifications to the generic IRQ code which might have adverse effect on
other architectures, and that would still be a fragile arrangement.
Manually copying the missing methods from within gpio_irq_set_type()
would be really ugly and it would break again the day new methods with
automatic defaults are added.

A better solution is to have a single irq_chip instance which can deal
with both edge and level triggered interrupts.  It is also a good idea
to switch the IRQ handler instead, as the edge IRQ handler allows for
one edge IRQ event to be queued as the IRQ is actually masked only when
that second IRQ is received, at which point the hardware can queue an
additional IRQ event, making edge triggered interrupts a bit more
reliable.

Tested-by: Martin Michlmayr <tbm@cyrius.com>

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-17 22:37:09 +00:00
Nicolas Pitre
13731d1a2f [ARM] 5357/1: Kirkwood: add missing ge01 tclk initialization
Otherwise the mv643xx_eth driver will assume 133 MHz which is incorrect.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-08 16:29:41 +00:00
Nicolas Pitre
6e5c11a1c0 [ARM] 5359/1: Kirkwood: fix compilation error
Commit ba84be2338 broke the build.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-08 16:29:40 +00:00