Commit Graph

54 Commits (4b2fabb9ec9b3b1cf5cf848a678058fb20c4d552)

Author SHA1 Message Date
Eric W. Biederman 589e367f9b [PATCH] genirq: x86_64 irq: Move msi message composition into io_apic.c
This removes the hardcoded assumption that irq == vector in the msi
composition code, and it allows the msi message composition to setup logical
mode, or lowest priorirty delivery mode as we do for other apic interrupts,
and with the same selection criteria.

Basically this moves the problem of what is in the msi message into the
architecture irq management code where it belongs.  Not in a generic layer
that doesn't have enough information to compose msi messages properly.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rajesh Shah <rajesh.shah@intel.com>
Cc: Andi Kleen <ak@muc.de>
Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-04 07:55:28 -07:00
Eric W. Biederman c4fa0bbf38 [PATCH] genirq: x86_64 irq: Dynamic irq support
The current implementation of create_irq() is a hack but it is the current
hack that msi.c uses, and unfortunately the ``generic'' apic msi ops depend on
this hack.  Thus we are this hack of assuming irq == vector until the
depencencies in the generic irq code are removed.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rajesh Shah <rajesh.shah@intel.com>
Cc: Andi Kleen <ak@muc.de>
Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-04 07:55:28 -07:00
Eric W. Biederman 0be6652f1e [PATCH] genirq: x86_64 irq: Reenable migrating irqs to other cpus
In the latest changes the code for migrating x86_64 irqs was dropped.  This
reads it in a fashion that will work even if we change the vector on level
triggered irqs when we migrate them.

[akpm@osdl.org: build fix]
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rajesh Shah <rajesh.shah@intel.com>
Cc: Andi Kleen <ak@muc.de>
Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-04 07:55:26 -07:00
Ingo Molnar f29bd1ba68 [PATCH] genirq: convert the x86_64 architecture to irq-chips
This patch converts all the x86_64 PIC controllers layers to the new and
simpler irq-chip interrupt handling layer.

[mingo@elte.hu: The patch also enables the fasteoi handler for x86_64]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Roland Dreier <rolandd@cisco.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-04 07:55:25 -07:00
Andi Kleen f2c2cca3ac [PATCH] Remove APIC version/cpu capability mpparse checking/printing
ACPI went to great trouble to get the APIC version and CPU capabilities
of different CPUs before passing them to the mpparser. But all
that data was used was to print it out.  Actually it even faked some data
based on the boot cpu, not on the actual CPU being booted.

Remove all this code because it's not needed.

Cc: len.brown@intel.com

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:37 +02:00
Andi Kleen 2c8c0e6b8d [PATCH] Convert x86-64 to early param
Instead of hackish manual parsing

Requires earlier i386 patchkit, but also fixes i386 early_printk again.

I removed some obsolete really early parameters which didn't do anything useful.
Also made a few parameters that needed it early (mostly oops printing setup)

Also removed one panic check that wasn't visible without
early console anyways (the early console is now initialized after that
panic)

This cleans up a lot of code.

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:32 +02:00
Andi Kleen 55f05ffaa7 [PATCH] Replace mp bus array with bitmap for bus not pci
Since we only support PCI and ISA legacy busses now there is no need to
have an full array with checking.

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:30 +02:00
Andi Kleen dfa4698c50 [PATCH] Move early chipset quirks out to new file
They did not really belong into io_apic.c. Move them into a new file
and clean it up a bit.

Also remove outdated ATI quirk that was obsolete,

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:30 +02:00
Andi Kleen edd9652296 [PATCH] Remove MPS table APIC renumbering
The MPS table specification says that the operating system should
renumber the IO-APICs following the table as needed.  However in
ACPI this is not allowed or neeeded and all x86-64 systems are ACPI
compliant.

The code was already disabled on some systems because it caused
problems there. Remove it completely now.

CC: mdomsch@dell.com

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:30 +02:00
Andi Kleen eea0e11c1f [PATCH] Factor out common io apic routing entry access
The IO APIC code had lots of duplicated code to read/write 64bit
routing entries into the IO-APIC. Factor this out int common read/write
functions

In a few cases the IO APIC lock is taken more often now, but this
isn't a problem because it's all initialization/shutdown only
slow path code.

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:30 +02:00
Andi Kleen e509913434 [PATCH] Remove leftover MCE/EISA support
No 64bit EISA or Microchannel systems ever. Remove the left over code
in the IO-APIC driver and the mptable parser

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:29 +02:00
Andi Kleen 5cb6b99928 [PATCH] Remove pirq overwrite support
This was an old workaround for broken MP-BIOS. The user could
specify overwrites on the command line.

I've never seen it being used for anything on 64bit. So get
rid of it for now.

Signed-off-by: Andi Kleen <ak@suse.de>
2006-09-26 10:52:29 +02:00
Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Ingo Molnar c0ad90a32f [PATCH] genirq: add ->retrigger() irq op to consolidate hw_irq_resend()
Add ->retrigger() irq op to consolidate hw_irq_resend() implementations.
(Most architectures had it defined to NOP anyway.)

NOTE: ia64 needs testing. i386 and x86_64 tested.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 10:26:23 -07:00
Ingo Molnar d1bef4ed5f [PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.

While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.

The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.

This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.

As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.

The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.

We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.

This patch:

rename desc->handler to desc->chip.

Originally i did not want to do this, because it's a big patch.  But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.

I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.

So lets get over with this quickly.  The conversion was done automatically
via scripts and converts all the code in the kernel.

This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.

[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 10:26:21 -07:00
Andi Kleen a813ce432f [PATCH] x86_64: Rename IOMMU option, fix help and mark option embedded.
- Rename the GART_IOMMU option to IOMMU to make clear it's not
   just for AMD
 - Rewrite the help text to better emphatise this fact
 - Make it an embedded option because too many people get it wrong.

To my astonishment I discovered the aacraid driver tests this
symbol directly. This looks quite broken to me - it's an internal
implementation detail of the PCI DMA API. Can the maintainer
please clarify what this test was intended to do?

Cc: linux-scsi@vger.kernel.org
Cc: alan@redhat.com
Cc: markh@osdl.org
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-26 10:48:17 -07:00
Ingo Molnar 26a3c49cec [PATCH] x86_64: fix vector_lock deadlock in io_apic.c
Fix a potential deadlock scenario introduced by io_apic.c's new vector_lock
on i386 and x86_64.

Found by the locking correctness validator. The patch was boot-tested on
x86. For details of the deadlock scenario, see the validator output:

  ======================================================
  [ BUG: hard-safe -> hard-unsafe lock order detected! ]
  ------------------------------------------------------
  idle/1 [HC0[0]:SC0[0]:HE0:SE1] is trying to acquire:
   (msi_lock){....}, at: [<c04ff8d2>] startup_msi_irq_wo_maskbit+0x10/0x35

  and this task is already holding:
   (&irq_desc[i].lock){++..}, at: [<c015b924>] probe_irq_on+0x36/0x107
  which would create a new lock dependency:
   (&irq_desc[i].lock){++..} -> (msi_lock){....}

  but this new dependency connects a hard-irq-safe lock:
   (&irq_desc[i].lock){++..}
  ... which became hard-irq-safe at:
    [<c01468c4>] lockdep_acquire+0x68/0x84
    [<c10485e9>] _spin_lock+0x21/0x2f
    [<c015aff5>] __do_IRQ+0x3d/0x113
    [<c01062d3>] do_IRQ+0x8c/0xad

  to a hard-irq-unsafe lock:
   (vector_lock){--..}
  ... which became hard-irq-unsafe at:
  ...  [<c01468c4>] lockdep_acquire+0x68/0x84
    [<c10485e9>] _spin_lock+0x21/0x2f
    [<c011b5e8>] assign_irq_vector+0x34/0xc8
    [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
    [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
    [<c010033f>] init+0x32/0x2cb
    [<c0102005>] kernel_thread_helper+0x5/0xb

  which could potentially lead to deadlocks!

  other info that might help us debug this:

  3 locks held by idle/1:
   #0:  (port_mutex){--..}, at: [<c067070d>] uart_add_one_port+0x61/0x289
   #1:  (&state->mutex){--..}, at: [<c067071f>] uart_add_one_port+0x73/0x289
   #2:  (&irq_desc[i].lock){++..}, at: [<c015b924>] probe_irq_on+0x36/0x107

  the hard-irq-safe lock's dependencies:
  -> (&irq_desc[i].lock){++..} ops: 9861 {
     initial-use  at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                          [<c015b415>] setup_irq+0x9b/0x14d
                          [<c1aaa4c4>] time_init_hook+0xf/0x11
                          [<c1a9f320>] time_init+0x44/0x46
                          [<c1a9955f>] start_kernel+0x191/0x38f
                          [<c0100210>] 0xc0100210
     in-hardirq-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c015aff5>] __do_IRQ+0x3d/0x113
                          [<c01062d3>] do_IRQ+0x8c/0xad
     in-softirq-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c015aff5>] __do_IRQ+0x3d/0x113
                          [<c01062d3>] do_IRQ+0x8c/0xad
   }
   ... key      at: [<c1ea31e0>] irq_desc_lock_type+0x0/0x20
    -> (i8259A_lock){++..} ops: 5149 {
       initial-use  at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c0108090>] init_8259A+0x11/0x8f
                        [<c1aa0d22>] init_ISA_irqs+0x12/0x4d
                        [<c1aaa4f0>] pre_intr_init_hook+0x8/0xa
                        [<c1aa0cb9>] init_IRQ+0xe/0x65
                        [<c1a99546>] start_kernel+0x178/0x38f
                        [<c0100210>] 0xc0100210
       in-hardirq-W at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                        [<c015b007>] __do_IRQ+0x4f/0x113
                        [<c01062d3>] do_IRQ+0x8c/0xad
       in-softirq-W at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                        [<c015b007>] __do_IRQ+0x4f/0x113
                        [<c01062d3>] do_IRQ+0x8c/0xad
     }
     ... key      at: [<c142f174>] i8259A_lock+0x14/0x40
   ... acquired at:
     [<c01468c4>] lockdep_acquire+0x68/0x84
     [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
     [<c0107eb2>] enable_8259A_irq+0x10/0x47
     [<c0107f12>] startup_8259A_irq+0x8/0xc
     [<c015b45e>] setup_irq+0xe4/0x14d
     [<c1aaa4c4>] time_init_hook+0xf/0x11
     [<c1a9f320>] time_init+0x44/0x46
     [<c1a9955f>] start_kernel+0x191/0x38f
     [<c0100210>] 0xc0100210

    -> (ioapic_lock){+...} ops: 122 {
       initial-use  at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c1aa71db>] io_apic_get_version+0x16/0x55
                        [<c1aa5c73>] mp_register_ioapic+0xc6/0x127
                        [<c1aa382e>] acpi_parse_ioapic+0x2d/0x39
                        [<c1abe031>] acpi_table_parse_madt_family+0xb4/0x100
                        [<c1abe093>] acpi_table_parse_madt+0x16/0x18
                        [<c1aa3c8a>] acpi_boot_init+0x132/0x251
                        [<c1aa08ea>] setup_arch+0xd36/0xe37
                        [<c1a99434>] start_kernel+0x66/0x38f
                        [<c0100210>] 0xc0100210
       in-hardirq-W at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c011bce1>] mask_IO_APIC_irq+0x11/0x31
                        [<c011c5cc>] ack_edge_ioapic_vector+0x31/0x41
                        [<c015b007>] __do_IRQ+0x4f/0x113
                        [<c01062d3>] do_IRQ+0x8c/0xad
     }
     ... key      at: [<c1432514>] ioapic_lock+0x14/0x3c
      -> (i8259A_lock){++..} ops: 5149 {
         initial-use  at:
                         [<c01468c4>] lockdep_acquire+0x68/0x84
                         [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                         [<c0108090>] init_8259A+0x11/0x8f
                         [<c1aa0d22>] init_ISA_irqs+0x12/0x4d
                         [<c1aaa4f0>] pre_intr_init_hook+0x8/0xa
                         [<c1aa0cb9>] init_IRQ+0xe/0x65
                         [<c1a99546>] start_kernel+0x178/0x38f
                         [<c0100210>] 0xc0100210
         in-hardirq-W at:
                         [<c01468c4>] lockdep_acquire+0x68/0x84
                         [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                         [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                         [<c015b007>] __do_IRQ+0x4f/0x113
                         [<c01062d3>] do_IRQ+0x8c/0xad
         in-softirq-W at:
                         [<c01468c4>] lockdep_acquire+0x68/0x84
                         [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                         [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                         [<c015b007>] __do_IRQ+0x4f/0x113
                         [<c01062d3>] do_IRQ+0x8c/0xad
       }
       ... key      at: [<c142f174>] i8259A_lock+0x14/0x40
     ... acquired at:
     [<c01468c4>] lockdep_acquire+0x68/0x84
     [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
     [<c0107e6b>] disable_8259A_irq+0x10/0x47
     [<c011bdbd>] startup_edge_ioapic_vector+0x31/0x58
     [<c015b45e>] setup_irq+0xe4/0x14d
     [<c015b5a1>] request_irq+0xda/0xf9
     [<c1ac983a>] rtc_init+0x6a/0x1a7
     [<c0100457>] init+0x14a/0x2cb
     [<c0102005>] kernel_thread_helper+0x5/0xb

   ... acquired at:
     [<c01468c4>] lockdep_acquire+0x68/0x84
     [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
     [<c011bce1>] mask_IO_APIC_irq+0x11/0x31
     [<c011c5cc>] ack_edge_ioapic_vector+0x31/0x41
     [<c015b007>] __do_IRQ+0x4f/0x113
     [<c01062d3>] do_IRQ+0x8c/0xad

  the hard-irq-unsafe lock's dependencies:
  -> (vector_lock){--..} ops: 31 {
     initial-use  at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c011b5e8>] assign_irq_vector+0x34/0xc8
                          [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
                          [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
                          [<c010033f>] init+0x32/0x2cb
                          [<c0102005>] kernel_thread_helper+0x5/0xb
     softirq-on-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c011b5e8>] assign_irq_vector+0x34/0xc8
                          [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
                          [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
                          [<c010033f>] init+0x32/0x2cb
                          [<c0102005>] kernel_thread_helper+0x5/0xb
     hardirq-on-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c011b5e8>] assign_irq_vector+0x34/0xc8
                          [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
                          [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
                          [<c010033f>] init+0x32/0x2cb
                          [<c0102005>] kernel_thread_helper+0x5/0xb
   }
   ... key      at: [<c1432574>] vector_lock+0x14/0x3c

  stack backtrace:
   [<c0104f36>] show_trace+0xd/0xf
   [<c010543e>] dump_stack+0x17/0x19
   [<c0144e34>] check_usage+0x1f6/0x203
   [<c0146395>] __lockdep_acquire+0x8c2/0xaa5
   [<c01468c4>] lockdep_acquire+0x68/0x84
   [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
   [<c04ff8d2>] startup_msi_irq_wo_maskbit+0x10/0x35
   [<c015b932>] probe_irq_on+0x44/0x107
   [<c0673d58>] serial8250_config_port+0x84b/0x986
   [<c06707b1>] uart_add_one_port+0x105/0x289
   [<c1ace54b>] serial8250_init+0xc3/0x10a
   [<c0100457>] init+0x14a/0x2cb
   [<c0102005>] kernel_thread_helper+0x5/0xb

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-26 10:48:17 -07:00
Don Zickus 3e4ff11574 [PATCH] x86_64: nmi watchdog header cleanup
Misc header cleanup for nmi watchdog.

Signed-off-by: Don Zickus <dzickus@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-26 10:48:16 -07:00
Jan Beulich 6ebcc00e95 [PATCH] i386/x86-64: simplify ioapic_register_intr()
Simplify (remove duplication of) code in ioapic_register_intr().

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-26 10:48:15 -07:00
Jan Beulich 0a1ad60d7a [PATCH] x86_64: serialize assign_irq_vector() use of static variables
Since assign_irq_vector() can be called at runtime, its access of static
variables should be protected by a lock.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-26 10:48:15 -07:00
Andy Currid a2ef3a50f1 [PATCH] Fix HPET operation on 64-bit NVIDIA platforms
From: "Andy Currid" <ACurrid@nvidia.com>

This patch fixes a kernel panic during boot that occurs on NVIDIA platforms
that have HPET enabled.

When HPET is enabled, the standard timer IRQ is routed to IOAPIC pin 2 and is
advertised as such in the ACPI APIC table - but an earlier workaround in the
kernel was ignoring this override.  The fix is to honor timer IRQ overrides
from ACPI when HPET is detected on an NVIDIA platform.

Signed-off-by: Andy Currid <acurrid@nvidia.com>
Cc: "Brown, Len" <len.brown@intel.com>
Cc: "Yu, Luming" <luming.yu@intel.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-08 15:12:21 -07:00
Kimball Murray e0c1e9bf81 [PATCH] x86_64: avoid IRQ0 ioapic pin collision
The patch addresses a problem with ACPI SCI interrupt entry, which gets
re-used, and the IRQ is assigned to another unrelated device.  The patch
corrects the code such that SCI IRQ is skipped and duplicate entry is
avoided.  Second issue came up with VIA chipset, the problem was caused by
original patch assigning IRQs starting 16 and up.  The VIA chipset uses
4-bit IRQ register for internal interrupt routing, and therefore cannot
handle IRQ numbers assigned to its devices.  The patch corrects this
problem by allowing PCI IRQs below 16.

Cc: len.brown@intel.com

Signed-off by: Natalie Protasevich <Natalie.Protasevich@unisys.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-05-08 09:34:56 -07:00
Chuck Ebbert 5b922cd429 [PATCH] x86_64: fix orphaned bits of timer init messages
When x86_64 timer init messages were changed to use apic verbosity
levels, two messages were missed and one got the wrong level.  This
causes the last word of a suppressed message to print on a line by
itself.  Fix that so either the entire message prints or none of it
does.

Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25 09:10:56 -08:00
Andi Kleen 9b2a13b963 [PATCH] x86_64: Always use IO-APIC routing for timer.
I tested it on a couple of chipsets and it worked everywhere so it
should be ok as default for now.

So far I haven't done the great purge of the useless old check_timer
code yet though.

Can be overwritten with enable_8254_timer in the worst case

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25 09:10:55 -08:00
Dave Jones e6fc99c6ab [PATCH] x86_64: s/Overwrite/Override/ in arch/x86-64
s/Overwrite/Override/

Signed-off-by: Dave Jones <davej@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-25 09:10:54 -08:00
Andi Kleen ab9b32ee62 [PATCH] x86_64: Better ATI timer fix
The previous experiment for using apicmaintimer on ATI systems didn't
work out very well.  In particular laptops with C2/C3 support often
don't let it tick during idle, which makes it useless.  There were also
some other bugs that made the apicmaintimer often not used at all.

I tried some other experiments - running timer over RTC and some other
things but they didn't really work well neither.

I rechecked the specs now and it turns out this simple change is
actually enough to avoid the double ticks on the ATI systems.  We just
turn off IRQ 0 in the 8254 and only route it directly using the IO-APIC.

I tested it on a few ATI systems and it worked there.  In fact it worked
on all chipsets (NVidia, Intel, AMD, ATI) I tried it on.

According to the ACPI spec routing should always work through the
IO-APIC so I think it's the correct thing to do anyways (and most of the
old gunk in check_timer should be thrown away for x86-64).

But for 2.6.16 it's best to do a fairly minimal change:
 - Use the known to be working everywhere-but-ATI IRQ0 both over 8254
   and IO-APIC setup everywhere
 - Except on ATI disable IRQ0 in the 8254
 - Remove the code to select apicmaintimer on ATI chipsets
 - Add some boot options to allow to override this (just paranoia)

In 2.6.17 I hope to switch the default over to this for everybody.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-26 09:53:31 -08:00
Chris McDermott 1f99215392 [PATCH] x86_64: Fix NMI watchdog on x460
[description from AK]

Old check for the IO-APIC watchdog during the timer check was wrong -
it obviously should only drop into this if the IO-APIC watchdog is used.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-26 09:53:30 -08:00
Andi Kleen ab68805955 [PATCH] x86_64: Don't enable ATI apicmaintimer workaround when the machine has C2 or C3
Many laptops have problems with ticking the local APIC timer in C2/C3.
The code added earlier to use it by default on ATI didn't really work
for them. Don't enable it when the system supports C2/C3.

This doesn't fix the problem fully, but at least it's not worse than before.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-17 08:00:40 -08:00
Andi Kleen 6f3814cd2f [PATCH] x86_64: Automatically enable apicmaintimer on ATI boards
They all have problems with IRQ 0 routing, so just use the APIC on them.

Can be overwritten with "noapicmaintimer"

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-04 16:43:13 -08:00
Len Brown 9fdb62af92 [ACPI] merge 3549 4320 4485 4588 4980 5483 5651 acpica asus fops pnpacpi branches into release
Signed-off-by: Len Brown <len.brown@intel.com>
2006-01-24 17:52:48 -05:00
Andi Kleen 11a8e778c4 [PATCH] x86_64: Some housekeeping in local APIC code
Remove support for obsolete hardware and cleanup.

- Remove checks for non integrated APICs
- Replace apic_write_around with apic_write.
- Remove apic_read_around
- Remove APIC version reads used by old workarounds
- Remove old workaround for Simics
- Fix indentation

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-11 19:05:03 -08:00
Vivek Goyal af5b980424 [PATCH] x86_64: ioapic virtual wire mode fix
o Currently, during kexec reboot, IOAPIC is re-programmed back to virtual
  wire mode if there was an i8259 connected to it. This enables getting
  timer interrupts in second kernel in legacy mode.

o After putting into virtual wire mode, IOAPIC delivers the i8259 interrupts
  to CPU0. This works well for kexec but not for kdump as we might crash
  on a different CPU and second kernel will not see timer interrupts.

o This patch modifies the redirection table entry to deliver the timer
  interrupts to the cpu we are rebooting (instead of hardcoding to zero).
  This ensures that second kernel receives timer interrupts even on a
  non-boot cpu.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-11 19:05:01 -08:00
Eric W. Biederman 1008fddcae [PATCH] x86_64: Memorize location of i8259 for reboots.
Currently we attempt to restore virtual wire mode on reboot, which only
works if we can figure out where the i8259 is connected.  This is very
useful when we are kexec another kernel and likely helpful to an peculiar
BIOS that make assumptions about how the system is setup.

Since the acpi MADT table does not provide the location where the i8259 is
connected we have to look at the hardware to figure it out.

Most systems have the i8259 connected the local apic of the cpu so won't be
affected but people running Opteron and some serverworks chipsets should be
able to use kexec now.

In addition this patch removes the hard coded assumption that the io_apic
that delivers isa interrups is always known to the kernel as io_apic 0.
There does not appear to be anything to guarantee that assumption is true.

And From: Vivek Goyal <vgoyal@in.ibm.com>

  A minor fix to the patch which remembers the location of where i8259 is
  connected.  Now counter i has been replaced by apic.  counter i is having
  some junk value which was leading to non-detection of i8259 connected to
  IOAPIC.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-11 19:05:00 -08:00
Andi Kleen ca8642f606 [PATCH] x86_64: Fix off by one in IOMMU check
Fix off by one when checking if the machine has enougn memory to need IOMMU
This caused the IOMMUs to be needlessly enabled for mem=4G

Based on a patch from Jon Mason

Signed-off-by: jdmason@us.ibm.com
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-11 19:04:54 -08:00
Andi Kleen 7c0ac555b0 [PATCH] x86_64: Dont't disable early PCI scan with apic
It might be still needed for non APIC related issues.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-11 19:01:12 -08:00
Bob Moore 50eca3eb89 [ACPI] ACPICA 20050930
Completed a major overhaul of the Resource Manager code -
specifically, optimizations in the area of the AML/internal
resource conversion code. The code has been optimized to
simplify and eliminate duplicated code, CPU stack use has
been decreased by optimizing function parameters and local
variables, and naming conventions across the manager have
been standardized for clarity and ease of maintenance (this
includes function, parameter, variable, and struct/typedef
names.)

All Resource Manager dispatch and information tables have
been moved to a single location for clarity and ease of
maintenance. One new file was created, named "rsinfo.c".

The ACPI return macros (return_ACPI_STATUS, etc.) have
been modified to guarantee that the argument is
not evaluated twice, making them less prone to macro
side-effects. However, since there exists the possibility
of additional stack use if a particular compiler cannot
optimize them (such as in the debug generation case),
the original macros are optionally available.  Note that
some invocations of the return_VALUE macro may now cause
size mismatch warnings; the return_UINT8 and return_UINT32
macros are provided to eliminate these. (From Randy Dunlap)

Implemented a new mechanism to enable debug tracing for
individual control methods. A new external interface,
acpi_debug_trace(), is provided to enable this mechanism. The
intent is to allow the host OS to easily enable and disable
tracing for problematic control methods. This interface
can be easily exposed to a user or debugger interface if
desired. See the file psxface.c for details.

acpi_ut_callocate() will now return a valid pointer if a
length of zero is specified - a length of one is used
and a warning is issued. This matches the behavior of
acpi_ut_allocate().

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2005-12-10 00:20:25 -05:00
James Cleverdon 6004e1b7ef [PATCH] i386/x86-64: Share interrupt vectors when there is a large number of interrupt sources
Here's a patch that builds on Natalie Protasevich's IRQ compression
patch and tries to work for MPS boots as well as ACPI.  It is meant for
a 4-node IBM x460 NUMA box, which was dying because it had interrupt
pins with GSI numbers > NR_IRQS and thus overflowed irq_desc.

The problem is that this system has 270 GSIs (which are 1:1 mapped with
I/O APIC RTEs) and an 8-node box would have 540.  This is much bigger
than NR_IRQS (224 for both i386 and x86_64).  Also, there aren't enough
vectors to go around.  There are about 190 usable vectors, not counting
the reserved ones and the unused vectors at 0x20 to 0x2F.  So, my patch
attempts to compress the GSI range and share vectors by sharing IRQs.

Cc: "Protasevich, Natalie" <Natalie.Protasevich@unisys.com>

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-14 19:55:13 -08:00
Linus Torvalds 1619cca292 Partially revert "Fix time going twice as fast problem on ATI Xpress chipsets"
Commit 66759a01ad introduced the fix for
time ticking too fast on some boards by disabling one of the doubly
connected timer pins on ATI boards.

However, it ends up being _much_ too broad a brush, and that just makes
some other ATI boards not work at all since they now have no timer
source.

So disable the automatic ATI southbridge detection, and just rely on
people who see this problem disabling it by hand with the option
"disable_timer_pin_1" on the kernel command line.

Maybe somebody can figure out the proper tests at a later date.

Acked-by: Peter Osterlund <petero2@telia.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-14 15:56:27 -07:00
Chuck Ebbert 66759a01ad [PATCH] x86-64: i386/x86-64: Fix time going twice as fast problem on ATI Xpress chipsets
Original patch from Bertro Simul

This is probably still not quite correct, but seems to be
the best solution so far.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12 10:50:58 -07:00
Al Viro 9cdd304b20 [PATCH] x86-64: more gratitious linux/irq.h includes
... and with that all instances in arch/x86_64 are gone.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12 10:50:58 -07:00
Andi Kleen 5a40b7c2ab [PATCH] x86-64: Remove code for outdated APICs
No x86-64 chipset has these APICs.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12 10:49:55 -07:00
Karsten Wiese 0b968d2361 [PATCH] Fix misspelled i8259 typo in io_apic.c
The legacy PIC's name is "i8259".

Signed-off-by: Karsten Wiese <annabellesgarden@yahoo.de>
Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-09 10:37:10 -07:00
Len Brown 64e47488c9 Merge linux-2.6 with linux-acpi-2.6 2005-09-08 01:45:47 -04:00
Ravikiran G Thirumalai 6c231b7bab [PATCH] Additions to .data.read_mostly section
Mark variables which are usually accessed for reads with __readmostly.

Signed-off-by: Alok N Kataria <alokk@calsoftinc.com>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 16:57:33 -07:00
Ashok Raj 54d5d42404 [PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.

CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.

- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
  lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
  handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
  it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
  when using generic irq framework.

Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.

MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch.  Will test in a couple days.

Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 16:57:15 -07:00
Len Brown 888ba6c62b [ACPI] delete CONFIG_ACPI_BOOT
it has been a synonym for CONFIG_ACPI since 2.6.12

Signed-off-by: Len Brown <len.brown@intel.com>
2005-08-24 12:08:54 -04:00
Ingo Molnar 306e440daf [PATCH] x86: i8253/i8259A lock cleanup
Introduce proper declarations for i8253_lock and i8259A_lock.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-30 08:45:10 -07:00
Eric W. Biederman 208fb93162 [PATCH] kexec: x86_64: restore apic virtual wire mode on shutdown
When coming out of apic mode attempt to set the appropriate
apic back into virtual wire mode.  This improves on previous versions
of this patch by by never setting bot the local apic and the ioapic
into veritual wire mode.

This code looks at data from the mptable to see if an ioapic has
an ExtInt input to make this decision.  A future improvement
is to figure out which apic or ioapic was in virtual wire mode
at boot time and to remember it.  That is potentially a more accurate
method, of selecting which apic to place in virutal wire mode.

Signed-off-by: Eric Biederman <ebiederm@xmission.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-25 16:24:47 -07:00
Andi Kleen 8d91640606 [PATCH] x86_64: More fixes for compilation without CONFIG_ACPI
Suggested by Alexander Nyberg

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-05-31 14:54:17 -07:00
Andi Kleen 14d98cad82 [PATCH] x86_64: Add option to disable timer check
This works around the too fast timer seen on some ATI boards.

I don't feel confident enough about it yet to enable it by default, but give
users the option.

Patch and debugging from Christopher Allen Wing <wingc@engin.umich.edu>, with
minor tweaks (renamed the option and documented it)

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-05-20 15:48:21 -07:00