Commit graph

5 commits

Author SHA1 Message Date
Michal Simek
e84452dd9f microblaze: Fix TLB macros
To be able to do trace TLB operations.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01 08:38:24 +02:00
Michal Simek
7775379057 microblaze: Add support from PREEMPT
This patch add core PREEMPT support for Microblaze.
I tried to trace it via tracers and I was able to see any output.

I also added low level debug functions to see if that code is called.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-03-11 14:07:32 +01:00
Russell King
4b3073e1c5 MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
On VIVT ARM, when we have multiple shared mappings of the same file
in the same MM, we need to ensure that we have coherency across all
copies.  We do this via make_coherent() by making the pages
uncacheable.

This used to work fine, until we allowed highmem with highpte - we
now have a page table which is mapped as required, and is not available
for modification via update_mmu_cache().

Ralf Beache suggested getting rid of the PTE value passed to
update_mmu_cache():

  On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables
  to construct a pointer to the pte again.  Passing a pte_t * is much
  more elegant.  Maybe we might even replace the pte argument with the
  pte_t?

Ben Herrenschmidt would also like the pte pointer for PowerPC:

  Passing the ptep in there is exactly what I want.  I want that
  -instead- of the PTE value, because I have issue on some ppc cases,
  for I$/D$ coherency, where set_pte_at() may decide to mask out the
  _PAGE_EXEC.

So, pass in the mapped page table pointer into update_mmu_cache(), and
remove the PTE value, updating all implementations and call sites to
suit.

Includes a fix from Stephen Rothwell:

  sparc: fix fallout from update_mmu_cache API change

  Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>

Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-20 16:41:46 +00:00
Michal Simek
45be7d46a9 microblaze_mmu_v2: Update tlb.h and tlbflush.h
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-05-26 16:45:19 +02:00
Michal Simek
a95d0e1602 microblaze_v8: memory inicialization, MMU, TLB
Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: John Linn <john.linn@xilinx.com>
Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27 14:25:29 +01:00