The check used to determine if uncached accelerated should be used or not
is wrong. The parenthesis are misplaced and making the test fail.
Signed-off-by: Arnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1161/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
"MIPS: Calculate proper ebase value for 64-bit kernels"
9af43ea080dd5d6c7b34f38261780e5dd43537bc (lmo) rsp.
f6be75d03c (kernel.org) broke some 64-bit
MIPS systems.
Before this we were using XKPHYS/cached as ebase and computed the uncached
xphsys/unchached address for that area. After that commit ebase became a
32-bit compat address and convert does not work anymore. We now should use
CKSEG1 for this. CKSEG1ADDR does just that in 32-bit and 64-bit.
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
To: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1149/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
For some combinations of PAGE_SIZE and vmbits, it is possible to have
userspace access that are beyond what is covered by the PGD, but within
vmbits. Such an access would cause the TLB refill handler to load garbage
values for PMD and PTE potentially giving userspace access to parts of the
physical address space to which it is not entitled.
In the TLB refill hot path, we add a single dsrl instruction so we can
check if any bits outside of the range covered by the PGD are set. In
the vmalloc side we then separate the bad case from the normal vmalloc
case and call tlb_do_page_fault_0 if warranted. This slows us down a
bit, but has the benefit of yielding deterministic behavior.
[Ralf: Fixed build error for 32-bit kernels.]
[Ralf: Folded lmo commit c8c0e22b2aa3982852b44279638ef37f9aa31b7d into this
commit.]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1152/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
This makes the code somewhat cleaner while reducing the risk of shift
amount overflows when various page table related options are changed.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1154/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This allows us to clean up the code by not having to explicitly code
checks for shift amounts greater than 32.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1153/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The MIPS implementation of die() forgets to call notify_die() and thus notifiers
registered via register_die_notifier() are not called. This results in kgdb not
being activated on exceptions.
The only subtlety is that notify_die declares its regs argument w/o const, so
the const had to be removed from mips die() as well.
[Ralf: Fixed build error for SGI IP22 and IP28 platforms.]
Signed-off-by: Yury Polyanskiy <ypolyans@princeton.edu>
Cc: linux-mips@linux-mips.org
Patchworks: http://patchwork.linux-mips.org/patch/1142/
Acked-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
According to include/asm/sibyte/swarm.h both systems provide a
platform device for the ide controler. Until now the IDE subsystem was
used which is deprecated by now. The same structure can be used with the
PATA driver.
Signed-off-by: Sebastian Andrzej Siewior <sebatian@breakpoint.cc>
Cc: tbm@cyrius.com
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1127/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Same issues as SD card detection: One of both is always triggering and the
handlers take care to shut it up and enable the other. To avoid messages
about "unbalanced interrupt enable/disable" they must not be automatically
enabled when initally requested.
This was not an issue with the db1200_defconfig due to fortunate timings;
on a build without network chip support the warnings appear.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1133/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| arch/mips/pci/pci-sb1250.c: In function sb1250_pcibios_init:
| arch/mips/pci/pci-sb1250.c:257: warning: assignment makes integer from pointer without a cast
| arch/mips/pci/pci-sb1250.c:285: error: MAX_NR_CONSOLES undeclared (first use in this function)
| arch/mips/pci/pci-sb1250.c:285: error: (Each undeclared identifier is reported only once
| arch/mips/pci/pci-sb1250.c:285: error: for each function it appears in.)
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1136/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|arch/mips/sibyte/swarm/setup.c:153:
| warning: large integer implicitly truncated to unsigned type
The field was changed in d9b26352 aka ("x86, setup: Store the boot
cursor state"). This patch changes the values back they way they were
before this extra field got introduced.
While here, the other two boards are also converted to C99 initializer.
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1137/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
In the 64-bit kernel we use swapper_pg_dir for three different things.
1) xuseg mappings for kernel threads.
2) vmap mappings for all kernel-space accesses in xkseg.
3) vmap mappings for kernel modules in ksseg (kseg2).
Due to how the TLB refill handlers work, any mapping established in
xkseg or ksseg will also establish a xuseg mapping that should never
be used by the kernel.
In order to be able to use exceptions to trap NULL pointer
dereferences, we need to ensure that nothing is mapped at address
zero. Since vmap mappings in xkseg are reflected in xuseg, this means
we need to ensure that there are no vmap mappings established at the
start of xkseg. So we move back VMALLOC_START to avoid establishing
vmap mappings at the start of xkseg.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1129/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
commit 5a0e3ad6af
Author: Tejun Heo <tj@kernel.org>
Date: Wed Mar 24 17:04:11 2010 +0900
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
Since a while the few headers included don't drag in <linux/kernel.h>
anymore, thus no more prototype of printk() resulting in:
CC arch/mips/nxp/pnx8550/common/reset.o
/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c: In function 'pnx8550_machine_restart':
/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:31: error: implicit declaration of function 'printk'
/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:33: error: 'NULL' undeclared (first use in this function)
/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:33: error: (Each undeclared identifier is reported only once
/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:33: error: for each function it appears in.)
make[3]: *** [arch/mips/nxp/pnx8550/common/reset.o] Error 1
Fixed by including <linux/kernel.h>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
doing it within the driver does not look good.
And surely isn't how platform devices were meat to be used.
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Signed-off-by: David S. Miller <davem@davemloft.net>
The ebase is relative to CKSEG0 not CAC_BASE. On a 32-bit kernel they
are the same thing, for a 64-bit kernel they are not.
It happens to kind of work on a 64-bit kernel as they both reference
the same physical memory. However since the CPU uses the CKSEG0 base,
determining if a J instruction will reach always gives the wrong result
unless we use the same number the CPU uses.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1093/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
While playing with the out-of-tree MAE driver module, the system would
panic after a while in the db1200 custom wait code after wakeup due to
a clobbered k0 register being used as target address of a store op.
Remove the custom wait implementation and revert back to the Alchemy-
recommended implementation already set as default.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1092/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Commit b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (lmo) rsp.
351336929c (kernel.org) break non-GPL modules
that use __vmalloc() or any of the vmap(), vm_map_ram(), etc functions on
MIPS.
All those functions are EXPORT_SYMBOL() so are meant to be allowed to be
used by non-GPL kernel modules. These calls all take page protection as
an argument which is normally a constant like PAGE_KERNEL.
This commit causes all protection constants like PAGE_KERNEL to not be
constants and instead to contain the GPL-only symbol _page_cachable_default.
This means that all calls to __vmalloc(), vmap(), etc, cause non-GPL
modules to fail to link with the complaint that they are trying to use the
GPL-only symbol _page_cachable_default...
Change EXPORT_SYMBOL_GPL(_page_cachable_default) to EXPORT_SYMBOL() for
non-GPL modules that call __vmalloc(), vmap(), vm_map_ram() etc.
Signed-off-by: Anton Altaparmakov <aia21@cantab.net>
Cc: Chris Dearman <chris@mips.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1084/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Since 2083e8327aeeaf818b0e4522a9d2539835c60423, the SPROM is now registered
in the board_prom_init callback, but it references variables and functions
which are declared below. Move the variables and functions above
board_prom_init.
Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1077/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Previously it was unconditionally used on all Sibyte family SOCs. The
M3 bug has to be handled in the TLB exception handler which is extremly
performance sensitive, so this modification is expected to deliver around
2-3% performance improvment. This is important as required changes to the
M3 workaround will make it more costly.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
To avoid a glitch during GPIO initialisation read GPIO output register
values left by the firmware.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/903/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Fix typo: CONFIG_BCMCPU_IS_63xx does not exist;
CONFIG_BCM63XX_CPU_63xx is the valid config option.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/901/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The BCm63xx SOC has two uarts. Some boards use the second one for
bluetooth. This patch changes platform device registration code to
handle this. Changes to the UART driver were already merged in
6a2c7eabfd.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/900/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
bcm63xx_gpio_init is already called from prom_init to allow board to use
them early, so we can remove the unneeded arch_initcall.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This is a follow on to the vdso patch.
Since all processes now have signal trampolines permanently mapped, we
can use those instead of putting the trampoline on the stack and
invalidating the corresponding icache across all CPUs. We also get rid
of a bunch of ICACHE_REFILLS_WORKAROUND_WAR code.
[Ralf: GDB 7.1 which has the necessary modifications to allow backtracing
over signal frames will supposedly be released tomorrow. The old signal
frame format obsoleted by this patch exists in two variations, for sane
processors and for those requiring ICACHE_REFILLS_WORKAROUND_WAR. So
there was never a GDB which did support backtracing over signal frames
on all MIPS systems. This convinved me this series should be applied and
pushed upstream as soon as possible.]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/974/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This is a preliminary patch to add a vdso to all user processes. Still
missing are ELF headers and .eh_frame information. But it is enough to
allow us to move signal trampolines off of the stack. Note that emulation
of branch delay slots in the FPU emulator still requires the stack.
We allocate a single page (the vdso) and write all possible signal
trampolines into it. The stack is moved down by one page and the vdso is
mapped into this space.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/975/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Seems I trimmed one too many lines in
29ca2d81bd2a62fa86bc9a72ddadcf03d7daf795 (lmo) rsp
7084338eb8 (kernel.org) which led to no
functioning Ethernet on my WAG54Gv2. This patch restores the AWOL line.
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1065/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Seems in my whitespace cleanup 0f2536082d01448daeced8d9e82c3ba1751fefa3
(lmo) rsp. 8c2961da46abd85a71d20f2b169bf80618e (kernel.org) caused AR7
to no longer get as far as init. Fixed my phat fingering.
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1064/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
On Lemote 2F CS5536 MSRs are accessed through a index / data register pair.
The access sequence must be protected by a spinlock to be atomic.
Without this rebooting in fs2f_reboot() may fail.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1058/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
kernel/elfcore.c includes <linux/elf.h> which includes the <asm/elf.h>. In
<asm/elf.h>, struct pt_regs is declared inside the parameter list of the
elf_dump_regs function which causes a kernel build warning.
Fixed by adding a forward declaration of struct pt_regs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
octeon_reserve32_memory is defined In Octeon's setup.c, so remove the
redundant extern declaration of this variable.
Signed-off-by: Yang Shi <yang.shi@windriver.com>
To: f.fainelli@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1022/
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Like x86 did in arch/x86/kernel/{process_32.c,process_64.c}, also don't
trace irqsoff for idle.
If there's no useful work to be done, we don't care about the irqsoff
duration. If we trace the idle process, the max duration of irqsoff will
be the idle time and make the irqsoff tracer useless.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Patchwork: http://patchwork.linux-mips.org/patch/1044/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The config option CAVIUM_RESERVE32_USE_WIRED_TLB is not supported.
Remove the dead code controlled by it.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1028/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Caused by 38b7827fcd - no, cpu_local_* was
not unused.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Christoph Lameter <cl@linux-foundation.org>
Acked-by: David Daney <ddaney@caviumnetworks.com>
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
All the architectures properly set NEED_DMA_MAP_STATE now so we can safely
add linux/pci-dma.h to linux/pci.h and remove the linux/pci-dma.h
inclusion in arch's asm/pci.h
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Use the generic ptrace_resume code for PTRACE_SYSCALL, PTRACE_CONT and
PTRACE_KILL.
Also the TIF_SYSCALL_TRACE thread flag is now cleared on PTRACE_KILL which
it previously wasn't which is consistent with all architectures using the
modern ptrace code.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Roland McGrath <roland@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Add generic implementations of the old and really old uname system calls.
Note that sh only implements sys_olduname but not sys_oldolduname, but I'm
not going to bother with another ifdef for that special case.
m32r implemented an old uname but never wired it up, so kill it, too.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: James Morris <jmorris@namei.org>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
On an architecture that supports 32-bit compat we need to override the
reported machine in uname with the 32-bit value. Instead of doing this
separately in every architecture introduce a COMPAT_UTS_MACHINE define in
<asm/compat.h> and apply it directly in sys_newuname().
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: James Morris <jmorris@namei.org>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Add a generic implementation of the ipc demultiplexer syscall. Except for
s390 and sparc64 all implementations of the sys_ipc are nearly identical.
There are slight differences in the types of the parameters, where mips
and powerpc as the only 64-bit architectures with sys_ipc use unsigned
long for the "third" argument as it gets casted to a pointer later, while
it traditionally is an "int" like most other paramters. frv goes even
further and uses unsigned long for all parameters execept for "ptr" which
is a pointer type everywhere. The change from int to unsigned long for
"third" and back to "int" for the others on frv should be fine due to the
in-register calling conventions for syscalls (we already had a similar
issue with the generic sys_ptrace), but I'd prefer to have the arch
maintainers looks over this in details.
Except for that h8300, m68k and m68knommu lack an impplementation of the
semtimedop sub call which this patch adds, and various architectures have
gets used - at least on i386 it seems superflous as the compat code on
x86-64 and ia64 doesn't even bother to implement it.
[akpm@linux-foundation.org: add sys_ipc to sys_ni.c]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Reviewed-by: H. Peter Anvin <hpa@zytor.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: James Morris <jmorris@namei.org>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: David Howells <dhowells@redhat.com>
Acked-by: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Passing the attribute to the low level IO functions allows all kinds
of cleanups, by sharing low level IO code without requiring
an own function for every piece of data.
Also drivers can extend the attributes with own data fields
and use that in the low level function.
Similar to sysdev_attributes and normal attributes.
This is a tree-wide sweep, converting everything in one go.
No functional changes in this patch other than passing the new
argument everywhere.
Tested on x86, the non x86 parts are uncompiled.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
i8253_lock needs to be a real spinlock in preempt-rt, i.e. it can
not be converted to a sleeping lock.
Convert it to raw_spinlock and fix up all users.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Takashi Iwai <tiwai@suse.de>
Cc: Jens Axboe <jens.axboe@oracle.com>
LKML-Reference: <20100217163751.030764372@linutronix.de>
* 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, mm: Unify kernel_physical_mapping_init() API
x86, mm: Allow highmem user page tables to be disabled at boot time
x86: Do not reserve brk for DMI if it's not going to be used
x86: Convert tlbstate_lock to raw_spinlock
x86: Use the generic page_is_ram()
x86: Remove BIOS data range from e820
Move page_is_ram() declaration to mm.h
Generic page_is_ram: use __weak
resources: introduce generic page_is_ram()
Updated, leaner defconfig for the alchemy development boards.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1005/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Don't define platform info for second mac on au1100 (which only has a
single mac).
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1004/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
A few hunks somehow ended up outside their #ifdef/endif blocks,
leading to -Werror-induces build failures.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1003/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The GT-64111 PCI host bridge has no address translation mechanism, so
it can't generate legacy port accesses. This quirk fixes legacy device
port resources to contain the bus addresses actually generated by the
GT-64111.
I think this is the approach Ben Herrenschmidt suggested long ago:
http://marc.info/?l=linux-kernel&m=119733290624544&w=2
This allows us to remove the IORESOURCE_PCI_FIXED hack from
pcibios_fixup_device_resources(), which converts bus addresses to CPU
addresses. IORESOURCE_PCI_FIXED denotes resources that can't be moved;
it has nothing to do with converting bus to CPU addresses.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-mips@linux-mips.org
Tested-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/998/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus
area. Currently, addresses at the far end of the 32bit area are assumed
to belong to the PCMCIA area and fixed up to the real 36bit address before
being passed to ioremap().
A previous commit enabled 64 bit physical size for the resource datatype on
Alchemy and this allows to use the correct 36bit addresses when registering
the PCMCIA sockets.
This patch removes the 32-to-36bit address fixup and registers the Alchemy
demo board pcmcia socket with the correct 36bit physical addresses.
Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet
card.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/994/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Because the VIA SuperIO chip only decodes 24 bits of address space but port
address space currently being configured as 32MB there is the theoretical
possibility of aliases within the I/O port address range.
The complicated solution is to reserve all address range that potencially
could cause such aliases. But with the PCI spec limiting port allocations
for devices to a maximum of 256 bytes 16MB of port address space already is
way more than one would ever expect to be used so we just reduce the port
space to 16MB.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: linux-mips@linux-mips.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Patchwork: http://patchwork.linux-mips.org/patch/995/
ALIGN(x, bytes) expands to __ALIGN_MASK(x, bytes - 1), so use the one
that is most clear.
Signed-off-by: Matt Turner <mattst88@gmail.com>
To: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/999/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This is just a test program for raw_spinlocks. The main reason I
wrote it is to validate my spinlock changes that I sent in a previous
patch.
To use it enable CONFIG_DEBUG_FS and CONFIG_SPINLOCK_TEST then at run
time do:
# mount -t debugfs none /sys/kernel/debug/
# cat /sys/kernel/debug/mips/spin_single
# cat /sys/kernel/debug/mips/spin_multi
On my 600MHz octeon cn5860 (16 CPUs) I get
spin_single spin_multi
base 106885 247941
spinlock_patch 75194 219465
This shows that for uncontended locks the spinlock patch gives 41%
improvement and for contended locks 12% improvement (1/time).
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/969/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The current locking mechanism uses a ll/sc sequence to release a
spinlock. This is slower than a wmb() followed by a store to unlock.
The branching forward to .subsection 2 on sc failure slows down the
contended case. So we get rid of that part too.
Since we are now working on naturally aligned u16 values, we can get
rid of a masking operation as the LHU already does the right thing.
The ANDI are reversed for better scheduling on multi-issue CPUs
On a 12 CPU 750MHz Octeon cn5750 this patch improves ipv4 UDP packet
forwarding rates from 3.58*10^6 PPS to 3.99*10^6 PPS, or about 11%.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/937/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Save/restore CPLD registers when doing suspend-to-ram; this fixes issues
with harddisk and ethernet not working correctly when resuming on DB1200.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Change to different macros for assembler macros since the old names in
powertv_setup.c were co-opted for use in asm/asm.h. This broken the
build for the powertv platform. This patch introduces new macros based on
the new macros in asm.h to take the place of the old macro values.
Signed-off-by: David VomLehn <dvomlehn@cisco.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/985/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The sole user is au1xxx_calc_clock() which is only used in early bootup
where the is no paralellism thus no race condition to protect against.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
The SmartMIPS ASE specifies how Read Inhibit (RI) and eXecute Inhibit
(XI) bits in the page tables work. The upper two bits of EntryLo{0,1}
are RI and XI when the feature is enabled in the PageGrain register.
SmartMIPS only covers 32-bit systems. Cavium Octeon+ extends this to
64-bit systems by continuing to place the RI and XI bits in the top of
EntryLo even when EntryLo is 64-bits wide.
Because we need to carry the RI and XI bits in the PTE, the layout of
the PTE is changed. There is a two instruction overhead in the TLB
refill hot path to get the EntryLo bits into the proper position.
Also the TLB load exception has to probe the TLB to check if RI or XI
caused the exception.
Also of note is that the layout of the PTE bits is done at compile and
runtime rather than statically. In the 32-bit case this allows for
the same number of PFN bits as before the patch as the _PAGE_HUGE is
not supported in 32-bit kernels (we have _PAGE_NO_EXEC and
_PAGE_NO_READ instead of _PAGE_READ and _PAGE_HUGE).
The patch is tested on Cavium Octeon+, but should also work on 32-bit
systems with the Smart-MIPS ASE.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/952/
Patchwork: http://patchwork.linux-mips.org/patch/956/
Patchwork: http://patchwork.linux-mips.org/patch/962/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and
ROTR support in uasm. We also add a UASM_i_ROTR macro.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
64-bit CPUs have 64-bit c0_entrylo{0,1} registers. We should use the
64-bit dmtc0 instruction to set them. This becomes important if we
want to set the RI and XI bits present in some processors.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/954/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch adds a new DEBUG_ZBOOT option to allow the users to enable it
to debug the compressed kernel support for a new board and this optoin
should be disabled to reduce the kernel image size and speed up the
kernel booting procedure when the compressed kernel support is stable.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/918/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The function is #if 0ed out. There are no other occurrences of its
name in the tree. It is safe to remove.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/936/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
It is not always used, even if it is available.
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/933/
Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[Ralf: Fixed up the rejects and changed all the new printk(KERN_...); to
pr_xxx() as suggested by Wu.]
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/920/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
It is not always used, even if it is available.
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The userspace runtime linker uses the elf_platform to find the libraries
optimized for the current CPU archecture variant. First we need to allow it
to be set to something other than NULL. Follow-on patches will set some
values for specific CPUs.
GLIBC already does the right thing. The kernel just needs to supply good
data.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Although the hardware supports a 4/8bit SD interface and the driver
unconditionally advertises all hardware caps to the MMC core, not all
datalines may actually be wired up. This patch introduces another
field to au1xmmc platform data allowing platforms to disable certain
advanced host controller features.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: linux-mmc@vger.kernel.org
CC: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/460/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
AR7 has a larger physical offset than other MIPS based systems and therefore
needs to setup its handlers beyond the usual KSEG0 range. When running the
kernel in mapped mode this modification is also required. Remove function
comment which is now incorrect.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Eugene Konev <ejka@imfi.kspu.ru>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/889/
Patchwork: http://patchwork.linux-mips.org/patch/932/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
All call sites of set_except_vector are already annotated with __init, so
annotate that one too.
Signed-off-by: Regards, Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/888/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
I believe these changes are needed on Alchemy SoCs in order to
use iomem above 4G with the usual platform_device machinery:
- Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit.
- Increase IOMEM_RESOURCE_END so that platforms can register resources.
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
In the old source code, I have let halt and poweroff do the same action,
but in reality, they have different meanings.
As the manpage of shutdown shows:
-r Reboot after shutdown.
-H Halt action is to halt or drop into boot monitor on systems that support it.
-P Halt action is to turn off the power.
and in the real world, some machines(e.g. NAS) did not provide a power
button and the shutdown works as reset, so, we need to provide a
mechanism to let the users turn off the power safely without breaking
the system, such a mechanism is "halt", which only put the system into a
dead loop or a power-save mode and print some information to the screen
to tell the users to turn off the power safely.
$ shutdown -hH now /* loongson_halt, not turn off the power */
$ shutdown -hP now /* loongson_poweroff, work as poweroff */
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Tested-by: Liu Shiwei <liushiwei@gmail.com>
Cc: Liu Shiwei <liushiwei@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/883/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Hook up the compressed debug output for all Alchemy systems supported
by current kernel codebase.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/879/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch makes the ar7 clock code implement the Linux clk API. Drivers
using the various clocks available in the SoC are updated accordingly.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
To: linux-mips@linux-mips.org
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: netdev@vger.kernel.org
Cc: David Miller <davem@davemloft.net>
Patchwork: http://patchwork.linux-mips.org/patch/881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
To: linux-mips@linux-mips.org
To: Andrew Morton <akpm@linux-foundation.org>
To: LKML <linux-kernel@vger.kernel.org>
Patchwork: http://patchwork.linux-mips.org/patch/860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The function probe_tlb() only does anything for processors that are
not PRID_COMP_LEGACY. This is precisely the set of processors for
which decode_configs() is called to do identical tlbsize probing
calculations. Therefore probe_tlb() is completely redundant and may
be removed.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/865/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS currently lacks the readl_be and writel_be accessors
which are required by BCM63xx for OHCI and EHCI support.
Let's define them globally for MIPS. This also fixes the
compilation of the bcm63xx defconfig against USB.
Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/793/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Changes:
o Serial port related configuration
Disable EARLY_PRINTK, CONFIG_SYS_SUPPORTS_ZBOOT_UART16550
Enable the serial port support as module.
o PM related support
Enable CPUFreq as module, use the external timer(MFGPT) instead of
r4k timer.
Enable Suspend support
Enable Run Time PM support
o Enable SM7XX Video Driver
Disable the buggy 2d acceleration
o Enable CONFIG_OPROFILE as module
o Use GZIP instead of LZMA, which need less decompression time
o Enable more USB devices support
o Enable initrd support(needed by gNewsense)
o Enable more crypto support
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/830/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The compressed kernel support on loongson family machines is stable now,
so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of
SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup
the booting.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/824/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Lemote have used the PMON_VER strings to indicate the loongson-2f
machine series:
PMON_VER=LM8089 Lemote 8.9'' netbook
LM8101 Lemote 10.1'' netbook
(The above two netbooks have the same kernel support)
LM6XXX Lemote FuLoong(2F) box series
LM9XXX Lemote LynLoong PC series
Before the machtype is supported by the PMON, we can get the machine
type from the PMON_VER for these machines, this will help the users a
lot.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/821/
Patchwork: http://patchwork.linux-mips.org/patch/908/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
If an interrupt handler disables interrupts, the EOI function will
just reenable them. This will put us in an endless loop when the
upcoming Ethernet driver patches are applied.
Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This
requires that the EOI function be separate from the ENABLE function.
We also rename the ACK functions to correspond with their function.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/840/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
In order to achieve correct synchronization semantics, the Octeon port
had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code
that looks like:
sync
ll ...
.
.
.
sc ...
.
.
sync
The second SYNC was redundant, but harmless.
Octeon has a SYNCW instruction that acts as a write-memory-barrier
(due to an erratum in some parts two SYNCW are used). It is much
faster than SYNC because it imposes ordering on the writes, but
doesn't otherwise stall the execution pipeline. On Octeon, SYNC
stalls execution until all preceeding writes are committed to the
coherent memory system.
Using:
syncw;syncw
ll
.
.
.
sc
.
.
Has identical semantics to the first sequence, but is much faster.
The SYNCW orders the writes, and the SC will not complete successfully
until the write is committed to the coherent memory system. So at the
end all preceeding writes have been committed. Since Octeon does not
do speculative reads, this functions as a full barrier.
The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes
SYNCW for SYNC in write-memory-barriers.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/850/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Replace some instances of smp_llsc_mb() with a new macro
smp_mb__before_llsc(). It is used before ll/sc sequences that are
documented as needing write barrier semantics.
The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(),
so there are no changes in semantics.
Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just
barrier() in the non-SMP case.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/851/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree,
remove them.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/848/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Implement reset / poweroff in the board code instead. The peripheral reset
code is gone too since YAMON which all in-tree boards use does the same
work when it boots.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/783/
Patchwork: http://patchwork.linux-mips.org/patch/882/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
For 64-bit kernels with 64KB pages and two level page tables, there are
42 bits worth of virtual address space This is larger than the 40 bits of
virtual address space obtained with the default 4KB Page size and three
levels, so there are no draw backs for using two level tables with this
configuration.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/761/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Use the GPIO config symbol to only build Au1000 interrupt code on chips with
compatible hw.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Remove the cpu subtype cpp macros in favor of runtime detection,
to improve compile coverage of the alchemy common code.
(Increases kernel size by 700 bytes).
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/699/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch makes the board code register the au1000-eth platform device. The
au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg
function like it has to be done for the Bosporus board which uses a
different MAC/PHY setup.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: David Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Machine driver for DB1200 AC97 and I2S audio systems, intended as a proper
reference asoc machine for Alchemy-based systems. AC97/I2S can be selected
at boot time by setting switch S6.7.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: alsa-devel@alsa-project.org
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Create own directory for DB1200 code and update it with new features.
- SPI support:
- tmp121 temperature sensor
- SPI flash on DB1200
- I2C support
- NE1619 sensor
- AT24 eeprom
- I2C/SPI can be selected at boot time via switch S6.8
- Carddetect IRQs for SD cards.
- gen_nand based NAND support.
- hexleds count sleep/wake transitions.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Replace the devboard NOR MTD mapping driver with physmap-flash support.
Also honor the "swapboot" switch settings wrt. to the layout of the
NOR partitions.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
UART autodetection breaks on the Au1300 but the IP blocks are identical,
at least according to the datasheets. Help the 8250 driver by passing
on uart type information via platform data.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Warnings being suppressed, we can now turn on -Werror for boards which did
not have it already (devboards and xss1500).
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch fixes warnings due to potentially unused
variables in board setup code or mixed variables
declaration and code (forbidden by ISO C90).
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Remove unused uart bit definitions and base macros.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch replaces the general alchemy prom_putchar() implementation
in favor of board-specific versions: The UART where the output of
prom_putchar is directed to really depends on the board, the current
implementation hardcodes this on a per-SoC basis which is just wrong.
So a generic uart tx function is provided in the alchemy headers,
and the boards can provide their own prom_putchar with custom
destination uart, and all in-kernel alchemy boards support
early printk.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
DMA can only be done from physical addresses; move the "virt_to_phys"
source/destination buffer address translation from the dbdma queueing
functions (since the hardware can only DMA to/from physical addresses)
to their respective users.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Remove dbdma compat macros, move remaining users over to default
queueing functions and -flags.
(Queueing function signature has changed in order to give
a build failure instead of silent functional changes due
to the no longer implicitly specified DDMA_FLAGS_IE flag)
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
By replacing an extra do_IRQ with a goto, the assembly shrinks
from 260 to 212 bytes (gcc-4.3.4).
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Eliminate the sharing of IRQ names among the differenct Alchemy
variants. IRQ numbers need no longer be hidden behind a
CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy
code less reliant on a hardcoded subtype.
This patch also renames the GPIO irq number constants. It's really
an interrupt line, NOT a GPIO number!
Code which relied on certain irq numbers to have the same name
across all supported cpu subtypes is changed to determine current
cpu subtype at runtime; in some places this isn't possible so
a "compat" symbol is used.
Run-tested on DB1200.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Raise RTCMATCH2 interrupt priority in case it is used as the system
timer tick.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The Alchemy hardware provides a method to prioritize interrupts
on a controller by assigning them to a differenct core request line.
Assign usb device request interrupt to IC0 Request 0 (which has
highest priority in the core and the dispatcher) and others to
Request 1. The explicit check for usb device request occurrence
should be obsolete now.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Register the PCMCIA driver on all boards supported by it,
get rid of now-unused pcmcia macros in the board headers
(and subsequently empty pb1100/pb1500 ones).
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
New PCMCIA socket driver for all Db/Pb1xxx boards (except Pb1000),
which replaces au1000_db1x00.c and (most of) au1000_pb1x00.c.
Notable improvements:
- supports Db1000, DB/PB1100/1500/1550/1200.
- support for carddetect and statuschange IRQs.
- pcmcia socket mem/io/attr areas and irqs passed through
platform resource information.
- doesn't freeze system during card insertion/ejection like
the one it replaces.
- boardtype is automatically detected using BCSR ID register.
Run-tested on the DB1200.
Cc: Linux-PCMCIA <linux-pcmcia@lists.infradead.org>
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
remove board_init_irq(): On all in-kernel boards it is sufficient to
initialize board interrupts in an arch_initcall by using the default
linux irq functions.
Some small irqmap.c files have been folded into board_setup files.
Run-tested on DB1200; compile-tested on all other affected boards.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Move the PB1200 IRQ cascade code out to the BCSR support code:
upcoming DB1300 support can use it too.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
All Alchemy development boards have external CPLDs with a few registers
in them. They all share an identical register layout with only a few
minor differences (except the PB1000) in bit functions and base
addresses.
This patch
- adds a primitive facility to initialize and use these external
registers,
- replaces all occurrences of bcsr->xxx accesses with calls to the new
functions (the pb1200 cascade irq handling code is special).
- collects BCSR register information scattered throughout the board
headers in a central place.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (48 commits)
x86/PCI: Prevent mmconfig memory corruption
ACPI: Use GPE reference counting to support shared GPEs
x86/PCI: use host bridge _CRS info by default on 2008 and newer machines
PCI: augment bus resource table with a list
PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refs
PCI: read bridge windows before filling in subtractive decode resources
PCI: split up pci_read_bridge_bases()
PCIe PME: use pci_pcie_cap()
PCI PM: Run-time callbacks for PCI bus type
PCIe PME: use pci_is_pcie()
PCI / ACPI / PM: Platform support for PCI PME wake-up
ACPI / ACPICA: Multiple system notify handlers per device
ACPI / PM: Add more run-time wake-up fields
ACPI: Use GPE reference counting to support shared GPEs
PCI PM: Make it possible to force using INTx for PCIe PME signaling
PCI PM: PCIe PME root port service driver
PCI PM: Add function for checking PME status of devices
PCI: mark is_pcie obsolete
PCI: set PCI_PREF_RANGE_TYPE_64 in pci_bridge_check_ranges
PCI: pciehp: second try to get big range for pcie devices
...
Now that we return the new resource start position, there is no
need to update "struct resource" inside the align function.
Therefore, mark the struct resource as const.
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Ignoring the last page when ddr size is 128M. Cached accesses to last page
is causing the processor to prefetch using address above 128M stepping out
of the DDR address space.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/981/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/highmem.c: In function 'kmap_init':
arch/mips/mm/highmem.c:130: error: 'init_mm' undeclared (first use in this function)
arch/mips/mm/highmem.c:130: error: (Each undeclared identifier is reported only once
arch/mips/mm/highmem.c:130: error: for each function it appears in.)
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/980/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
On VIVT ARM, when we have multiple shared mappings of the same file
in the same MM, we need to ensure that we have coherency across all
copies. We do this via make_coherent() by making the pages
uncacheable.
This used to work fine, until we allowed highmem with highpte - we
now have a page table which is mapped as required, and is not available
for modification via update_mmu_cache().
Ralf Beache suggested getting rid of the PTE value passed to
update_mmu_cache():
On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables
to construct a pointer to the pte again. Passing a pte_t * is much
more elegant. Maybe we might even replace the pte argument with the
pte_t?
Ben Herrenschmidt would also like the pte pointer for PowerPC:
Passing the ptep in there is exactly what I want. I want that
-instead- of the PTE value, because I have issue on some ppc cases,
for I$/D$ coherency, where set_pte_at() may decide to mask out the
_PAGE_EXEC.
So, pass in the mapped page table pointer into update_mmu_cache(), and
remove the PTE value, updating all implementations and call sites to
suit.
Includes a fix from Stephen Rothwell:
sparc: fix fallout from update_mmu_cache API change
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
x86/mm is on 32-rc4 and missing the spinlock namespace changes which
are needed for further commits into this topic.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The patch that adds cpu_probe_vmbits is erroneously writing to reserved
bit 12. Since we are really only probing high bits, don't write this bit
with a one.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Cc: Guenter Roeck <guenter.roeck@ericsson.com>
Patchwork: http://patchwork.linux-mips.org/patch/949/
Acked-by: Guenter Roeck <guenter.roeck@ericsson.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Test the value that was just allocated rather than the previously tested one.
A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@r@
expression *x;
expression e;
identifier l;
@@
if (x == NULL || ...) {
... when forall
return ...; }
... when != goto l;
when != x = e
when != &x
*x == NULL
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
To: kernel-janitors@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/945/
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
cpu_cache_init and the things it calls should all be __cpuinit instead
of __devinit.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
RTC support was rewritten but the defconfig files were not updated. Enable
IPv6 support which for some folks already is a must have. Assign useful
values to other new options.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
As reported by Maxime Bizon, the commit "MIPS: PowerTV: Fix support for
timer interrupts with > 64 external IRQs" have broken the r4k timer
since it didn't initialize the cp0_compare_irq_shift variable used in
c0_compare_int_pending() on the architectures whose cpu_has_mips_r2 is
false.
This patch fixes it via initializing the cp0_compare_irq_shift as the
cp0_compare_irq used in the old c0_compare_int_pending().
Reported-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: David VomLehn <dvomlehn@cisco.com>
Cc: mbizon@freebox.fr
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/922/
Tested-by: Shane McDonald <mcdonald.shane@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Linux kernel 2.6.32 and later allocate address space from the top of the
kernel virtual memory address space.
This patch implements virtual memory size detection for 64 bit MIPS CPUs
to avoid resulting crashes.
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/935/
Reviewed-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
DBDMA descriptors need to be located at 32-byte aligned addresses;
however kmalloc in conjunction with the SLAB allocator and
CONFIG_DEBUG_SLUB enabled doesn't deliver any. The dbdma code works
around that by allocating a larger area and realigning the start
address within it.
When freeing a channel however this adjustment is not taken into
account which results in an oops:
Kernel bug detected[#1]:
[...]
Call Trace:
[<80186010>] cache_free_debugcheck+0x284/0x318
[<801869d8>] kfree+0xe8/0x2a0
[<8010b31c>] au1xxx_dbdma_chan_free+0x2c/0x7c
[<80388dc8>] au1x_pcm_dbdma_free+0x34/0x4c
[<80388fa8>] au1xpsc_pcm_close+0x28/0x38
[<80383cb8>] soc_codec_close+0x14c/0x1cc
[<8036dbb4>] snd_pcm_release_substream+0x60/0xac
[<8036dc40>] snd_pcm_release+0x40/0xa0
[<8018c7a8>] __fput+0x11c/0x228
[<80188f60>] filp_close+0x7c/0x98
[<80189018>] sys_close+0x9c/0xe4
[<801022a0>] stack_done+0x20/0x3c
Fix this by recording the address delivered by kmalloc() and using
it as parameter to kfree().
This fix is only necessary with the SLAB allocator and CONFIG_DEBUG_SLAB
enabled; non-debug SLAB, SLUB do return nicely aligned addresses,
debug-enabled SLUB currently panics early in the boot process.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/878/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The MIPS processor is limited to 64 external interrupt sources. Using a
greater number without IRQ sharing requires reading platform-specific
registers. On such platforms, reading the IntCtl register to determine
which interrupt corresponds to a timer interrupt will not work.
On MIPSR2 systems there is a solution - the TI bit in the Cause register,
specifically indicates that a timer interrupt has occured. This patch uses
that bit to detect interrupts for MIPSR2 processors, which may be expected
to work regardless of how the timer interrupt may be routed in the hardware.
Signed-off-by: David VomLehn (dvomlehn@cisco.com)
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Pre-compute addresses for the basic ASIC registers. This speeds up access
and allows memory for unused configurations to be freed. In addition,
uninitialized register addresses will be returned as NULL to catch bad
usage quickly.
Signed-off-by: David VomLehn <dvomlehn@cisco.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/806/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
POSIX requires $((<expression>)) arithmetic in sh only to have long
arithmetic so on 32-bit sh binaries might do only 32-bit arithmetic but
the arithmetic done in arch/mips/boot/compressed/Makefile needs 64-bit.
I play with the AR7 platform, so VMLINUX_LOAD_ADDRESS is
0xffffffff94100000, and for an example 4MiB kernel
VMLINUZ_LOAD_ADDRESS is made out to be:
----
alex@berk:~$ bash -c 'printf "%x\n" $((0xffffffff94100000 + 0x400000))'
ffffffff94500000
alex@berk:~$ dash -c 'printf "%x\n" $((0xffffffff94100000 + 0x400000))'
80000000003fffff
----
The former is obviously correct whilst the later breaks things royally.
Fortunately working with only the lower 32bit's works for both bash and
dash:
----
$ bash -c 'printf "%x\n" $((0x94100000 + 0x400000))'
94500000
$ dash -c 'printf "%x\n" $((0x94100000 + 0x400000))'
94500000
----
So, we can split the original 64bit string to two parts, and only
calculate the low 32bit part, which is big enough (1GiB kernel sizes
anyone?) for a normal Linux kernel image file, now, we calculate the
VMLINUZ_LOAD_ADDRESS like this:
1. if present, append top 32bit of VMLINUX_LOAD_ADDRESS" as a prefix
2. get the sum of the low 32bit of VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE
This patch fixes vmlinuz kernel builds on systems where only a
32bit-only math shell is available.
Patch Changelog:
Version 2
- simplified method by using 'expr' for 'substr' and making it work
with dash once again
Version 1
- Revert the removals of '-n "$(VMLINUX_SIZE)"' to avoid the error
of "make clean"
- Consider more cases of the VMLINUX_LOAD_ADDRESS
Version 0
- initial release
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Acked-by: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/861/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The necessary changes to the x86 Kconfig and boot/compressed to allow the
use of this new compression method.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Patchwork: http://patchwork.linux-mips.org/patch/857/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
It moves to the same directory as the boot files in other formats.
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/796/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
pcibus_to_node can return -1 if we cannot determine which node a pci bus
is on. If passed -1, cpumask_of_node will negatively index the lookup array
and pull in random data:
# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus
00000000,00000003,00000000,00000000
# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist
64-65
Change cpumask_of_node to check for -1 and return cpu_all_mask in this
case:
# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus
ffffffff,ffffffff,ffffffff,ffffffff
# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist
0-127
Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Andrew Morton <akpm@linux-foundation.org>
Patchwork: http://patchwork.linux-mips.org/patch/831/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
With typical mult and shift values, the calculation for Octeon's sched_clock
overflows when using 64-bit arithmetic. Use 128-bit calculations instead.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/849/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
A call to r4k_clocksource_init() was added to plat_time_init(), but
when init_mips_clock_source() calls the same function, boot fails in
clockevents_register_device(). This patch removes the extraneous call.
Signed-off-by: David VomLehn <dvomlehn@cisco.com>
Patchwork: http://patchwork.linux-mips.org/patch/803/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
With the advent of function graph tracing on MIPS, Octeon needs a high
precision sched_clock() implementation. Without it, most timing
numbers are reported as 0.000.
This new sched_clock just uses the 64-bit cycle counter appropriately
scaled.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/805/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Since commit 898d357b5262f9e26bc2418e01f8676e80d9867e (lmo) /
6acc7d485c (kernel.org) ("Fix and enhance
built-in kernel command line") arcs_cmdline[] does not contain built-in
command line. The commit introduce CONFIG_CMDLINE_BOOL and
CONFIG_CMDLINE_OVERRIDE to control built-in command line, and now we can
use them instead of platform-specific built-in command line processing.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Patchwork: http://patchwork.linux-mips.org/patch/802/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
mips_machine_halt() is same as mips_machine_restart(). Also delete the
registration of _machine_halt and pm_power_off because mips_machine_halt()
is the restart function.
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/798/
Reviewed-by: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
An unused leftover from the old KGDB implementation.
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/794/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
sizeof(dp) is just the size of the pointer. Change it to the size of the
referenced structure.
A simplified version of the semantic patch that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@@
expression *x;
expression f;
type T;
@@
*f(...,(T)x,...)
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Patchwork: http://patchwork.linux-mips.org/patch/789/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
o Remove the .initrd section. The initrd section was already handled
when vmlinux was linked.
o Discard .MIPS.options, .options, .pdr, .reginfo, .comment and .note
sections. If .MIPS.options is not removed, kernels compiled with gcc
3.4.6 will not boot.
o Clean up the file format.
o Remove several other unneeded sections.
Tested with GCC 3.4.6 and 4.4.1 with and without initrd.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/785/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Makes it consistent with the extern declaration, used when CONFIG_HIGHMEM
is set Removes redundant casts in printout messages
Signed-off-by: Andreas Fenkart <andreas.fenkart@streamunlimited.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: Lennox Wu <lennox.wu@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (71 commits)
MIPS: Lasat: Fix botched changes to sysctl code.
RTC: rtc-cmos.c: Fix warning on MIPS
MIPS: Cleanup random differences beween lmo and Linus' kernel.
MIPS: No longer hardwire CONFIG_EMBEDDED to y
MIPS: Fix and enhance built-in kernel command line
MIPS: eXcite: Remove platform.
MIPS: Loongson: Cleanups of serial port support
MIPS: Lemote 2F: Suspend CS5536 MFGPT Timer
MIPS: Excite: move iodev_remove to .devexit.text
MIPS: Lasat: Convert to proc_fops / seq_file
MIPS: Cleanup signal code initialization
MIPS: Modularize COP2 handling
MIPS: Move EARLY_PRINTK to Kconfig.debug
MIPS: Yeeloong 2F: Cleanup reset logic using the new ec_write function
MIPS: Yeeloong 2F: Add LID open event as the wakeup event
MIPS: Yeeloong 2F: Add basic EC operations
MIPS: Move several variables from .bss to .init.data
MIPS: Tracing: Make function graph tracer work with -mmcount-ra-address
MIPS: Tracing: Reserve $12(t0) for mcount-ra-address of gcc 4.5
MIPS: Tracing: Make ftrace for MIPS work without -fno-omit-frame-pointer
...
Proper Posix O_SYNC handling only made it into 2.6.33, not 2.6.32.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* 'for-33' of git://repo.or.cz/linux-kbuild: (29 commits)
net: fix for utsrelease.h moving to generated
gen_init_cpio: fixed fwrite warning
kbuild: fix make clean after mismerge
kbuild: generate modules.builtin
genksyms: properly consider EXPORT_UNUSED_SYMBOL{,_GPL}()
score: add asm/asm-offsets.h wrapper
unifdef: update to upstream revision 1.190
kbuild: specify absolute paths for cscope
kbuild: create include/generated in silentoldconfig
scripts/package: deb-pkg: use fakeroot if available
scripts/package: add KBUILD_PKG_ROOTCMD variable
scripts/package: tar-pkg: use tar --owner=root
Kbuild: clean up marker
net: add net_tstamp.h to headers_install
kbuild: move utsrelease.h to include/generated
kbuild: move autoconf.h to include/generated
drop explicit include of autoconf.h
kbuild: move compile.h to include/generated
kbuild: drop include/asm
kbuild: do not check for include/asm-$ARCH
...
Fixed non-conflicting clean merge of modpost.c as per comments from
Stephen Rothwell (modpost.c had grown an include of linux/autoconf.h
that needed to be changed to generated/autoconf.h)
There's no reason for MIPS to select EMBEDDED. In fact, EMBEDDED makes
MIPS more awkward to deal with because it makes it different to the
majority of architectures for no good reason.
[Ralf: Historically disabling EMBEDDED had hid essential options for many
MIPS platforms such as serial console and forced crap like VGA support
or power managment enabled for platforms where those don't make any sense.
The name of the option is also _very_ missleading so many users don't
select it even where is was required for a functioning kernel.]
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/663/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Currently, MIPS kernels silently overwrite kernel command-line parameters
hardcoded in CONFIG_CMDLINE by the ones received from firmware. Therefore,
using firmware remains the only reliable method to transfer the
command-line parameters, which is not always desirable or convenient, and
the CONFIG_CMDLINE option is thereby effectively rendered useless.
This patch fixes the problem described above and introduces a more flexible
scheme of handling the kernel command line, in a manner identical to what is
currently used for x86. The default behavior, i.e. when CONFIG_CMDLINE_BOOL
is not defined, retains the existing semantics, and firmware command-line
arguments override the hardcoded ones.
[Ralf: I fixed up all the defconfig files so the stay unaffected by this
change.]
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/689/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The platform has never been fully merged
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Thomas Koeller <thomas.koeller@baslerweb.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
This patchs uses a loongson_uart_base variable instead of the
uart_base[] array and adds a new kernel option to avoid to compile
uart_base.c all the time, which will save a little bit of memory for us.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.orghttp://patchwork.linux-mips.org/patch/727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Before putting the Loongson 2F into wait mode, suspend the MFGPT Timer and
after wake-up resume it. This may save some power.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/706/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The function iodev_remove is used only wrapped by __devexit_p so define
it using __devexit.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/710/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Away with the daemons of ifdef; get ready for future COP2 users.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/708/
Yeeloong 2F netbook has an KB3310B embedded controller to manage the LID
action. When the LID is closed or opened a SCI interrupt is sent out and
the corresponding event is saved to an EC register for later query.
Allow the LID open interrupt to wake the processor from wait mode if it is
in the suspend mode.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/685/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Several static uninitialized variables are used in the scope of __init
functions but are themselves not marked as __initdata. This patch is to put
those variables to where they belong and to reduce the memory footprint a
little bit.
Also, a couple of lines with spaces instead of tabs were fixed.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/698/
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
That thread "MIPS: Add option to pass return address location to
_mcount" from "David Daney <ddaney@caviumnetworks.com>" have added a new
option -mmcount-ra-address to gcc(4.5) for MIPS to transfer the location
of the return address to _mcount.
Benefit from this new feature, function graph tracer on MIPS will be
easier and safer to hijack the return address of the kernel function,
which will save some overhead and make the whole thing more reliable.
In this patch, at first, try to enable the option -mmcount-ra-address in
arch/mips/Makefile with cc-option, if gcc support it, it will be
enabled, otherwise, no side effect.
and then, we need to support this new option of gcc 4.5 and also support
the old gcc versions.
with _mcount in the old gcc versions, it's not easy to get the location
of return address(tracing: add function graph tracer support for MIPS),
so, we do it in a C function: ftrace_get_parent_addr(ftrace.c), but
with -mmcount-ra-address, only several instructions need to get what
we want, so, I put into asm(mcount.S). and also, as the $12(t0) is
used by -mmcount-ra-address for transferring the localtion of return
address to _mcount, we need to save it into the stack and restore it
when enabled dynamic function tracer, 'Cause we have called
"ftrace_call" before "ftrace_graph_caller", which may destroy
$12(t0).
(Thanks to David for providing that -mcount-ra-address and giving the
idea of KBUILD_MCOUNT_RA_ADDRESS, both of them have made the whole
thing more beautiful!)
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/681/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
A new option -mmcount-ra-address for gcc 4.5 have been sent by David
Daney <ddaney@caviumnetworks.com> in the thread "MIPS: Add option to
pass return address location to _mcount", which help to record the
location of the return address(ra) for the function graph tracer of MIPS
to hijack the return address easier and safer. that option used the
$12(t0) register by default, so, we reserve it for it, and use t1,t2,t3
instead of t0,t1,t2.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/680/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
When remove the -fno-omit-frame-pointer, gcc will not save the frame
pointer for us, we need to save one ourselves.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/679/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch make function graph tracer work with dynamic function tracer.
To share the source code of dynamic function tracer(MCOUNT_SAVE_REGS),
and avoid restoring the whole saved registers, we need to restore the ra
register from the stack.
(NOTE: This not work with 32bit! need to ensure why!)
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/678/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The implementation of function graph tracer for MIPS is a little
different from X86.
in MIPS, gcc(with -pg) only transfer the caller's return address(at) and
the _mcount's return address(ra) to us.
For the kernel part without -mlong-calls:
move at, ra
jal _mcount
For the module part with -mlong-calls:
lui v1, hi16bit_of_mcount
addiu v1, v1, low16bit_of_mcount
move at, ra
jal _mcount
Without -mlong-calls,
if the function is a leaf, it will not save the return address(ra):
ffffffff80101298 <au1k_wait>:
ffffffff80101298: 67bdfff0 daddiu sp,sp,-16
ffffffff8010129c: ffbe0008 sd s8,8(sp)
ffffffff801012a0: 03a0f02d move s8,sp
ffffffff801012a4: 03e0082d move at,ra
ffffffff801012a8: 0c042930 jal ffffffff8010a4c0 <_mcount>
ffffffff801012ac: 00020021 nop
so, we can hijack it directly in _mcount, but if the function is non-leaf, the
return address is saved in the stack.
ffffffff80133030 <copy_process>:
ffffffff80133030: 67bdff50 daddiu sp,sp,-176
ffffffff80133034: ffbe00a0 sd s8,160(sp)
ffffffff80133038: 03a0f02d move s8,sp
ffffffff8013303c: ffbf00a8 sd ra,168(sp)
ffffffff80133040: ffb70098 sd s7,152(sp)
ffffffff80133044: ffb60090 sd s6,144(sp)
ffffffff80133048: ffb50088 sd s5,136(sp)
ffffffff8013304c: ffb40080 sd s4,128(sp)
ffffffff80133050: ffb30078 sd s3,120(sp)
ffffffff80133054: ffb20070 sd s2,112(sp)
ffffffff80133058: ffb10068 sd s1,104(sp)
ffffffff8013305c: ffb00060 sd s0,96(sp)
ffffffff80133060: 03e0082d move at,ra
ffffffff80133064: 0c042930 jal ffffffff8010a4c0 <_mcount>
ffffffff80133068: 00020021 nop
but we can not get the exact stack address(which saved ra) directly in
_mcount, we need to search the content of at register in the stack space
or search the "s{d,w} ra, offset(sp)" instruction in the text. 'Cause we
can not prove there is only a match in the stack space, so, we search
the text instead.
as we can see, if the first instruction above "move at, ra" is not a
store instruction, there should be a leaf function, so we hijack the at
register directly via putting &return_to_handler into it, otherwise, we
search the "s{d,w} ra, offset(sp)" instruction to get the stack offset,
and then the stack address. we use the above copy_process() as an
example, we at last find "ffbf00a8", 0xa8 is the stack offset, we plus
it with s8(fp), that is the stack address, we hijack the content via
writing the &return_to_handler in.
If with -mlong-calls, since there are two more instructions above "move
at, ra", so, we can move the pointer to the position above "lui v1,
hi16bit_of_mcount".
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/677/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch add a new section for MIPS to record the block of the hardirq
handling for function graph tracer(print_graph_irq) via adding the
__irq_entry annotation to the the entrypoints of the hardirqs(the block
with irq_enter()...irq_exit()).
Thanks goes to Steven & Frederic Weisbecker for their feedbacks.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Reviewed-by: Frederic Weisbecker <fweisbec@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/676/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
With dynamic function tracer, by default, _mcount is defined as an
"empty" function, it returns directly without any more action . When
enabling it in user-space, it will jump to a real tracing
function(ftrace_caller), and do the real job for us.
Differ from the static function tracer, dynamic function tracer provides
two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the
tracing of some indicated kernel functions(set_ftrace_filter).
In the -v4 version, the implementation of this support is basically the same as
X86 version does: _mcount is implemented as an empty function and ftrace_caller
is implemented as a real tracing function respectively.
But in this version, to support module tracing with the help of
-mlong-calls in arch/mips/Makefile:
MODFLAGS += -mlong-calls.
The stuff becomes a little more complex. We need to cope with two
different type of calling to _mcount.
For the kernel part, the calling to _mcount(result of "objdump -hdr
vmlinux"). is like this:
108: 03e0082d move at,ra
10c: 0c000000 jal 0 <fpcsr_pending>
10c: R_MIPS_26 _mcount
10c: R_MIPS_NONE *ABS*
10c: R_MIPS_NONE *ABS*
110: 00020021 nop
For the module with -mlong-calls, it looks like this:
c: 3c030000 lui v1,0x0
c: R_MIPS_HI16 _mcount
c: R_MIPS_NONE *ABS*
c: R_MIPS_NONE *ABS*
10: 64630000 daddiu v1,v1,0
10: R_MIPS_LO16 _mcount
10: R_MIPS_NONE *ABS*
10: R_MIPS_NONE *ABS*
14: 03e0082d move at,ra
18: 0060f809 jalr v1
In the kernel version, there is only one "_mcount" string for every
kernel function, so, we just need to match this one in mcount_regex of
scripts/recordmcount.pl, but in the module version, we need to choose
one of the two to match. Herein, I choose the first one with
"R_MIPS_HI16 _mcount".
and In the kernel verion, without module tracing support, we just need
to replace "jal _mcount" by "jal ftrace_caller" to do real tracing, and
filter the tracing of some kernel functions via replacing it by a nop
instruction.
but as we have described before, the instruction "jal ftrace_caller" only left
32bit length for the address of ftrace_caller, it will fail when calling from
the module space. so, herein, we must replace something else.
the basic idea is loading the address of ftrace_caller to v1 via changing these
two instructions:
lui v1,0x0
addiu v1,v1,0
If we want to enable the tracing, we need to replace the above instructions to:
lui v1, HI_16BIT_ftrace_caller
addiu v1, v1, LOW_16BIT_ftrace_caller
If we want to stop the tracing of the indicated kernel functions, we
just need to replace the "jalr v1" to a nop instruction. but we need to
replace two instructions and encode the above two instructions
oursevles.
Is there a simpler solution? Yes! Here it is, in this version, we put _mcount
and ftrace_caller together, which means the address of _mcount and
ftrace_caller is the same:
_mcount:
ftrace_caller:
j ftrace_stub
nop
...(do real tracing here)...
ftrace_stub:
jr ra
move ra, at
By default, the kernel functions call _mcount, and then jump to ftrace_stub and
return. and when we want to do real tracing, we just need to remove that "j
ftrace_stub", and it will run through the two "nop" instructions and then do
the real tracing job.
what about filtering job? we just need to do this:
lui v1, hi_16bit_of_mcount <--> b 1f (0x10000004)
addiu v1, v1, low_16bit_of_mcount
move at, ra
jalr v1
nop
1f: (rec->ip + 12)
In linux-mips64, there will be some local symbols, whose name are
prefixed by $L, which need to be filtered. thanks goes to Steven for
writing the mips64-specific function_regex.
In a conclusion, with RISC, things becomes easier with such a "stupid"
trick, RISC is something like K.I.S.S, and also, there are lots of
"simple" tricks in the whole ftrace support, thanks goes to Steven and
the other folks for providing such a wonderful tracing framework!
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/675/
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
There is an exisiting common ftrace_test_stop_func() in
kernel/trace/ftrace.c, which is used to check the global variable
ftrace_trace_stop to determine whether stop the function tracing.
This patch implepment the MIPS specific one to speedup the procedure.
Thanks goes to Zhang Le for Cleaning it up.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/673/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to
_mcount will be inserted into each kernel function. so, there is a
possibility to trace the kernel functions in _mcount.
This patch add the MIPS specific _mcount support for static function
tracing. by default, ftrace_trace_function is initialized as
ftrace_stub(an empty function), so, the default _mcount will introduce
very little overhead. after enabling ftrace in user-space, it will jump
to a real tracing function and do static function tracing for us.
and -ffunction-sections is incompatible with -pg, so, disable it when
ftracer is enabled.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Reviewed-by: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The typename member of struct irq_chip was kept for migration purposes
and is obsolete since more than 2 years. Fix up the leftovers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
To: LKML <linux-kernel@vger.kernel.org>
Cc: Ingo Molnar <mingo@elte.hu>
Patchwork: http://patchwork.linux-mips.org/patch/661/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Loongson 2F supports CPU clock scaling. When put it into wait mode by
setting the frequency as ZERO it will stay in this mode until an external
interrupt wakes the CPU again.
To enable clock scaling support, an external timer of a known stable rate
is required.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cpufreq@vger.kernel.org,
Cc: Dave Jones <davej@redhat.com>,
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Cc: yanh@lemote.com
Cc: huhb@lemote.com,
Patchwork: http://patchwork.linux-mips.org/patch/660/
Patchwork: http://patchwork.linux-mips.org/patch/751/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch adds basic options for MIPS CPUFreq support.
Since the cp0 timer's frequency is based on the processor clockrate it can
not be used with CPUFReq; an additional external timer is required.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cpufreq@vger.kernel.org,
Cc: Dave Jones <davej@redhat.com>,
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Cc: yanh@lemote.com
Cc: huhb@lemote.com,
Patchwork: http://patchwork.linux-mips.org/patch/659/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
CPUFreq support for Loongson 2F requires an external timer.
Because the frequency of the MIPS Timer is related to the CPU frequency
which itself is variable another timer of constant frequency is required.
Export the mfgpt0 counter disable / enable operations for the coming
suspend support to suspend / resume the timer.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cpufreq@vger.kernel.org,
Cc: Dave Jones <davej@redhat.com>,
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Cc: yanh@lemote.com
Cc: huhb@lemote.com,
Patchwork: http://patchwork.linux-mips.org/patch/658/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Kernel support for this machine is almost the same as Fuloong 2F; the only
difference is that it uses the serial port provided by Loongson 2F processor
as Yeeloong 2F does.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/656/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add the Cisco Powertv cable settop box to the MIPS tree. This platform is
based on a MIPS 24Kc processor with various devices integrated on the same
ASIC. There are multiple models of this box, with differing configuration
but the same kernel runs across the product line.
Signed-off-by: David VomLehn <dvomlehn@cisco.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/132/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Lemote Loongson 2F family machines need an external interrupt to wake the
system from the suspend mode.
For YeeLoong 2F and Mengloong 2F setup the keyboard interrupt as the wakeup
interrupt.
The new Fuloong 2F and LingLoong 2F have a button to directly send an
interrupt to the CPU so there is no need to setup an interrupt.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: linux-pm@lists.linux-foundation.org
Patchwork: http://patchwork.linux-mips.org/patch/630/
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch add basic suspend support for loongson2f family machines,
loongson2f have a specific feature: when we set it's frequency to ZERO,
it will go into a wait mode, and then can be waked up by the external
interrupt. so, if we setup suitable interrupts before putting it into
wait mode, we will be able wake it up whenever we want via sending the
relative interrupts to it.
These interrupts are board-specific, Yeeloong2F use the keyboard
interrupt and SCI interrupt, but LingLoong and Fuloong2F use the
interrupts connected to the processors directly. and BTW: some old
LingLoong and FuLoong2F have no such interrupts connected, so, there is
no way to wake them up from suspend mode. and therefore, please do not
enable the kernel support for them.
The board-specific support will be added in the coming patches.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: linux-pm@lists.linux-foundation.org
Patchwork: http://patchwork.linux-mips.org/patch/629/
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch adds two new kernel options: CPU_SUPPORTS_CPUFREQ and
CPU_SUPPORTS_ADDRWINCFG to describe the new features of Loongons 2F and
replaces the several ugly #if clauses by them.
These two options will be utilized by the future loongson revisions and
related drivers such as the coming Loongson 2F CPUFreq driver.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add default config file for Lemote Loongson 2F family machines. The
resulting kernel image can be shared between Fuloong 2F, Yeeloong 2F and
other Lemote Loongson 2F family machines.
If you are using an old PMON, and not using a 2f box, please add a new
command line argument in the boot.cfg.
For example, add this argument for 8.9inches notebook:
machtype=lemote-yeeloong-2f-8.9inches
or
machtype=8.9
More information from arch/mips/loongson/common/machtype.c.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The generic i8259_irq() will make kernel hang on booting, so Loongson 2F
needs its own polling method.
IP6 is shared by the bonito interrupt and perfcounter interrupts.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
PCI support for the Fuloong 2E and Lemote Loongson 2F family machines is
mostly identical with the exception of CS5536 support.
Rename ops-fuloong2e.c to ops-loongson2.c then add the CS5536 support to
share most of the source code among Loongson machines.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Lemote Loongson 2F family machines use CS5536 as their south bridge and need
these lowlevel interfaces to access the devices on CS5536.
Virtualize the legacy devices on CS5536 as PCI devices. This way users can
access the CS5536 PCI config space directly as a normal multi-function
PCI 2.2 device.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add a new kernel option for Lemote Loongson 2F family machines.
Lemote loongson2f family machines utilize the 2f revision of loongson
processor and the AMD CS5536 south bridge.
Family members include Fuloong 2F mini PC, Yeeloong 2F notebook, LingLoong
all-in-one PC and others.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
has a programming interface similiar to the the FPGA northbridge used on
Loongson 2E.
The main differences between Loongson 2E and Loongson 2F include:
1. Loongson 2F has an extra address window configuration module, which
is used to map CPU address space to DDR or PCI address space, or map
the PCI-DMA address space to DDR or LIO address space.
2. Loongson 2F supports 8 levels of software configurable CPu frequency
which can be configured in the LOONGSON_CHIPCFG0 register. The coming
cpufreq and standby support are based on this feature.
Loongson.h abstracts the modules and corresponding methods are abstracted.
Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
memory space, PCI IO space, DMA address.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
In Loongson2f IP6 is shared by bonito and perfcounters so we need to avoid
do_IRQ for perfcounter when the interrupt is from bonito.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
To share the same kernel image amon different machines we have added the
machtype command line support.
In the old serial port implementation the UART base address is hardcoded as
a macro in machine.h which breaks with machtype, so change that to discover
the address dynamically. Also move the initialization of the UART base
address to uart_base.c to avoid remapping twice for early_printk.c and
serial.c.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/581/
Patchwork: http://patchwork.linux-mips.org/patch/682/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
To choose code for different machines by the value of machtype it needs to
be initialized as early as possible. So move initialization of
mips_machtype to prom_init().
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
On SMP systems, the collection of statistics can cause cache line
bouncing in the lines associated with the counters. Also there are
races incrementing the counters on multiple CPUs.
To fix both problems, we collect the statistics in per-CPU variables,
and add them up in the debugfs read operation.
As a test I ran the LTP float_bessel test on a 12 CPU Octeon system.
Without CONFIG_DEBUG_FS : 2602 seconds.
With CONFIG_DEBUG_FS: 2640 seconds.
With non-cpu-local atomic statistics: 14569 seconds.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Enable hibernation support by default. Also enable sparsemem to avoid
the hibernation failures with flatmem and save memory wasted by flatmem.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The built-in Loongson 2E/2F northbridge in is bonito64-compatible but not
identical with it. To avoid influencing the original bonito64 support and
make the loongson support more maintainable, it's better to separate the
Bonito64 code from the Loongson code.
This also prepares the kernel for the coming Loongson 2f machines family
support.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com,
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch add serial port support for all of the existing loongson
family machines. most of the board specific part are put in serial.c,
and the base address of the serial ports are defined as macros in
machine.h for sharing it between serial.c and early_printk.c
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The uart_base variable here is not a physical address, so, we replace it
by unsigned char *.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
