Commit graph

658 commits

Author SHA1 Message Date
Yinghai Lu
95f72d1ed4 lmb: rename to memblock
via following scripts

      FILES=$(find * -type f | grep -vE 'oprofile|[^K]config')

      sed -i \
        -e 's/lmb/memblock/g' \
        -e 's/LMB/MEMBLOCK/g' \
        $FILES

      for N in $(find . -name lmb.[ch]); do
        M=$(echo $N | sed 's/lmb/memblock/g')
        mv $N $M
      done

and remove some wrong change like lmbench and dlmb etc.

also move memblock.c from lib/ to mm/

Suggested-by: Ingo Molnar <mingo@elte.hu>
Acked-by: "H. Peter Anvin" <hpa@zytor.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-14 17:14:00 +10:00
Linus Torvalds
999fd1ab34 Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (23 commits)
  sh: Make intc messages consistent via pr_fmt.
  sh: make sure static declaration on ms7724se
  sh: make sure static declaration on mach-migor
  sh: make sure static declaration on mach-ecovec24
  sh: make sure static declaration on mach-ap325rxa
  clocksource: sh_cmt: compute mult and shift before registration
  clocksource: sh_tmu: compute mult and shift before registration
  sh: PIO disabling for x3proto and urquell.
  sh: mach-sdk7786: conditionally disable PIO support.
  sh: support for platforms without PIO.
  usb: r8a66597-hcd pio to mmio accessor conversion.
  usb: gadget: r8a66597-udc pio to mmio accessor conversion.
  usb: gadget: m66592-udc pio to mmio accessor conversion.
  sh: add romImage MMCIF boot for sh7724 and Ecovec V2
  sh: add boot code to MMCIF driver header
  sh: prepare MMCIF driver header file
  sh: allow romImage data between head.S and the zero page
  sh: Add support MMCIF for ecovec
  sh: remove duplicated #include
  input: serio: disable i8042 for non-cayman sh platforms.
  ...
2010-06-04 15:42:09 -07:00
Paul Mundt
019e2574f9 Merge branch 'sh/iomap' 2010-06-02 16:32:12 +09:00
Paul Mundt
86e4dd5add sh: support for platforms without PIO.
This extends some of the existing special casing for HAS_IOPORT
platforms and gets it to the point where platforms can begin to
conditionally select it.

The major changes here are that the PIO routines themselves go away
completely, including all of the machvec port mapping wrappers. With this
in place it's possible for any non-machvec abusing platform to disable
PIO completely. At present this is left as an opt-in until the abusers
are the odd ones out instead of the majority.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-06-02 16:31:42 +09:00
Linus Torvalds
1f73897861 Merge branch 'for-35' of git://repo.or.cz/linux-kbuild
* 'for-35' of git://repo.or.cz/linux-kbuild: (81 commits)
  kbuild: Revert part of e8d400a to resolve a conflict
  kbuild: Fix checking of scm-identifier variable
  gconfig: add support to show hidden options that have prompts
  menuconfig: add support to show hidden options which have prompts
  gconfig: remove show_debug option
  gconfig: remove dbg_print_ptype() and dbg_print_stype()
  kconfig: fix zconfdump()
  kconfig: some small fixes
  add random binaries to .gitignore
  kbuild: Include gen_initramfs_list.sh and the file list in the .d file
  kconfig: recalc symbol value before showing search results
  .gitignore: ignore *.lzo files
  headerdep: perlcritic warning
  scripts/Makefile.lib: Align the output of LZO
  kbuild: Generate modules.builtin in make modules_install
  Revert "kbuild: specify absolute paths for cscope"
  kbuild: Do not unnecessarily regenerate modules.builtin
  headers_install: use local file handles
  headers_check: fix perl warnings
  export_report: fix perl warnings
  ...
2010-06-01 08:55:52 -07:00
Magnus Damm
4705b2e804 sh: add romImage MMCIF boot for sh7724 and Ecovec V2
This patch is V2 of the MMCIF romImage boot support
for sh7724 and the Ecovec board. With this patch
applied and CONFIG_ROMIMAGE_MMCIF selected the
romImage kernel image can be written to a MMC card
and booted directly by the sh7724 cpu.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-31 13:11:54 +09:00
Guennadi Liakhovetski
10440af1bc sh: define DMA slaves per CPU type, remove now redundant header
Now that DMA slave IDs are only used used in platform specific code and have
become opaque cookies for the rest of the code, we can make the, CPU specific
too.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-22 16:51:17 +09:00
Linus Torvalds
0961d6581c Merge git://git.infradead.org/iommu-2.6
* git://git.infradead.org/iommu-2.6:
  intel-iommu: Set a more specific taint flag for invalid BIOS DMAR tables
  intel-iommu: Combine the BIOS DMAR table warning messages
  panic: Add taint flag TAINT_FIRMWARE_WORKAROUND ('I')
  panic: Allow warnings to set different taint flags
  intel-iommu: intel_iommu_map_range failed at very end of address space
  intel-iommu: errors with smaller iommu widths
  intel-iommu: Fix boot inside 64bit virtualbox with io-apic disabled
  intel-iommu: use physfn to search drhd for VF
  intel-iommu: Print out iommu seq_id
  intel-iommu: Don't complain that ACPI_DMAR_SCOPE_TYPE_IOAPIC is not supported
  intel-iommu: Avoid global flushes with caching mode.
  intel-iommu: Use correct domain ID when caching mode is enabled
  intel-iommu mistakenly uses offset_pfn when caching mode is enabled
  intel-iommu: use for_each_set_bit()
  intel-iommu: Fix section mismatch dmar_ir_support() uses dmar_tbl.
2010-05-21 17:25:01 -07:00
Linus Torvalds
f39d01be4c Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (44 commits)
  vlynq: make whole Kconfig-menu dependant on architecture
  add descriptive comment for TIF_MEMDIE task flag declaration.
  EEPROM: max6875: Header file cleanup
  EEPROM: 93cx6: Header file cleanup
  EEPROM: Header file cleanup
  agp: use NULL instead of 0 when pointer is needed
  rtc-v3020: make bitfield unsigned
  PCI: make bitfield unsigned
  jbd2: use NULL instead of 0 when pointer is needed
  cciss: fix shadows sparse warning
  doc: inode uses a mutex instead of a semaphore.
  uml: i386: Avoid redefinition of NR_syscalls
  fix "seperate" typos in comments
  cocbalt_lcdfb: correct sections
  doc: Change urls for sparse
  Powerpc: wii: Fix typo in comment
  i2o: cleanup some exit paths
  Documentation/: it's -> its where appropriate
  UML: Fix compiler warning due to missing task_struct declaration
  UML: add kernel.h include to signal.c
  ...
2010-05-20 09:20:59 -07:00
Linus Torvalds
7c7cbaf5b8 Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (127 commits)
  sh: update defconfigs.
  sh: Fix up the NUMA build for recent LMB changes.
  sh64: provide a stub per_cpu_trap_init() definition.
  sh: fix up CONFIG_KEXEC=n build.
  sh: fixup the docbook paths for clock framework shuffling.
  driver core: Early dev_name() depends on slab_is_available().
  sh: simplify WARN usage in SH clock driver
  sh: Check return value of clk_get on ms7724
  sh: Check return value of clk_get on ecovec24
  sh: move sh clock-cpg.c contents to drivers/sh/clk-cpg.c
  sh: move sh clock.c contents to drivers/sh/clk.
  sh: move sh asm/clock.h contents to linux/sh_clk.h V2
  sh: remove unused clock lookup
  sh: switch boards to clkdev
  sh: switch sh4-202 to clkdev
  sh: switch shx3 to clkdev
  sh: switch sh7757 to clkdev
  sh: switch sh7763 to clkdev
  sh: switch sh7780 to clkdev
  sh: switch sh7786 to clkdev
  ...
2010-05-19 11:36:03 -07:00
Ben Hutchings
b2be05273a panic: Allow warnings to set different taint flags
WARN() is used in some places to report firmware or hardware bugs that
are then worked-around.  These bugs do not affect the stability of the
kernel and should not set the flag for TAINT_WARN.  To allow for this,
add WARN_TAINT() and WARN_TAINT_ONCE() macros that take a taint number
as argument.

Architectures that implement warnings using trap instructions instead
of calls to warn_slowpath_*() now implement __WARN_TAINT(taint)
instead of __WARN().

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Acked-by: Helge Deller <deller@gmx.de>
Tested-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-05-19 08:36:48 +01:00
Linus Torvalds
4d7b4ac22f Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (311 commits)
  perf tools: Add mode to build without newt support
  perf symbols: symbol inconsistency message should be done only at verbose=1
  perf tui: Add explicit -lslang option
  perf options: Type check all the remaining OPT_ variants
  perf options: Type check OPT_BOOLEAN and fix the offenders
  perf options: Check v type in OPT_U?INTEGER
  perf options: Introduce OPT_UINTEGER
  perf tui: Add workaround for slang < 2.1.4
  perf record: Fix bug mismatch with -c option definition
  perf options: Introduce OPT_U64
  perf tui: Add help window to show key associations
  perf tui: Make <- exit menus too
  perf newt: Add single key shortcuts for zoom into DSO and threads
  perf newt: Exit browser unconditionally when CTRL+C, q or Q is pressed
  perf newt: Fix the 'A'/'a' shortcut for annotate
  perf newt: Make <- exit the ui_browser
  x86, perf: P4 PMU - fix counters management logic
  perf newt: Make <- zoom out filters
  perf report: Report number of events, not samples
  perf hist: Clarify events_stats fields usage
  ...

Fix up trivial conflicts in kernel/fork.c and tools/perf/builtin-record.c
2010-05-18 08:19:03 -07:00
Anton Blanchard
f3d46f9d31 atomic_t: Cast to volatile when accessing atomic variables
In preparation for removing volatile from the atomic_t definition, this
patch adds a volatile cast to all the atomic read functions.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-05-17 07:57:27 -07:00
Andreas Dilger
0ddc9324b1 add descriptive comment for TIF_MEMDIE task flag declaration.
Signed-off-by: Andreas Dilger <adilger@dilger.ca>
Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-05-14 11:13:27 +02:00
Paul Mundt
ef4ed97d6b Merge branch 'sh/lmb'
Conflicts:
	arch/sh/kernel/setup.c
2010-05-13 17:48:05 +09:00
Magnus Damm
8b5ee113e1 sh: move sh clock.c contents to drivers/sh/clk.
This patch is V2 of the SH clock framework move from
arch/sh/kernel/cpu/clock.c to drivers/sh/clk.c. All
code except the following functions are moved:
clk_init(), clk_get() and clk_put().

The init function is still kept in clock.c since it
depends on the SH-specific machvec implementation.

The symbols clk_get() and clk_put() already exist in
the common ARM clkdev code, those symbols are left in
the SH tree to avoid duplicating them for SH-Mobile ARM.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-13 17:39:14 +09:00
Magnus Damm
d28bdf05f7 sh: move sh asm/clock.h contents to linux/sh_clk.h V2
This patch is V2 of the clock framework move from
arch/sh/include/asm/clock.h to include/linux/sh_clk.h
and updates the include paths for files that will be
shared between SH and SH-Mobile ARM.

The file asm/clock.h is still kept in this version,
this to depend on as few files as possible at this
point. We keep SH specific stuff in there.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-13 17:39:07 +09:00
Magnus Damm
441c2440ab sh: remove unused clock lookup
Now when all clocks are registered using clkdev,
get rid of the special SH-specific clock lookup.

Also ditch the unused module ref counting code.
This patch syncs the SH behaviour with ARM.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-13 17:38:16 +09:00
Magnus Damm
914ebf0bbb sh: get rid of div4 clock name
Remove the name parameter from SH_CLK_DIV4() and
adjust the processor specific code. The lookup
happens using clkdev so the name is unused.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-13 17:35:05 +09:00
Magnus Damm
c77a9c3ede sh: get rid of mstp32 clock name and id
Remove the name and the id from SH_CLK_MSTP32().
Now when lookups are handled by clkdev they are
not needed anymore.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-13 17:33:17 +09:00
Paul Mundt
4bc277ac9c sh: bootmem refactoring.
This reworks much of the bootmem setup and initialization code allowing
us to get rid of duplicate work between the NUMA and non-NUMA cases. The
end result is that we end up with a much more flexible interface for
supporting more complex topologies (fake NUMA, highmem, etc, etc.) which
is entirely LMB backed. This is an incremental step for more NUMA work as
well as gradually enabling migration off of bootmem entirely.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-11 13:32:19 +09:00
Magnus Damm
9e1985e13d sh: get rid of div6 clock names
Get rid of div6 clock names on
sh7343/sh7366/sh7722/sh7723/sh7724

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-11 11:48:55 +09:00
Magnus Damm
08134c3c62 sh: get rid of hwblk clock names
Remove the clock name from sh7722/sh7723/sh7724
hwblk clocks. Lookup is handled by clkdev.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-11 11:48:47 +09:00
Magnus Damm
f3d51e13fe sh: hwblk index rework
Rework the sh7722/sh7723/sh7724 hwblk code to use the
hwblk id as index in the mstp clock array.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-11 11:48:31 +09:00
Paul Mundt
5e2ff328c0 sh: rework memory limits to work with LMB.
This reworks the memory limit handling to tie in through the available
LMB infrastructure. This requires a bit of reordering as we need to have
all of the LMB reservations taken care of prior to establishing the
limits.

While we're at it, the crash kernel reservation semantics are reworked
so that we allocate from the bottom up and reduce the risk of having
to disable the memory limit due to a clash with the crash kernel
reservation.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-10 20:17:25 +09:00
Paul Mundt
19d8f84f86 sh: enable LMB region setup via machvec.
This plugs in a memory init callback in the machvec to permit boards to
wire up various bits of memory directly in to LMB. A generic machvec
implementation is provided that simply wraps around the normal
Kconfig-derived memory start/size.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-10 15:39:05 +09:00
Paul Mundt
a5ec395071 sh: convert kexec crash kernel management to LMB.
This migrates the crash kernel handling off of bootmem and over to LMB.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-07 14:54:55 +09:00
Frederic Weisbecker
feef47d0cb hw-breakpoints: Get the number of available registers on boot dynamically
The breakpoint generic layer assumes that archs always know in advance
the static number of address registers available to host breakpoints
through the HBP_NUM macro.

However this is not true for every archs. For example Arm needs to get
this information dynamically to handle the compatiblity between
different versions.

To solve this, this patch proposes to drop the static HBP_NUM macro
and let the arch provide the number of available slots through a
new hw_breakpoint_slots() function. For archs that have
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS selected, it will be called once
as the number of registers fits for instruction and data breakpoints
together.
For the others it will be called first to get the number of
instruction breakpoint registers and another time to get the
data breakpoint registers, the targeted type is given as a
parameter of hw_breakpoint_slots().

Reported-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: K. Prasad <prasad@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Ingo Molnar <mingo@elte.hu>
2010-05-01 04:32:14 +02:00
Frederic Weisbecker
b2812d031d hw-breakpoints: Change/Enforce some breakpoints policies
The current policies of breakpoints in x86 and SH are the following:

- task bound breakpoints can only break on userspace addresses
- cpu wide breakpoints can only break on kernel addresses

The former rule prevents ptrace breakpoints to be set to trigger on
kernel addresses, which is good. But as a side effect, we can't
breakpoint on kernel addresses for task bound breakpoints.

The latter rule simply makes no sense, there is no reason why we
can't set breakpoints on userspace while performing cpu bound
profiles.

We want the following new policies:

- task bound breakpoint can set userspace address breakpoints, with
no particular privilege required.
- task bound breakpoints can set kernelspace address breakpoints but
must be privileged to do that.
- cpu bound breakpoints can do what they want as they are privileged
already.

To implement these new policies, this patch checks if we are dealing
with a kernel address breakpoint, if so and if the exclude_kernel
parameter is set, we tell the user that the breakpoint is invalid,
which makes a good generic ptrace protection.
If we don't have exclude_kernel, ensure the user has the right
privileges as kernel breakpoints are quite sensitive (risk of
trap recursion attacks and global performance impacts).

[ Paul Mundt: keep addr space check for sh signal delivery and fix
  double function declaration]

Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: K. Prasad <prasad@linux.vnet.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-01 04:32:10 +02:00
Paul Mundt
54b41b97fd Merge branch 'sh/smp' 2010-04-26 19:11:51 +09:00
Paul Mundt
763142d1ef sh: CPU hotplug support.
This adds preliminary support for CPU hotplug for SH SMP systems.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 19:08:55 +09:00
Paul Mundt
8db2bc4559 sh: cache secondary CPUs idle loop.
This provides a cache of the secondary CPUs idle loop for the cases where
hotplug simply enters a low power state instead of resetting or powering
off the core.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 18:59:47 +09:00
Paul Mundt
9715b8c7d5 sh: provide percpu CPU states for hotplug notifiers.
This provides percpu CPU states in preparation for CPU hotplug and the
associated notifier chains.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 18:49:58 +09:00
Paul Mundt
e19553427c Merge branch 'sh/stable-updates'
Conflicts:
	arch/sh/kernel/dwarf.c
	drivers/dma/shdma.c

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 16:08:27 +09:00
Guennadi Liakhovetski
c2fe3092e5 SH: fix TS field shift calculation for DMA drivers
CHCR_TS_HIGH_SHIFT is defined as a shift of TS high bits in CHCR register,
relative to low bits. The TS_INDEX2VAL() macro has to take this into account.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 16:02:09 +09:00
Matt Fleming
7c4584d39a sh: Assembly friendly __pa and __va definitions
This patch defines ___pa and ___va which return the physical and virtual
address of an address, respectively. These macros are suitable for
calling from assembly because they don't include the C casts required by
__pa and __va.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-04-25 20:44:22 +01:00
Paul Mundt
3366e3585f sh: Move platform smp ops in to their own structure.
This cribs the MIPS plat_smp_ops approach for wrapping up the platform
ops. This will allow for mixing and matching different ops on the same
platform in the future.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-21 12:23:25 +09:00
Paul Mundt
4a6feab0ee sh: __cpuinit annotate the CPU init path.
All of the regular CPU init path needs to be __cpuinit annotated for CPU
hotplug.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-21 12:20:42 +09:00
Paul Mundt
a9079ca0cb sh: Tidy CPU probing and fixup section annotations.
This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies
up the unused return value, and stuffs it under __cpuinit in preparation
for CPU hotplug.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-21 12:01:06 +09:00
Paul Mundt
3bd1666887 sh: hw-breakpoints: Kill off stub unthrottle callback.
This follows the x86 change and kills off the unthrottle stub. As the x86
change killed off the generic callback it isn't used anymore anyways.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-21 11:38:04 +09:00
Paul Mundt
d9c944463d sh: mach-sdk7786: pm_power_off support.
This wires up power-off support for the SDK7786 board.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-19 16:27:47 +09:00
Paul Mundt
dc825b1790 sh: intc: IRQ auto-distribution support.
This implements support for hardware-managed IRQ balancing as implemented
by SH-X3 cores (presently only hooked up for SH7786, but can probably be
carried over to other SH-X3 cores, too).

CPUs need to specify their distribution register along with the mask
definitions, as these follow the same format. Peripheral IRQs that don't
opt out of balancing will be automatically distributed at the whim of the
hardware block, while each CPU needs to verify whether it is handling the
IRQ or not, especially before clearing the mask.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-15 13:13:52 +09:00
Paul Mundt
050d4cc702 sh: dmaengine support for SH7786 DMAC0.
Hook up DMAC0 on SH7786.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-13 10:15:56 +09:00
Paul Mundt
99dc5c0ca9 sh: Disable MMUCR_AT for SH-4 nommu.
Presently address translation is default-enabled regardless of whether
CONFIG_MMU is set or not in the SH-4 case, this fixes it up, and also
makes the control init word a bit more readable in the process.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-07 17:08:32 +09:00
Paul Mundt
720fcb36ac Merge branches 'sh/intc-extension', 'sh/dmaengine', 'sh/serial-dma' and 'sh/clkfwk'
Conflicts:
	arch/sh/kernel/cpu/clock.c

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-30 11:26:43 +09:00
Matt Fleming
6ae6650232 sh: tlb debugfs support.
Export the status of the utlb and itlb entries through debugfs.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-29 15:24:54 +09:00
Andrew Stubbs
d5ab780305 sh: Fix FDPIC binary loader
Ensure that the aux table is properly initialized, even when optional
features are missing. Without this, the FDPIC loader did not work.

Signed-off-by: Andrew Stubbs <ams@codesourcery.com>
Cc: stable@kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-29 12:04:19 +09:00
Matt Fleming
4539282dbc sh: update the TLB replacement counter for entry wiring.
Presently the TLB wiring code depends on MMUCR.URB for working out where
to place the wired entry, but fails to take the replacment counter in to
consideration. This fixes up the wiring logic and ensures that wired
entries remain so.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-26 11:37:16 +09:00
Magnus Damm
b2623a61cf dmaengine: shdma: Introduce include/linux/sh_dma.h
Create a common platform data header file for the
shdma dmaengine driver. This is done by moving
common structures from sh asm/dmaengine.h to
linux/sh_dma.h. DMA registers are also copied from
sh asm/dma-register.h to make the code architecture
independent.

The sh header file asm/dmaengine.h is still kept
with the slave id enum. This allows us to keep the
old processor specific code as is and slowly move
over to slave id enums in per-processor headers.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-23 17:20:06 +09:00
Magnus Damm
02ca5083f6 dmaengine: shdma: Common SH_DMA_SLAVE_NUMBER
Move SHDMA_SLAVE_NUMBER from asm/dmaengine.h to
shdma.h. Set it to 256 to support a wide range
of processors. The amount of memory consumed by
this change is limited to 256 bits.

While at it, rename to SH_DMA_SLAVE_NUMBER to
match with the rest of the file.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-23 17:19:39 +09:00