Commit graph

431 commits

Author SHA1 Message Date
Maciej W. Rozycki
9cf8ff9644 [MIPS] Fix CPU type bitmasks for MIPS III, IV and V.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:25 +00:00
Ralf Baechle
fbb6b3a4ac [MIPS] Get rid of kludgery needed to keep stdargs of old compilers working.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:25 +00:00
Ralf Baechle
3218357c94 [MIPS] More uaccess.h fixes with gcc >= 4.0.1.
From Richard Sandiford <richard@codesourcery.com>:
    
This patch caused a miscompilation of the restore_gp_regs() block
in restore_sigcontext().  This was in a 32-bit kernel compiled with
GCC CVS head.
    
restore_gp_regs() copies 64-bit user fields into 32-bit variables,
and in this combination, the new __get_user_asm_ll32() clobbers too
many registers.  It says:
    
/*
 * Get a long long 64 using 32 bit registers.
 */
{									\
	__asm__ __volatile__(						\
	"1:	lw	%1, (%3)				\n"	\
	"2:	lw	%D1, 4(%3)				\n"	\
	"	move	%0, $0					\n"	\
	"3:	.section	.fixup,\"ax\"			\n"	\
	"4:	li	%0, %4					\n"	\
	"	move	%1, $0					\n"	\
	"	move	%D1, $0					\n"	\
	"	j	3b					\n"	\
	"	.previous					\n"	\
	"	.section	__ex_table,\"a\"		\n"	\
	"	" __UA_ADDR "	1b, 4b				\n"	\
	"	" __UA_ADDR "	2b, 4b				\n"	\
	"	.previous					\n"	\
	: "=r" (__gu_err), "=&r" (val)					\
	: "0" (0), "r" (addr), "i" (-EFAULT));				\
}

and this requires val (%1) to be a 64-bit value.  In the case I saw,
gcc was using $3 for the 32-bit val, and wasn't expecting $4 to be
clobbered.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:24 +00:00
Atsushi Nemoto
41700e7399 [MIPS] Add protected_blast_icache_range, blast_icache_range, etc.
Add blast_xxx_range(), protected_blast_xxx_range() etc. for common
use.  They are built by __BUILD_BLAST_CACHE_RANGE().
Use protected_cache_op() macro for various protected_ routines.
Output code should be logically same.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:24 +00:00
Ralf Baechle
359bbd42a5 [MIPS] Fold non-__mips64 case into CONFIG_32BIT case.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:23 +00:00
Ralf Baechle
f32ec77b42 [MIPS] RM200: Give RM200 it's own timex.h.
So we can get rid of config.h and the #ifdef crapola in the generic
timex.h.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:23 +00:00
Linus Torvalds
f564c5fe29 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 2006-02-08 09:58:27 -08:00
Atsushi Nemoto
b887d3f2c6 [MIPS] Add 'const' to readb and friends
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:27 +00:00
Ralf Baechle
72bf891421 [MIPS] Wire up new syscalls.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:25 +00:00
Ralf Baechle
40ac5d479b [MIPS] Make do_signal return void.
It's return value is ignored everywhere.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:25 +00:00
Ralf Baechle
7b3e2fc847 [MIPS] Add support for TIF_RESTORE_SIGMASK.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-02-08 17:52:24 +00:00
Al Viro
290f10ae42 [PATCH] mips: namespace pollution - mem_... -> __mem_... in io.h
A pile of internal functions use only inside mips io.h has names starting
with mem_... and clashing with names in drivers; renamed to __mem_....

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2006-02-08 01:03:06 -05:00
Al Viro
1b8623545b [PATCH] remove bogus asm/bug.h includes.
A bunch of asm/bug.h includes are both not needed (since it will get
pulled anyway) and bogus (since they are done too early).  Removed.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2006-02-07 20:56:35 -05:00
Sergei Shtylylov
f09678af51 [MIPS] TX49x7: Fix reporting of the CPU name and PCI clock
I've noticed that PCI clock was incorrectly reported as 66 MHz while being
mere 33 MHz on RBTX4937 board -- this was due to the different encoding of
the PCI divisor field in CCFG register between TX4927 and TX4937 chips...
    
Also, RBTX49x7 was printed out as a CPU name (e.g., "CPU is RBTX4937");
and some debug printk() were duplicating each other...
    
Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:26 +00:00
Atsushi Nemoto
c226f2601f [MIPS] TX49 MFC0 bug workaround
If mfc0 $12 follows store and the mfc0 is last instruction of a
page and fetching the next instruction causes TLB miss, the result
of the mfc0 might wrongly contain EXL bit.
    
ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
    
Workaround: mask EXL bit of the result or place a nop before mfc0.  It
doesn't harm to always clear those bits, so we change the code to do so.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:26 +00:00
Ralf Baechle
1e32ceeca2 [MIPS] MIPS R2 optimized endianess swapping.
From Franck Bui-Huu <vagabon.xyz@gmail.com> with modifications by me.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:25 +00:00
Ralf Baechle
7e5b24ac75 [MIPS] Remove buggy inline version of memscan.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:25 +00:00
Atsushi Nemoto
d4264f1839 [MIPS] Remove wrong __user tags.
This fixes sparse warnings 'dereference of noderef expression'.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:25 +00:00
Ralf Baechle
2caf190002 [MIPS] Cleanup fls implementation.
fls was the only called of flz, so fold flz into fls, same for the
__ilog2 call.  Delete the now unused flz function.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:24 +00:00
Ralf Baechle
2e66fe24d6 [MIPS] local_irq_restore wasn't safe to be used in other macros mode.
It always left the assembler in reorder mode possibly causing disaster.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:24 +00:00
Atsushi Nemoto
76f072a46f [MIPS] Build blast_cache routines from template
Build blast_xxx, blast_xxx_page, blast_xxx_page_indexed from template.
Easier to maintaina and saves 300 lines.  Generated code should be
unchanged.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:24 +00:00
Sergei Shtylylov
492fd5f2fd [MIPS] Au1200: Make KGDB compile
AMD Au1200 SOC just doesn't have UART3, so KGDB won't even compile for it
as is, here's the fix to make KGDB use UART1.
    
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:23 +00:00
Sergei Shtylylov
6fe2a5681f [MIPS] TX49x7: Fix timer register #define's
Fix the #define's for TX4927/37 timer reg's to match the datasheets (those
    
Signed-off-by: Konstantin Baydarov <kbaidarov@mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:23 +00:00
Ralf Baechle
4feb8f8f45 [MIPS] Bullet proof uaccess.h against 4.0.1 miss-compilation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:23 +00:00
Ralf Baechle
dd2f18fe5a [MIPS] Nevada support for SGI O2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:22 +00:00
Ralf Baechle
c011db451b [MIPS] CPU definitions for Cobalt.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:22 +00:00
Ralf Baechle
11ed6d5bb0 [MIPS] Rename include/asm-mips/cobalt to include/asm-mips/mach-cobalt.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:22 +00:00
Ralf Baechle
fcdb27ad1d [MIPS] Rename _machine_power_off to pm_power_off so the kernel builds again.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:22 +00:00
Ralf Baechle
05faa7b758 [MIPS] Fix C version of ssnop to use the right opcode.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:21 +00:00
Al Viro
f5a61d0c13 [PATCH] death of get_thread_info/put_thread_info
{get,put}_thread_info() were introduced in 2.5.4 and never
had been called by anything in the tree.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:59 -08:00
Al Viro
75bb07e788 [PATCH] mips: task_stack_page()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:59 -08:00
Al Viro
40bc9c671a [PATCH] mips: task_pt_regs()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:58 -08:00
akpm@osdl.org
198e2f1811 [PATCH] scheduler cache-hot-autodetect
)

From: Ingo Molnar <mingo@elte.hu>

This is the latest version of the scheduler cache-hot-auto-tune patch.

The first problem was that detection time scaled with O(N^2), which is
unacceptable on larger SMP and NUMA systems. To solve this:

- I've added a 'domain distance' function, which is used to cache
  measurement results. Each distance is only measured once. This means
  that e.g. on NUMA distances of 0, 1 and 2 might be measured, on HT
  distances 0 and 1, and on SMP distance 0 is measured. The code walks
  the domain tree to determine the distance, so it automatically follows
  whatever hierarchy an architecture sets up. This cuts down on the boot
  time significantly and removes the O(N^2) limit. The only assumption
  is that migration costs can be expressed as a function of domain
  distance - this covers the overwhelming majority of existing systems,
  and is a good guess even for more assymetric systems.

  [ People hacking systems that have assymetries that break this
    assumption (e.g. different CPU speeds) should experiment a bit with
    the cpu_distance() function. Adding a ->migration_distance factor to
    the domain structure would be one possible solution - but lets first
    see the problem systems, if they exist at all. Lets not overdesign. ]

Another problem was that only a single cache-size was used for measuring
the cost of migration, and most architectures didnt set that variable
up. Furthermore, a single cache-size does not fit NUMA hierarchies with
L3 caches and does not fit HT setups, where different CPUs will often
have different 'effective cache sizes'. To solve this problem:

- Instead of relying on a single cache-size provided by the platform and
  sticking to it, the code now auto-detects the 'effective migration
  cost' between two measured CPUs, via iterating through a wide range of
  cachesizes. The code searches for the maximum migration cost, which
  occurs when the working set of the test-workload falls just below the
  'effective cache size'. I.e. real-life optimized search is done for
  the maximum migration cost, between two real CPUs.

  This, amongst other things, has the positive effect hat if e.g. two
  CPUs share a L2/L3 cache, a different (and accurate) migration cost
  will be found than between two CPUs on the same system that dont share
  any caches.

(The reliable measurement of migration costs is tricky - see the source
for details.)

Furthermore i've added various boot-time options to override/tune
migration behavior.

Firstly, there's a blanket override for autodetection:

	migration_cost=1000,2000,3000

will override the depth 0/1/2 values with 1msec/2msec/3msec values.

Secondly, there's a global factor that can be used to increase (or
decrease) the autodetected values:

	migration_factor=120

will increase the autodetected values by 20%. This option is useful to
tune things in a workload-dependent way - e.g. if a workload is
cache-insensitive then CPU utilization can be maximized by specifying
migration_factor=0.

I've tested the autodetection code quite extensively on x86, on 3
P3/Xeon/2MB, and the autodetected values look pretty good:

Dual Celeron (128K L2 cache):

 ---------------------
 migration cost matrix (max_cache_size: 131072, cpu: 467 MHz):
 ---------------------
           [00]    [01]
 [00]:     -     1.7(1)
 [01]:   1.7(1)    -
 ---------------------
 cacheflush times [2]: 0.0 (0) 1.7 (1784008)
 ---------------------

Here the slow memory subsystem dominates system performance, and even
though caches are small, the migration cost is 1.7 msecs.

Dual HT P4 (512K L2 cache):

 ---------------------
 migration cost matrix (max_cache_size: 524288, cpu: 2379 MHz):
 ---------------------
           [00]    [01]    [02]    [03]
 [00]:     -     0.4(1)  0.0(0)  0.4(1)
 [01]:   0.4(1)    -     0.4(1)  0.0(0)
 [02]:   0.0(0)  0.4(1)    -     0.4(1)
 [03]:   0.4(1)  0.0(0)  0.4(1)    -
 ---------------------
 cacheflush times [2]: 0.0 (33900) 0.4 (448514)
 ---------------------

Here it can be seen that there is no migration cost between two HT
siblings (CPU#0/2 and CPU#1/3 are separate physical CPUs). A fast memory
system makes inter-physical-CPU migration pretty cheap: 0.4 msecs.

8-way P3/Xeon [2MB L2 cache]:

 ---------------------
 migration cost matrix (max_cache_size: 2097152, cpu: 700 MHz):
 ---------------------
           [00]    [01]    [02]    [03]    [04]    [05]    [06]    [07]
 [00]:     -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [01]:  19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [02]:  19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [03]:  19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [04]:  19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1)
 [05]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1)
 [06]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1)
 [07]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -
 ---------------------
 cacheflush times [2]: 0.0 (0) 19.2 (19281756)
 ---------------------

This one has huge caches and a relatively slow memory subsystem - so the
migration cost is 19 msecs.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Cc: <wilder@us.ibm.com>
Signed-off-by: John Hawkes <hawkes@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:50 -08:00
Ingo Molnar
4dc7a0bbeb [PATCH] sched: add cacheflush() asm
Add per-arch sched_cacheflush() which is a write-back cacheflush used by
the migration-cost calibration code at bootup time.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:49 -08:00
Ralf Baechle
7043ad4f4c MIPS: R2: Try to bulletproof instruction_hazard against miss-compilation.
Gcc has a tradition of misscompiling the previous construct using the
address of a label as argument to inline assembler.  Gas otoh has the
annoying difference between la and dla which are only usable for 32-bit
rsp. 64-bit code, so can't be used without conditional compilation.
The alterantive is switching the assembler to 64-bit code which happens
to work right even for 32-bit code ...
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:08 +00:00
Maxime Bizon
15265251c5 MIPS: R2: Fix local_irq_save()
local_irq_restore uses di which saves the whole status content, not
just the IE bit resulting in  local_irq_restore() to fail.  This only
happens if both CONFIG_CPU_MIPSR2 and CONFIG_IRQ_CPU are enabled.
    
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:08 +00:00
Al Viro
d56efda451 MIPS: Namespace pollution: dump_regs() -> elf_dump_regs()
dump_regs() is used by a bunch of drivers for their internal stuff;
renamed mips instance (one that is seen in system-wide headers)
to elf_dump_regs()
    
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:08 +00:00
Sergei Shtylyov
c5c64e2283 MIPS: Au1550: Fix OHCI memory map size
USB OpenHCI host controller on Au1550 only decodes memory addresses from
0x14020000 to 0x1407FFFF according to the databook, which gives 0x60000
(on the prior Au1x00 chips the map size was 1MB).
    
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:07 +00:00
Ralf Baechle
29ce2c765c Update Yoichi Yuasa's email address.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:07 +00:00
Ralf Baechle
0401572a9b MIPS: Reorganize ISA constants strictly as bitmasks.
Signed-off-by: Ralf Baechle <ralf@ongar.mips.com>
2006-01-10 13:39:07 +00:00
Ralf Baechle
b4672d3729 MIPS: Introduce machinery for testing for MIPSxxR1/2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:06 +00:00
Ralf Baechle
e7958bb90d MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:06 +00:00
Ralf Baechle
b2d28b7ea5 MIPS: Get rid of atomic_lock.
It was resulting in build errors for some configurations.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:06 +00:00
Ralf Baechle
264879576c MIPS: DSP: Put mask field into the right place.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:05 +00:00
Ralf Baechle
07a801def4 MIPS: DSP: Set all register masks to 0x3ff.
0x2ff was a typo and the value 0x1f of DSP_MASK was refering to an old
version of the documentation.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:04 +00:00
Atsushi Nemoto
f12555d24c MIPS: Fix mdelay(1) for 64bit kernel with HZ == 1000
mdelay(1) (i.e. udelay(1000)) does not work correctly due to overflow.
    
1000 * 0x004189374BC6A7f0 = 0x10000000000000180 (>= 2**64)
    
0x004189374BC6A7ef (0x004189374BC6A7f0 - 1) is OK and it is exactly
same as catchall case (0x8000000000000000UL / (500000 / HZ)).
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:04 +00:00
Ralf Baechle
6c35585273 MIPS: DSP: eleminate used_dsp.
used_dsp was meant to be used like used_math - but since the FPU context
is small and lazy context switching is a stupid idea on multiprocessors
this idea only got halfway implemented and those bits are were now
breaking ptrace.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:04 +00:00
Ralf Baechle
da2c9ed55b MIPS: DSP: Context switch the DSPcontrol register also.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:04 +00:00
Arjan van de Ven
2acbb8c657 [PATCH] mutex subsystem, add default include/asm-*/mutex.h files
add the per-arch mutex.h files for the remaining architectures.

We default to asm-generic/mutex-dec.h, because that performs
quite well on most arches. Arches that do not have atomic
decrement/increment instructions should switch to mutex-xchg.h
instead. Arches can also provide their own implementation for
the mutex fastpath primitives.

Signed-off-by: Arjan van de Ven <arjan@infradead.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2006-01-09 15:59:19 -08:00
Ingo Molnar
ffbf670f5c [PATCH] mutex subsystem, add atomic_xchg() to all arches
add atomic_xchg() to all the architectures. Needed by the new mutex code.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjan@infradead.org>
2006-01-09 15:59:17 -08:00
Ravikiran G Thirumalai
1fd73c6b67 [PATCH] Kill L1_CACHE_SHIFT_MAX
Kill L1_CACHE_SHIFT from all arches.  Since L1_CACHE_SHIFT_MAX is not used
anymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX.

Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-08 20:13:39 -08:00
Domen Puncer
599a6e8ca4 [PATCH] mips: remove include/asm-mips/riscos-syscall.h
Remove nowhere referenced file ("grep riscos -r ." didn't find anything).

Signed-off-by: Domen Puncer <domen@coderock.org>
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-06 08:33:33 -08:00
Christoph Lameter
d3cb487149 [PATCH] atomic_long_t & include/asm-generic/atomic.h V2
Several counters already have the need to use 64 atomic variables on 64 bit
platforms (see mm_counter_t in sched.h).  We have to do ugly ifdefs to fall
back to 32 bit atomic on 32 bit platforms.

The VM statistics patch that I am working on will also make more extensive
use of atomic64.

This patch introduces a new type atomic_long_t by providing definitions in
asm-generic/atomic.h that works similar to the c "long" type.  Its 32 bits
on 32 bit platforms and 64 bits on 64 bit platforms.

Also cleans up the determination of the mm_counter_t in sched.h.

Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-06 08:33:29 -08:00
Badari Pulavarty
f6b3ec238d [PATCH] madvise(MADV_REMOVE): remove pages from tmpfs shm backing store
Here is the patch to implement madvise(MADV_REMOVE) - which frees up a
given range of pages & its associated backing store.  Current
implementation supports only shmfs/tmpfs and other filesystems return
-ENOSYS.

"Some app allocates large tmpfs files, then when some task quits and some
client disconnect, some memory can be released.  However the only way to
release tmpfs-swap is to MADV_REMOVE". - Andrea Arcangeli

Databases want to use this feature to drop a section of their bufferpool
(shared memory segments) - without writing back to disk/swap space.

This feature is also useful for supporting hot-plug memory on UML.

Concerns raised by Andrew Morton:

- "We have no plan for holepunching!  If we _do_ have such a plan (or
  might in the future) then what would the API look like?  I think
  sys_holepunch(fd, start, len), so we should start out with that."

- Using madvise is very weird, because people will ask "why do I need to
  mmap my file before I can stick a hole in it?"

- None of the other madvise operations call into the filesystem in this
  manner.  A broad question is: is this capability an MM operation or a
  filesytem operation?  truncate, for example, is a filesystem operation
  which sometimes has MM side-effects.  madvise is an mm operation and with
  this patch, it gains FS side-effects, only they're really, really
  significant ones."

Comments:

- Andrea suggested the fs operation too but then it's more efficient to
  have it as a mm operation with fs side effects, because they don't
  immediatly know fd and physical offset of the range.  It's possible to
  fixup in userland and to use the fs operation but it's more expensive,
  the vmas are already in the kernel and we can use them.

Short term plan &  Future Direction:

- We seem to need this interface only for shmfs/tmpfs files in the short
  term.  We have to add hooks into the filesystem for correctness and
  completeness.  This is what this patch does.

- In the future, plan is to support both fs and mmap apis also.  This
  also involves (other) filesystem specific functions to be implemented.

- Current patch doesn't support VM_NONLINEAR - which can be addressed in
  the future.

Signed-off-by: Badari Pulavarty <pbadari@us.ibm.com>
Cc: Hugh Dickins <hugh@veritas.com>
Cc: Andrea Arcangeli <andrea@suse.de>
Cc: Michael Kerrisk <mtk-manpages@gmx.net>
Cc: Ulrich Drepper <drepper@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-06 08:33:22 -08:00
Linus Torvalds
25c862cc9e Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild 2006-01-04 16:36:52 -08:00
Stephen Hemminger
3821af2fe1 [FLS64]: generic version
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-01-03 13:11:06 -08:00
Brian Gerst
42f122c8f7 gitignore: asm-offsets.h
Ignore asm-offsets.h for all arches.

Signed-off-by: Brian Gerst <bgerst@didntduck.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2006-01-01 22:21:50 +01:00
Jordan Crouse
8f29e650bf [PATCH] ide: AU1200 IDE update
Changes here include removing all of CONFIG_PM while it is being repeatedly
smacked with a lead pipe, moving the BURSTMODE param to a #define (it should
be defined almost always anyway), fixing the rqsize stuff, pulling ide_ioreg_t,
and general cleanups and whatnot.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2005-12-15 02:17:46 +01:00
Jordan Crouse
65e5f2e3b4 [PATCH] ide: core modifications for AU1200
bart: slightly modified by me

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2005-12-15 02:16:18 +01:00
Ralf Baechle
e76beeebff [MIPS] Qemu: Qemu is emulating a 1193.182kHz i8254 PIC.
From Daniel Jacobowitz <dan@debian.org>.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-12-01 11:05:15 +00:00
Ralf Baechle
1a6ea3ec67 [MIPS] SEAD: More build fixes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:57 +00:00
Ralf Baechle
561a079240 [MIPS] SEAD: Delete seadint_init() prototype.
There is no definition for seadint_init() and the unprotected prototype
breaks compilation of assembler files.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:55 +00:00
Ralf Baechle
c183f1224b [MIPS] JMR3927: Fix include wrapper symbol.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:54 +00:00
Arnaud Giersch
f10d14ddec [MIPS] Fix documentation typos.
Signed-off-by: Arnaud Giersch <arnaud.giersch@free.fr>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:49 +00:00
Arnaud Giersch
99289a4e8a [MIPS] Add const qualifier to writes##bwlq.
Add const qualifier to parameter addr of writes##bwlq.
    
Signed-off-by: Arnaud Giersch <arnaud.giersch@free.fr>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:49 +00:00
Arnaud Giersch
59f145d28c [MIPS] IP32: Fix sparse warnings.
Add __iomem qualifier to crime and mace pointers.
    
Signed-off-by: Arnaud Giersch <arnaud.giersch@free.fr>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:48 +00:00
Arnaud Giersch
84c493d8e1 [MIPS] IP32 Fix and complete IP32 parport definitions
Fix, complete, and indent IP32 parport definitions.
Definition were wrong for CTXINUSE and DMACTIVE (1-bit shift).
Add macros DATA_BOUND, DATALEN_SHIFT, and CTRSHIFT.
    
Signed-off-by: Arnaud Giersch <arnaud.giersch@free.fr>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:47 +00:00
Ralf Baechle
efd9412d85 [MIPS] JMR3927: Undo accidental rename.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:45 +00:00
Ralf Baechle
16212017a5 [MIPS] IP32: No need to include <asm/io.h>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:44 +00:00
Ralf Baechle
bdc3c3c7cb [MIPS] Add missing arch defines for the Alchemy MTD driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:42 +00:00
Ralf Baechle
db7f686182 [MIPS] Delete duplicate definitions of break codes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:38 +00:00
Nick Piggin
8426e1f6af [PATCH] atomic: inc_not_zero
Introduce an atomic_inc_not_zero operation.  Make this a special case of
atomic_add_unless because lockless pagecache actually wants
atomic_inc_not_negativeone due to its offset refcount.

Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: "Paul E. McKenney" <paulmck@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-13 18:14:16 -08:00
Nick Piggin
4a6dae6d38 [PATCH] atomic: cmpxchg
Introduce an atomic_cmpxchg operation.

Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: "Paul E. McKenney" <paulmck@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-13 18:14:16 -08:00
Linus Torvalds
3f00d3e8fb Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 2005-11-07 11:15:23 -08:00
Atsushi Nemoto
a06d61c648 Redefine outs[wl] for ide_outs[wl].
Add missing bits to fix D-cache aliasing problem in the PIO IDE driver.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:40 +00:00
Ralf Baechle
4fa0997be8 Delete duplicate definitions.
This reverts 8f91ed6c2f.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:40 +00:00
Atsushi Nemoto
a0f08209c6 Define MAX_UDELAY_MS
If HZ was 1000, mdelay(2) cause overflow on multiplication in
__udelay.  We should define MAX_UDELAY_MS properly to prevent this.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:39 +00:00
Atsushi Nemoto
53c2df2f4e Use rtc_lock to protect RTC operations
Many RTC routines were not protected against each other, so there are
potential races, for example, ntp-update against /dev/rtc.  This patch
fixes them using rtc_lock.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:38 +00:00
Atsushi Nemoto
e329331aed Remove mips_rtc_lock
The mips_rtc_lock is no longer needed because RTC operations should be
protected already by other mechanism. (rtc_lock, local_irq_save, etc.)
    
Also, locking whole rtc_get_time/rtc_set_time should be avoided while
some RTC routines might take very long time (a few seconds).
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:38 +00:00
Ralf Baechle
15b96a4757 Add .gitignore files for MIPS. 2005-11-07 18:05:37 +00:00
Ilya A. Volynets-Evenbakh
08eaabfce0 O2 parport definitions
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:35 +00:00
Ralf Baechle
b0c705161f Add spaces to MODULE_PROC_FAMILY values.
Only a cosmetic fix to make the output of modinfo look readable.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:34 +00:00
Ralf Baechle
afc4841d8a Turn rtlx upside down.
o Coding style
 o Race condition on open
 o Switch to dynamic major
 o Header file cleanup
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-07 18:05:33 +00:00
Tim Schmielau
8c65b4a604 [PATCH] fix remaining missing includes
Fix more include file problems that surfaced since I submitted the previous
fix-missing-includes.patch.  This should now allow not to include sched.h
from module.h, which is done by a followup patch.

Signed-off-by: Tim Schmielau <tim@physik3.uni-rostock.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:41 -08:00
Arthur Othieno
727a53bd53 [PATCH] semaphore: Remove __MUTEX_INITIALIZER()
__MUTEX_INITIALIZER() has no users, and equates to the more commonly used
DECLARE_MUTEX(), thus making it pretty much redundant.  Remove it for good.

Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-30 17:37:27 -08:00
Tejun Heo
1426d7a81d [PATCH] vm: remove unused/broken page_pte[_prot] macros
This patch removes page_pte_prot and page_pte macros from all
architectures.  Some architectures define both, some only page_pte (broken)
and others none.  These macros are not used anywhere.

page_pte_prot(page, prot) is identical to mk_pte(page, prot) and
page_pte(page) is identical to page_pte_prot(page, __pgprot(0)).

* The following architectures define both page_pte_prot and page_pte

  arm, arm26, ia64, sh64, sparc, sparc64

* The following architectures define only page_pte (broken)

  frv, i386, m32r, mips, sh, x86-64

* All other architectures define neither

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-30 17:37:22 -08:00
Christoph Hellwig
dfb7dac3af [PATCH] unify sys_ptrace prototype
Make sure we always return, as all syscalls should.  Also move the common
prototype to <linux/syscalls.h>

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Miklos Szeredi <miklos@szeredi.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-30 17:37:20 -08:00
Andrew Isaacson
8a1417de9e BCM1480 HT support
PCI support code for PLX 7250 PCI-X tunnel on BCM91480B BigSur board.
    
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:49 +01:00
Andrew Isaacson
9a6dcea103 Support for BigSur board.
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:47 +01:00
Andrew Isaacson
93ce2f524e Add support for SB1A CPU.
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:46 +01:00
Andrew Isaacson
4f19f99047 Sibyte header cleanup
Update sibyte headers to match Broadcom internal copies:
 - comment cleanup and updates
 - fix LittleSur part number to match the board silkscreen
    
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:46 +01:00
Andrew Isaacson
4cbf2beac2 BCM1480 headers
Add header files for BCM1480/1280/1455/1255 family of chips, and
update sb1250 headers which are shared by BCM1480 family.
    
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/sibyte/bcm1480_int.h b/include/asm-mips/sibyte/bcm1480_int.h
new file mode 100644
2005-10-29 19:32:45 +01:00
Ralf Baechle
485a4a928a Make UL what should be UL.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:44 +01:00
Ralf Baechle
178086c86a Don't print file name and line in die and die_if_kernel.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:42 +01:00
Ralf Baechle
8f91ed6c2f Define EOWNERDEAD and ENOTRECOVERABLE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:41 +01:00
Ralf Baechle
beb3ca82fc More configcheck fixes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:40 +01:00
Ralf Baechle
4ee1303a78 2.6.14-rc1 updates for MIPS compat types.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:40 +01:00
Ralf Baechle
b4f8c42307 Complete the fcntl.h cleanup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:40 +01:00
Ralf Baechle
3cd9b6802d Cleanup Sibyte Kconfig a bit further.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:39 +01:00
Ralf Baechle
8592d4c00e Fix weirdness in <asm/bug.h>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:38 +01:00
Ralf Baechle
ec917c2c1a Fixup a few lose ends in explicit support for MIPS R1/R2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:37 +01:00
Ralf Baechle
5090dfb5bc Provide 64-bit address space definitions for the Sibyte SB1 CPU core.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:33 +01:00
Ralf Baechle
02cf211968 Cleanup the mess in cpu_cache_init.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:32 +01:00
Ralf Baechle
f5cfa980e5 Use R4000 TLB routines for SB1 also.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:31 +01:00
Ralf Baechle
0015365cc6 Fix ARCH_KMALLOC_MINALIGN values on MIPS
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:30 +01:00
Ralf Baechle
c78cbf49c4 Support for MIPSsim, the cycle accurate MIPS simulator.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:30 +01:00
Daniel Jacobowitz
ea3d710fe5 Revise MIPS 64-bit ptrace interface
Change the N32 debugging ABI to something more sane, and add support
for o32 and n32 debuggers to trace n64 programs.
    
Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:29 +01:00
Ralf Baechle
9d58f302ca Glue again after removal of BUILD_BUG().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:28 +01:00
Ralf Baechle
80b47346b0 SMP on Malta needs to define ARCH_HAS_IRQ_PER_CPU since 2.6.14-rc1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h
new file mode 100644
2005-10-29 19:32:27 +01:00
Ralf Baechle
bab056aafe Add SOCK_DCCP definition for MIPS also.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:26 +01:00
Ralf Baechle
e97288386a The type of sum in csum_tcpudp_nofold is "unsigned int", so when we assign
to it in an asm() block, and we're running on a system with 64-bit
registers, it is vitally important that we sign extend it correctly before
returning to C.  Otherwise the stray high bits will be preserved into
csum_fold, and on the SB-1 processor, 32-bit arithmetic on a non
sign-extended register will yield surprising results.
    
This caused incorrect checksums in some UDP packets for NFS root.  The
problem was mild when using a 10.0.1.x IP address, but severe when
using 192.168.1.x.
    
Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:25 +01:00
Pete Popov
2cce826322 Kernel gpio/2 routines that will be used by some drivers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:25 +01:00
Pete Popov
d6460827af Updated pcmcia driver with pb1200 and db1200 support.
Updated db1200_defconfig so pcmcia is enabled by default.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:24 +01:00
Ralf Baechle
870d3d98eb Reorder & reformat a bit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:23 +01:00
Ralf Baechle
61ed7f08b6 The values for SO_SNDBUFFORCE / SO_RCVBUFFORCE were already taken ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:22 +01:00
Ralf Baechle
ebfaebae36 Futexes for MIPS, for the time being only the R10000_LLSC_WAR version.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:21 +01:00
Ralf Baechle
9dbdfce85c Define pcibus_to_node() for IP27.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:21 +01:00
Pete Popov
26a940e217 Cleaned up AMD Au1200 IDE driver:
- converted to platform bus
- removed pci dependencies
- removed virt_to_phys/phys_to_virt calls
    
System now can root off of a disk.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/Documentation/mips/AU1xxx_IDE.README b/Documentation/mips/AU1xxx_IDE.README
new file mode 100644
2005-10-29 19:32:20 +01:00
Ralf Baechle
4f94afa258 Delete the SABLE_RTL case.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:19 +01:00
Ralf Baechle
097975fc66 Provide MODULE_ARCH_VERMAGIC for MIPS.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:18 +01:00
Maciej W. Rozycki
98e316d4b1 Move MIPS Technologies processor IDs to where they belong.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:16 +01:00
Ralf Baechle
5bcb9a58e6 Move genrtc.c's functions into <asm/rtc.h>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:15 +01:00
Thiemo Seufer
65dd7026a9 Define some more common ip22 CPU features.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:14 +01:00
Thiemo Seufer
aaa49075c6 Typo fix.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:14 +01:00
Thiemo Seufer
2fe25f67a5 More .set push/pop encapsulation, more eyefriendly code formatting.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:14 +01:00
Thiemo Seufer
f8670e66dc Fix MAP_BASE for 64bit ip22.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:13 +01:00
Ralf Baechle
f99d3023f3 Sprinkle a few more .set mipsX over xchg to make sure we dont' end up with
64-bit instructions on 32-bit processors, they tend to be unhappy about
that kind of food ;-)

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:11 +01:00
Ralf Baechle
fabffc13ed Remove workaround for binutils 2.15 assembler bug; this version is not
suitable to reliably build kernels anymore anyway and 2.16 has this
fixed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:11 +01:00
Ralf Baechle
27c7c1657d Drop might_sleep() calls from get_user() & co. This should fix the issue
in http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=200508171321.20094.Joshua.Wise%40sicortex.com and it's the right thing to do anyway because
it was inflating those functions way too much.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:10 +01:00
Ralf Baechle
340ee4b98c Virtual SMP support for the 34K.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:10 +01:00
Ralf Baechle
533330bf7f On CONFIG_64BIT_PHYS_ADDR, pfn always fits in 'unsigned long', but
pfn<<PAGE_SHIFT sometimes extends beyond.  The pte is big enough to hold
'long long', but the shift in pfn_pte() needs to do its calculation with
enough bits to hold the result.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:09 +01:00
Ralf Baechle
0952e2905c Fix parenthesis in macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:08 +01:00
Ralf Baechle
8b200ce4a6 Define cpu_icache_snoops_remote_store. This is slight abuse of something
which originally was meant for SMP cache managment but it can be argued
to apply on the 34K as well.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:07 +01:00
Ralf Baechle
3fd5646cac Add missing space.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:05 +01:00
Ralf Baechle
479a0e3e02 Support for CoreFPGA-3.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:02 +01:00
Ralf Baechle
23fbee9dd5 Support for Toshiba's RBHMA4500 eval board for the TX4938.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:57 +01:00
Pete Popov
bdf21b18b4 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:54 +01:00
Ralf Baechle
e01402b115 More AP / SP bits for the 34K, the Malta bits and things. Still wants
a little polishing.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:53 +01:00
Ralf Baechle
86071b637d Cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:53 +01:00
Ralf Baechle
7e35952baa Move Origin crapola into a machine-specific header file.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:52 +01:00
Ralf Baechle
8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller
options and the precense of the MT ASE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:51 +01:00
Ralf Baechle
699dbc90e8 Macros to access the register of processors using the new MIPS
Multithreading ASE, also know as MT ASE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h
new file mode 100644
2005-10-29 19:31:51 +01:00
Pete Popov
f10fae0240 Fix the fixup_bigphys_addr compile problem.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:50 +01:00
Pete Popov
10f6567e63 Removed __ilog2 since it's no longer needed and conflicts with the
generic one.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:49 +01:00
Ralf Baechle
7a0fc58cd9 A few more macros to access MIPS R2 architecture registers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:49 +01:00
Ralf Baechle
97fb5de194 Add EF_MIPS_ARCH_32R2 and EF_MIPS_ARCH_64R2 for tagging of R2 binaries.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:47 +01:00
Ralf Baechle
f039b5d366 Add a few more SHN_MIPS_* symbols from glibc.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:47 +01:00
Ralf Baechle
7db36c858c Add inotify syscalls for MIPS.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:47 +01:00
Ralf Baechle
cc61c1fede MIPS R2 instruction hazard handling.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:46 +01:00
Ralf Baechle
bbc7f22f6d Detect the 34K.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:45 +01:00
Ralf Baechle
ff88f8a3d2 Use ei / di MIPS32 R2 instructions if available.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:44 +01:00
Ralf Baechle
6590326505 Use clz / dclz on MIPS32 / MIPS64 processors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:43 +01:00
Ralf Baechle
60080265a1 Define kmap_atomic_pfn() for MIPS.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:42 +01:00
Ralf Baechle
c0ec406c80 Fix endianess bugs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:41 +01:00
Thiemo Seufer
04988d6fda Protect noat assembly with .set push/pop and make it somewhat readable.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Thiemo Seufer <ths@networkno.de>
2005-10-29 19:31:40 +01:00
Thiemo Seufer
9556ac2fa1 Fix get_saved_sp for 64bit address space. Simplify set_save_sp.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Thiemo Seufer <ths@networkno.de>
2005-10-29 19:31:39 +01:00
Thiemo Seufer
4552074577 IP30 Identification.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Thiemo Seufer <ths@networkno.de>
2005-10-29 19:31:39 +01:00
Ralf Baechle
6e760c8dae Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:37 +01:00
Maciej W. Rozycki
a5fc9c0bbe Use physical addresses at the interface level, letting drivers remap
them as appropriate.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:35 +01:00
Maciej W. Rozycki
7d7ee22121 Prevent 64-bit constants from being cropped to 32 bits when used in C code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:34 +01:00
Maciej W. Rozycki
c3455b0efc Inline ioremap() calls for constant addresses that map to KSEG1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:34 +01:00
Ralf Baechle
7222424e2e More .set to keep 32-bit processors happy.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:33 +01:00
Maciej W. Rozycki
c4559f67b7 Always use ".set mips3" rather than select between "mips2" or "mips3"
for assembling ll/sc sequences to avoid problems with 64-bit
configurations.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:31 +01:00
Maciej W. Rozycki
64dac503e8 System-specific handling of bus errors for DECstation variations
supporting parity errors only for memory (Pmax/3min/Maxine).
Fixes for resources decoded by the KN04/KN05 MB ASIC.  Additional
clean-ups for the ECC handler.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:30 +01:00
Ralf Baechle
e20368d5df Get the thing to compile again ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:28 +01:00
Maciej W. Rozycki
c6ad7b7d3c Use macros for the RM7k cp0.config bits instead of magic numbers.
Minor clean-ups.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:28 +01:00
Maciej W. Rozycki
260c96738c Mark __die() "noreturn" for real.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:26 +01:00
Maciej W. Rozycki
a76f9fe122 GCC 4.0.0 broke `attribute(("alias"))' -- resort to an assembly variant.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:24 +01:00
Maciej W. Rozycki
3bd4c902da Deal with the bloody KSEG vs CKSEG horror...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:23 +01:00
Ralf Baechle
02416dcf5a Redo RM9000 workaround which along with other DSP ASE changes was
causing some headache for debuggers knowing about signal frames.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:23 +01:00
Maciej W. Rozycki
aac8aa7717 Enable a suitable ISA for the assembler around ll/sc so that code
builds even for processors that don't support the instructions.
Plus minor formatting fixes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:22 +01:00
Ralf Baechle
478489dd2c Remove dead code which was causing warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:19 +01:00
Ralf Baechle
ac130ac494 Fix build with CONFIG_PRINTK disabled.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:18 +01:00
Ralf Baechle
e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:17 +01:00
Ralf Baechle
ffd099bd33 Fix build for CONFIG_BUG=n. Yes, bugs are now a compile time option ;-)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:17 +01:00
Ralf Baechle
fdb551a4c5 Bugs are now a configuration option.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:15 +01:00
Ralf Baechle
629c83f89b On MIPS the struct sigev preamble is only 8 bytes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:15 +01:00
Ralf Baechle
4a99d1e25b Now that a struct is the only member left in struct
mips_fpu_emulator_stats cleanup that unnecessary nesting of structs.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:14 +01:00
Ralf Baechle
baee502ce2 Get rid of the eir struct mips_fpu_emulator_private member. It's
never initialized been initialized anywhere, just saved to and
restored from signal frames so nonsense anyway.  As neat side effect
of being shared between all processors it was also abusable as a
nice covert channel between processes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:14 +01:00
Ralf Baechle
1d74f6bc85 __compute_return_epc() uses CFC1 instruction which might result in a
coprocessor unusable exception since the process can lose its fpu
context by preemption.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:13 +01:00
Ralf Baechle
4194318c39 Cleanup decoding of MIPSxx config registers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:12 +01:00
Thiemo Seufer
ba5187dbb4 Better interface to run uncached cache setup code.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:11 +01:00
Pete Popov
7de8d23287 * use 'unsigned long' as address supplied to au_write[bwl]()
* remove two already unused and commented structures
* added an ULL suffix to several address constants that use bits 35-32

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:10 +01:00
Ralf Baechle
9447cbfc7a Fix D-cache aliasing problem in the PIO IDE driver potencially resulting
in the kernel or userspace seeing stale data.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:09 +01:00
Ralf Baechle
ecba36dad8 Fix a few build warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:09 +01:00
Ralf Baechle
88de09f351 Need to include smp.h for the definition of smp_processor_id().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:08 +01:00
Ralf Baechle
b63014ad2d Move sync into the delay slot here also.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:08 +01:00
Ralf Baechle
3c37026d43 NPTL, round one.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:06 +01:00
Ralf Baechle
38551576a3 Build fix for certain configurations.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:05 +01:00
Ralf Baechle
f03da6e28e Fix BogoMIPS display on UP and some minor cosmetical things.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:05 +01:00
Thiemo Seufer
ac5d8c022f Use fixed up pfn.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:03 +01:00
Pete Popov
3b495f2bb7 Au1100 FB driver uplift for 2.6.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Antonino Daplas <adaplas@pol.net>
2005-10-29 19:31:01 +01:00
Thiemo Seufer
1b3a6e975c Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMP
TLB handlers a bit, match definitions in pgtable-{32,64}.h better.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:00 +01:00
Ralf Baechle
7c2740f1c1 HUB interrupts are allocated per node, not per slice. Make
manipulation of the interrupt mask register atomic by disabling
interrupts.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:59 +01:00
Ralf Baechle
127c6f6623 SECCOMP for MIPS.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:58 +01:00
Ralf Baechle
53de0d471f Reformat; cosmetic cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:57 +01:00
Ralf Baechle
1592dac241 Reformatting, remove debugging code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:57 +01:00
Ralf Baechle
71e0e556db Multithreaded core dumps.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:56 +01:00
Ralf Baechle
77c728c224 Gcc 4.0 fixes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:53 +01:00
Ralf Baechle
5eaf7a21be Use new txx9 serial driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:52 +01:00