Commit Graph

4 Commits (366716e6aabfb6f7c65525cc1637e035bfaf422d)

Author SHA1 Message Date
Thomas Bogendoerfer 14defd90f5 [MIPS] Fix 32bit kernels on R4k with 128 byte cache line size
The generated copy_page for R4k CPU with a 128 byte cache line size used
Create Dirty Exclusive cache line operations even if only part of the
cache line was filled.  This change avoids generating cache operations,
if only part of the cache line size is copied in one loop. It also
increases the maxmimum loop size, because the generated code even fits
into the available space for r4k CPUs with 128 byte cache line size.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-07-08 19:33:46 +01:00
Atsushi Nemoto 7bd0fea2c5 [MIPS] Fix the fix for divide by zero error in build_{clear,copy}_page
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-06-16 15:14:47 +01:00
Yoichi Yuasa cd9da13d6e Fix divide by zero error in build_clear_page() and build_copy_page()
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-06-05 18:13:16 +01:00
Thiemo Seufer fb2a27e743 [MIPS] Reimplement clear_page/copy_page
Fold the SB-1 specific implementation of clear_page/copy_page in the
generic version, and rewrite that one in tlbex style. The immediate
benefits:
  - It converts the compile-time workaround for SB-1 pass 1 prefetches
    to a more efficient run-time check.
  - It allows adjustment of loop unfolling, which helps to reduce the
    number of redundant cdex cache ops.
  - It fixes some esoteric cornercases (the cache line length calculations
    can go wrong, and support for 64k pages without prefetch instructions
    will overflow the addiu immediate).
  - Somewhat better guesses of "good" prefetch values.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:23 +01:00