Commit graph

17 commits

Author SHA1 Message Date
Martin Michlmayr
6574e001b4 [ARM] Kirkwood: Hook up I2C
Hook up I2C on Marvell Kirkwood.  Tested on a QNAP TS-219 which has
RTC connected through I2C.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-03-23 14:42:00 -04:00
Nicolas Pitre
5b99d53483 [ARM] Kirkwood: register internal devices in a common place
The RTC and the two XOR engines are internal to the chip, and therefore
always available since they don't depend on a particular board layout.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-26 22:55:59 -05:00
Nicolas Pitre
8235ee009c [ARM] Kirkwood: SDIO driver registration for DB6281 and RD6281
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-26 20:22:26 -05:00
Nicolas Pitre
13731d1a2f [ARM] 5357/1: Kirkwood: add missing ge01 tclk initialization
Otherwise the mv643xx_eth driver will assume 133 MHz which is incorrect.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-08 16:29:41 +00:00
Ronen Shitrit
d15fb9efe9 [ARM] Kirkwood: allow instantiating the second ethernet port
The 88f6192 and 88f6281 Kirkwood SoCs support two ethernet ports.
Add the platform glue that will allow board support files to
instantiate the second ethernet port.

Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-12-11 16:39:08 -05:00
Ronen Shitrit
fb6f552930 [ARM] Orion: add the option to support different ehci phy initialization
The Orion ehci driver serves the Orion, kirkwood and DD Soc families.
Since each of those integrate a different USB phy we should have the
ability to use few initialization sequences or to leave the boot loader
phy settings as is.

Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
2008-12-04 01:28:14 -05:00
Lennert Buytenhek
dcf1cece14 [ARM] Orion: instantiate the dsa switch driver
This adds DSA switch instantiation hooks to the orion5x and the
kirkwood ARM SoC platform code, and instantiates the DSA switch
driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE
RD, the Linksys WRT350n v2, and the 88F6281 RD boards.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Peter van Valderen <linux@ddcrew.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-10-19 14:29:05 -04:00
Ronen Shitrit
4360bb4192 [ARM] Kirkwood: add support for L2 cache WB/WT selection
Feroceon L2 cache can work in eighther write through or write back mode
on Kirkwood. Add the option to configure this mode according to Kconfig.

Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-09-25 16:29:21 -04:00
Ronen Shitrit
b2b3dc2fc4 [ARM] Kirkwood: add support for newer SoC models
Add support to the Kirkwood port for newer device models and silicon
revisions.  Instead of looking at the DEVICE_ID register, the device
version is now determined by looking at the PCI-Express device ID and
revision registers, as it is done for orion5x, and this information
is used to determine the TCLK frequency, again, as it is done for
orion5x.

Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-09-25 16:27:21 -04:00
Ronen Shitrit
79d4dd77f0 [ARM] Kirkwood: prepare for runtime-determined timer tick rate
Currently, kirkwood uses a hardcoded timer tick rate of 166 MHz, but
the actual timer tick rate varies between different members of the SoC
family.

This patch prepares for runtime determination of the timer tick rate.

Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
2008-09-25 16:27:21 -04:00
Lennert Buytenhek
144f814a43 [ARM] Kirkwood: wire up ethernet error interrupt
Wire up the ethernet port's error interrupt so that the
mv643xx_eth driver can sleep for SMI event completion instead of
having to busy-wait for it.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-09-25 16:26:44 -04:00
Lennert Buytenhek
18365d181f [ARM] Kirkwood: instantiate the orion_spi driver in the platform code
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-08-09 15:38:18 +02:00
Saeed Bishara
09c0ed2e6e [ARM] Kirkwood: Instantiate mv_xor driver
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-08-09 15:17:29 +02:00
Lennert Buytenhek
6f088f1d21 [ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/plat
This patch performs the equivalent include directory shuffle for
plat-orion, and fixes up all users.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-08-09 13:44:58 +02:00
Russell King
a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00
Saeed Bishara
1338760329 [ARM] Kirkwood: support L2 writeback mode
This patch allows booting Kirkwood with the L2 in writeback mode,
by reading the WT override bit from the L2 config register and
passing that into the Feroceon L2 init routine, instead of assuming
that the WT override bit will always be set

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-30 14:25:24 -04:00
Saeed Bishara
651c74c74b [ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.

This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00