Commit graph

10172 commits

Author SHA1 Message Date
Linus Torvalds
7cc4e87f91 Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits)
  [ARM] 5300/1: fixup spitz reset during boot
  [ARM] 5295/1: make ZONE_DMA optional
  [ARM] 5239/1: Palm Zire 72 power management support
  [ARM] 5298/1: Drop desc_handle_irq()
  [ARM] 5297/1: [KS8695] Fix two compile-time warnings
  [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores.
  [ARM] pxa: allow multi-machine PCMCIA builds
  [ARM] pxa: add preliminary CPUFREQ support for PXA3xx
  [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h
  [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c
  [ARM] pxa/zylonite: add support for USB OHCI
  [ARM] ohci-pxa27x: use ioremap() and offset for register access
  [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph()
  [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource
  [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver
  [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers
  [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c
  [ARM] pxa: simplify DMA register definitions
  [ARM] pxa: make additional DCSR bits valid for PXA3xx
  [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c
  ...

Fixed up conflicts in
	arch/arm/mach-versatile/core.c
	sound/soc/pxa/pxa2xx-ac97.c
	sound/soc/pxa/pxa2xx-i2s.c
manually.
2008-10-11 10:09:45 -07:00
David S. Miller
6861ff35ec Merge branch 'r8169' of git://git.kernel.org/pub/scm/linux/kernel/git/romieu/netdev-2.6 2008-10-10 14:43:54 -07:00
Brice Goglin
2ef3783608 myri10ge: update driver version number to 1.4.3-1.369
Update myri10ge driver version number to 1.4.3-1.369.

Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-10 14:33:37 -07:00
Francois Romieu
1765f95d2d r8169: add shutdown handler
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:09:12 +02:00
Francois Romieu
5b538df9de r8169: preliminary 8168d support
Taken from Realtek's 8.007.00 r8168 driver.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Fixed-by: Ivan Vecera <ivecera@redhat.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:09:07 +02:00
Francois Romieu
7f3e3d3a69 r8169: support additional 8168cp chipset
Taken from Realtek's 8.007.00 r8168 driver.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Fixed-by: Ivan Vecera <ivecera@redhat.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:09:04 +02:00
Francois Romieu
ef808d502c r8169: change default behavior for mildly identified 8168c chipsets
The addition of a new device has so far implied a specialization of
these masks. While they identify 8168c devices, they can be expected
to be further refined as they have been by Realtek so far.

The change should bring the driver closer to the version 8.006.00 of
Realtek's 8168 driver.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:09:00 +02:00
Francois Romieu
ef3386f00f r8169: add a new 8168cp flavor
Taken from Realtek's 8.006.00 r8168 driver.

I have left some bits related to jumbo frame aside for now.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:55 +02:00
Francois Romieu
6fb07058d2 r8169: add a new 8168c flavor (bis)
Taken from Realtek's 8.006.00 r8168 driver.

I have left some bits related to jumbo frame aside for now.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:50 +02:00
Francois Romieu
197ff761db r8169: add a new 8168c flavor
Taken from Realtek's 8.006.00 r8168 driver.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:47 +02:00
Francois Romieu
b726e493e8 r8169: sync existing 8168 device hardware start sequences with vendor driver
This part of the driver should be reasonably in line with Realtek's
8.006.00 driver.

I have left some bits related to jumbo frame and optional features
aside for now.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:42 +02:00
Francois Romieu
2e68ae4430 r8169: 8168b Tx performance tweak
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:37 +02:00
Francois Romieu
219a1e9d46 r8169: make room for more specific 8168 hardware start procedure
Broadly speaking the 8168c* share some common code which will
be factored in __rtl_hw_start_8168cp. The 8168b* share some
code too but it will be a bit different.

Any change of behavior should be confined to the currently
unidentified 8168 chipsets. They will not be applied the Tx
performance tweak and will emit a warning instead.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:34 +02:00
Francois Romieu
b836390159 r8169: shuffle some registers handling around (8168 operation only)
I can not argue strongly for (or against) a specific ordering
on a purely technical ground but the patch avoids to swallow
Realtek's changes in one big, hard-to-read gulp.

Let aside the way the RxConfig register is written (see
rtl_set_rx_tx_config_registers / RxConfig / rtl_set_rx_mode),
this change brings the registers write ordering closer with
Realtek's driver one (version 8.006.00) for the 8168 chipsets.

More 8168 specific code which touches the Configx registers will
be added in the section covered by Cfg9346_UnLock / Cfg9346_Lock.

This code should not be the cause of regression for 810x and
8110 users.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:30 +02:00
Francois Romieu
236b8082aa r8169: new phy init parameters for the 8168b
The new parameters are synced with Realtek's driver
version 8.006.00.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:25 +02:00
Francois Romieu
f50d427542 r8169: update phy init parameters
The modified parameters are synced with Realtek's driver
version 8.006.00.

The change should only be noticeable with some 8168c.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
2008-10-10 23:08:22 +02:00
Francois Romieu
a2de6b89b7 r8169: wake up the PHY of the 8168
This is typically needed when some other OS puts the PHY
to sleep due to the disabling of WOL options in the BIOS
of the system.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Tested-by: Chiaki Ishikawa <chiaki.ishikawa@ubin.jp>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Cc: RyanKao <ryankao@realtek.com.tw>
2008-10-10 23:07:58 +02:00
Luis R. Rodriguez
d2a3b222cf ath9k: Fix return code when ath9k_hw_setpower() fails on reset
We were not reporting a status code back ath9k_hw_setpower() failed
during reset so lets correct this.

Reported-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-10 12:26:24 -07:00
Luis R. Rodriguez
1cf69cfbe1 ath9k: remove nasty FAIL macro from ath9k_hw_reset()
This is fucking horribe crap code so nuke it. There I cursed too in a commit log.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-10 12:25:45 -07:00
David S. Miller
55ed31e62d enic: Attempt to fix build in 32-bit such as i386.
Such platforms lack readq/writeq but this driver want to call them.

Noticed by Andrew Morton.

Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 22:13:53 -07:00
David S. Miller
13c9821ea4 ppp: Use skb_queue_walk() in ppp_mp_insert().
Instead of open-coded version.

Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 16:40:29 -07:00
Francois Romieu
df58ef51ca r8169: fix early spinlock use
rtl8169_init_one
-> rtl_init_mac_address
   -> rtl_rar_set
      -> spin_lock_irq(&tp->lock);
[...]
-> spin_lock_init(&tp->lock);

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 14:35:58 -07:00
Steve Glendinning
1d74a6bddf smsc95xx: fix usb usage on big endian platforms
Fix warnings caught by David Miller on sparc64

Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 14:34:47 -07:00
Brice Goglin
5c714e238e myri10ge: remove over-paranoid queue number modulus
No need to modulus the queue number in ->hard_start_xmit() since the
core is going to do that for you modulus ->real_num_tx_queues.

Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 14:31:42 -07:00
Dave Graham
3ed30676f5 e1000: don't generate bad checksums for tcp packets with 0 csum
When offloading transmit checksums only, the driver was not
correctly configuring the hardware to handle the case of a zero
checksum.  For UDP the correct behavior is to leave it alone, but
for tcp the checksum must be changed from 0x0000 to 0xFFFF.  The
hardware takes care of this case but only if it is told the
packet is tcp.

same patch as e1000e

Signed-off-by: Dave Graham <david.graham@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 14:29:26 -07:00
Dave Graham
af807c8297 e1000e: don't generate bad checksums for tcp packets with 0 csum
When offloading transmit checksums only, the driver was not
correctly configuring the hardware to handle the case of a zero
checksum.  For UDP the correct behavior is to leave it alone, but
for tcp the checksum must be changed from 0x0000 to 0xFFFF.  The
hardware takes care of this case but only if it is told the
packet is tcp.

Signed-off-by: Dave Graham <david.graham@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 14:28:58 -07:00
Russell King
c97f68145e Merge branch 'for-rmk' of git://source.mvista.com/git/linux-davinci-2.6.git
Merge branch 'davinci' into devel
2008-10-09 21:33:05 +01:00
Russell King
3f30a09a61 Merge branch 'pxa-all' into devel
Conflicts:

	arch/arm/mach-pxa/Kconfig
	arch/arm/mach-pxa/corgi.c
	arch/arm/mach-pxa/include/mach/hardware.h
	arch/arm/mach-pxa/spitz.c
2008-10-09 21:33:02 +01:00
Russell King
9e165acf1b Merge branch 'at91' into devel 2008-10-09 21:31:58 +01:00
Russell King
6a4690c22f Merge branch 'ptebits' into devel
Conflicts:

	arch/arm/Kconfig
2008-10-09 21:31:56 +01:00
Michael Chan
ec7e6fabbe bnx2: Update version to 1.8.1.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 12:27:06 -07:00
Benjamin Li
3d16af8665 bnx2: Handle DMA mapping errors.
Before, the driver would not care about the return codes from pci_map_*
functions.  This could be potentially dangerous if a mapping failed.
Now, we will check all pci_map_* calls.  On the transmit side, we switch
to use the new function skb_dma_map().  On the receive side, we add
pci_dma_mapping_error().

Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 12:26:41 -07:00
Michael Chan
a1efb4b686 bnx2: Eliminate TSO header modifications.
This is now possible with updated firmware.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 12:24:39 -07:00
Michael Chan
d5321e309c bnx2: Update 5706/5708 firmware.
With this new firmware, the driver no longer has to modify the
TCP/IP header fields when transmitting TSO packets.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 12:22:38 -07:00
Michael Chan
9f52b564b7 bnx2: Check netif_running() in all ethtool operations.
We need to check netif_running() state in most ethtool operations
and properly handle the !netif_running() state where the chip is
in an uninitailzed state or low power state that may not accept
any MMIO.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 12:21:46 -07:00
Michael Chan
74bf4ba3d3 bnx2: Add bnx2_shutdown_chip().
This logic is used in bnx2_close() and bnx2_suspend() and
so should be separated out into a separate function.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 12:21:08 -07:00
Lennert Buytenhek
ec2a5652ea phylib: two dynamic mii_bus allocation fallout fixes
1. arch/powerpc/platforms/pasemi/gpio_mdio.c also needs to be
   converted over to mdiobus_{alloc,free}().

2. drivers/net/phy/fixed.c used to embed a struct mii_bus into its
   struct fixed_mdio_bus and then use container_of() to go from the
   former to the latter.  Since mii bus structures are no longer
   embedded, we need to do something like use the mii bus private
   pointer to go from mii_bus to fixed_mdio_bus instead.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-09 09:45:04 -07:00
David S. Miller
724f880576 jme: Fix warnings with CONFIG_PM disabled.
drivers/net/jme.c:1598: warning: ‘jme_set_100m_half’ defined but not used
drivers/net/jme.c:1618: warning: ‘jme_wait_link’ defined but not used

Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 19:54:31 -07:00
Guo-Fu Tseng
6dc0c97fdc jme: Advances version number
Advances the driver version after modification.

Signed-off-by: Guo-Fu Tseng <cooldavid@cooldavid.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 19:51:33 -07:00
akeemting
576b5223e2 jme: Faulty IRQ handle bug fix
Fix IRQ handle bug when interrupt mode.

The driver was incorrectly handled and returned IRQ_HANDLED
while the device is not generating the interrupt.
It happened due to faulty determination of interrupt status register.

Found by: "Ethan" <ethanhsiao@jmicron.com>
Fixed by: "akeemting" <akeem@jmicron.com>
Signed-off-by: Guo-Fu Tseng <cooldavid@cooldavid.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 19:51:32 -07:00
Guo-Fu Tseng
a821ebe580 jme: Added half-duplex mode and IPv6 RSS fix
1. Set bit 5 of GPREG1 to 1 to enable hardware workaround for half-duplex
   mode. Which the MAC processor generates CRS/COL by itself instead of
   receive it from PHY processor.

2. Set bit 6 of GPREG1 to 1 to enable hardware workaround that masks the
   MAC processor working right while calculating IPv6 RSS in 10/100
   mode.

3. Group the workaround codes all together.

Signed-off-by: Guo-Fu Tseng <cooldavid@cooldavid.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 19:51:31 -07:00
Divy Le Ray
0ce2f03bad cxgb3: Add 1G fiber support
Add support for 1G optical Vitesse PHY.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:40:28 -07:00
Divy Le Ray
1e8820256f cxgb3: Support for Aeluros 2005 PHY
Add support for SR PHY.
Auto-detect phy module type, and report type changes.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:40:07 -07:00
Divy Le Ray
9b1e36566c cxgb3: commnonize LASI phy code
Add generic code to manage interrupt driven PHYs.
Do not reset the phy after link parameters update,
the new values might get lost.
Return early from link change notification
when the link parameters remain unchanged.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:39:31 -07:00
Divy Le Ray
f231e0a5a2 cxgb3: More flexible support for PHY interrupts.
Do not require PHY interrupts to be connected to GPIs in ascending order.
Base interrupt availability both on PHYs supporting them and on GPIs being
hooked up.  Allows boards to specify interrupt GPIs though the PHYs don't
use them.

Remove spurious PHY interrupts due to clearing T3DBG interrupts before
setting their polarity.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:39:00 -07:00
Divy Le Ray
044979827e cxgb3: simplify port type struct and usage
Second step in overall phy layer reorganization.
Clean up the port_type_info structure.
Support coextistence of clause 22 and clause 45 MDIO devices.
Select the type of MDIO transaction on a per transaction basis.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:38:29 -07:00
Divy Le Ray
78e4689e90 cxgb3: allow for PHY reset status
First step towards overall PHY layering re-organization.
Allow a status return when a PHY is reset.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:38:01 -07:00
Divy Le Ray
8c26376112 cxgb3: Allocate multiqueues at init time
Allocate a queue set per core, up to the maximum of available qsets.
Share the queue sets on multi port adapters.
Rename MSI-X interrupt vectors ethX-N, N being the queue set number.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:37:33 -07:00
Divy Le Ray
20d3fc1150 cxgb3: reset the adapter on fatal error
when a fatal error occurs, bring ports down, reset the chip,
and bring ports back up.

Factorize code used for both EEH and fatal error recovery.
Fix timer usage when bringing up/resetting sge queue sets.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:36:03 -07:00
Andreas Oberritter
176eaa589b 8139too: move wmb before TX DMA start
The write barrier should be used before starting a DMA transfer. This fixes
a problem, where almost all packets received on another machine had garbled
content. Tested with an RTL8100C on a MIPS machine.

Signed-off-by: Andreas Oberritter <obi@linuxtv.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-08 17:12:57 -07:00