This defines the proper sleep states for all the I2C pins of
the MOP500 DB8500 ASIC setting.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This named the sleep mode pin configurations as *slpm* rather
than *sleep* to correspond better with the settings from the
datasheet. It also defines an optional sleep mode for the SPI
controller SPI2.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
GPIO216_AG12 is configured as a gpio for SPI2, so select
the spi2_oc1_2 pin group instead of spi2_oc1_1
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Due to specific constraint, pin HSIT_ACWAKE0_a is
not driven by HSI block but as a GPIO.
Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The MSP platform data callbacks use the old custom callbacks to
set the state of the pins, switch over to using pinctrl.
Cc: Ola Lilja <ola.o.lilja@stericsson.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
UART0 had a hack that enabled its pins on init and put it to
sleep on the exit callback. Replace this with the pinctrl calls
to do the same thing and update the runtime table with the two
apropriate states for runtime/active and idle.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
At the beginning of the first patch series I included the custom
ux500 pin control system to make sure I could eventually replace
it with the standard subsystem driver. So now that we've done so,
let's remove it.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the Ux500 family to use the pinctrl driver for
configuring pins.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This updates the Ux500 pin handling to take much more care when
applying pin settings for different platforms and peripherals.
This is an accumulation of a longer history of updates to the
MOP500 family pin file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Implement an API to allow a list of pincfgs to be remuxed to active
and sleep modes, for power saving. This is not exported on purpose,
because it is not to be called by drivers directly.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
With bug.h currently living right in linux/kernel.h there
are files that use BUG_ON and friends but are not including
the header explicitly. Fix them up so we can remove the
presence in kernel.h file.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Do more work in the per-machine init calls instead of customizing
each init call.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The <[plat|mach]/gpio.h> file is included from upper directories
and deal with generic GPIO and gpiolib stuff. Break out the
platform and driver specific defines and functions into its own
header file.
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This sets up a few GPIO pins and some pinmuxing on platform boot
for the Snowball board. Based on work from Mathieu J. Poirier
<mathieu.poirier@linaro.org>.
Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
This patch provides platform data for following
- uart reset function to assist uart register lockup workaround
- init/exit function to fix glitch in the tx pin in tty_open
when tty port0 is opened a glitch is seen in the tx line
of uart0. This happens in pl011_startup() when tx fifo
interrupt is provoked into asserting.
Now uart0 pins are enabled (alt function) only when init
is complete and turned back to gpio when closed.
Signed-off-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This will centralize all GPIO pin muxing for the different boards
in the MOP500 family to a single file. It also kills off the
deprecated support for the ED (Early Drop) ASIC, this should
never be spotted in the open and ST-Ericsson have internally
deprecated this hardware.
Signed-off-by: Bibek Basu <bibek.basu@stericsson.com>
[Rebasing and kill old ASIC support]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Split off pin definitions for the MOP500 board family to its
own file.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Patrice Chotard